a FEATURES High Off Isolation -80 dB at 30 MHz -3 dB Signal Bandwidth 250 MHz +1.8 V to +5.5 V Single Supply Low On-Resistance (15 Typically) Low On-Resistance Flatness Fast Switching Times tON Typically 8 ns tOFF Typically 3 ns Typical Power Consumption < 0.01 W TTL/CMOS Compatible CMOS, Low Voltage RF/Video, SPDT Switch ADG752 FUNCTIONAL BLOCK DIAGRAM ADG752 S1 D S2 IN SWITCH SHOWN FOR A LOGIC "1" INPUT APPLICATIONS Audio and Video Switching RF Switching Networking Applications Battery Powered Systems Communication Systems Relay Replacement Sample-and-Hold Systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG752 is a low voltage SPDT (single pole, double throw) switch. It is constructed using switches in a T-switch configuration, which results in excellent Off Isolation while maintaining good frequency response in the ON condition. 1. High Off Isolation -80 dB at 30 MHz. High off isolation and wide signal bandwidth make this part suitable for switching RF and video signals. Low power consumption and operating supply range of +1.8 V to +5.5 V make it ideal for battery powered, portable instruments. 4. Low Power Consumption, typically <0.01 W. 2. -3 dB Signal Bandwidth 250 MHz. 3. Low On Resistance (15 ). 5. Break-Before-Make Switching Action. 6. Tiny 6-lead SOT-23 and 8-lead SOIC packages. The ADG752 is designed on a submicron process that provides low power dissipation yet gives high switching speed and low on resistance. This part is a fully bidirectional switch and can handle signals up to and including the supply rails. Break-before-make switching action ensures the input signals are protected against momentary shorting when switching between channels. The ADG752 is available in 6-lead SOT-23 and 8-lead SOIC packages. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999 ADG752-SPECIFICATIONS (V DD = +5 V 10%, GND = 0 V, unless otherwise noted.) B Version -40C +25C to +85C Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) 0 V to VDD On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) 15 18 0.1 0.6 2 Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or I INH 0.01 0.25 0.01 0.25 0.001 CIN, Digital Input Capacitance Test Conditions/Comments V typ max typ max typ max VS = 0 V to 2.5 V, IDS = 10 mA VDD = + 4.5 V 3.0 nA typ nA max nA typ nA max VD = 4.5 V/1 V, VS = 1 V/4.5 V; Test Circuit 2 VD = VS = 1 V, or 4.5 V; Test Circuit 3 2.4 0.8 V min V max 0.5 A typ A max pF typ VIN = VINL or VINH RL = 300 , C L = 35 pF; VS = 3 V, Test Circuit 4 RL = 300 , C L = 35 pF; VS = 3 V, Test Circuit 4 RL = 300 , C L = 35 pF; VS = 3 V, Test Circuit 5 RL = 50 , CL = 5 pF, f = 30 MHz; Test Circuit 6 RL = 50 , CL = 5 pF, f = 30 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, Test Circuit 8 20 0.6 3 LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Units 3.0 2 VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA 1 DYNAMIC CHARACTERISTICS tON 8 tOFF 3 Break-Before-Make Time Delay 6 Off Isolation -80 ns typ ns max ns typ ns max ns typ ns min dB typ Crosstalk -80 dB typ -3 dB Bandwidth CS (OFF) CD, CS (ON) 250 4 15 MHz typ pF typ pF typ 0.001 0.1 A typ A max 13 5 1 POWER REQUIREMENTS IDD 0.5 VDD = +5.5 V Digital Inputs = 0 V or +5.5 V NOTES 1 Guaranteed by design, not subject to production test. Specifications subject to change without notice. -2- REV. 0 SPECIFICATIONS (V DD Parameter B Version -40C +25C to +85C ANALOG SWITCH Analog Signal Range On-Resistance (RON) 35 0 V to VDD 50 On-Resistance Match Between Channels (RON) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or I INH 0.2 2.5 0.01 0.25 0.01 0.25 0.001 CIN, Digital Input Capacitance 2 DYNAMIC CHARACTERISTICS1 tON 10 2.5 Units Test Conditions/Comments V typ max typ max VS = 0 V to VDD, IDS = 10 mA; Test Circuit 1 VS = 0 V to VDD, IDS = 10 mA 3.0 2.0 0.4 V min V max 0.5 A typ A max pF typ VIN = VINL or VINH RL = 300 , C L = 35 pF; VS = 2 V, Test Circuit 4 RL = 300 , C L = 35 pF; VS = 2 V, Test Circuit 4 RL = 300 , C L = 35 pF; VS = 2 V, Test Circuit 5 RL = 50 , CL = 5 pF, f = 30 MHz; Test Circuit 6 RL = 50 , CL = 5 pF, f = 30 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, Test Circuit 8 3.0 tOFF 4 Break-Before-Make Time Delay 6 Off Isolation -80 ns typ ns max ns typ ns max ns typ ns min dB typ Crosstalk -80 dB typ -3 dB Bandwidth CS (OFF) CD, CS (ON) 250 4 15 MHz typ pF typ pF typ 0.001 0.1 A typ A max 8 1 POWER REQUIREMENTS IDD VDD = +3.3 V VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 1 V or 3 V; Test Circuit 3 nA typ nA max nA typ nA max 18 0.5 NOTES 1 Guaranteed by design, not subject to production test. Specifications subject to change without notice. REV. 0 ADG752 = +3 V 10%, GND = 0 V, unless otherwise noted.) -3- VDD = +3.3 V Digital Inputs = 0 V or +3.3 V ADG752 ABSOLUTE MAXIMUM RATINGS 1 TERMINOLOGY (TA = +25C unless otherwise noted) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . . . -0.3 V to V DD +0.3 V or 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA (Pulsed at 1 ms, 10% Duty Cycle Max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . (T J Max-TA)/JA Junction Temperature (TJ Max) . . . . . . . . . . . . . . . . . .+150C SOIC Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44C/W SOT-23 Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given. PIN CONFIGURATIONS 8-Lead SOIC (RM-8) NC 1 D 1 8 D VDD 2 S2 2 7 VDD TOP VIEW GND 3 (Not to Scale) 6 S1 IN 4 6 ADG752 RFLAT(ON) IS (OFF) ID, IS (ON) VD (VS) CS (OFF) CD, CS (ON) tON tOFF tD Off Isolation Crosstalk 6-Lead SOT-23 (RT-6) ADG752 VDD GND S D IN RON RON Bandwidth S2 On Response The frequency at which the output is attenuated by -3 dBs. The frequency response of the "ON" switch. Insertion Loss Loss due to the ON resistance of the switch. VINL Maximum input voltage for Logic "0." VINH Minimum input voltage for Logic "1." IINL(IINH) Input current of the digital input. IDD Positive supply current. 5 GND TOP VIEW S1 3 (Not to Scale) 4 IN 5 NC NC = NO CONNECT Table I. Truth Table ADG752 IN Switch S1 Switch S2 0 1 ON OFF OFF ON Most positive power supply potential. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Ohmic resistance between D and S. On resistance match between channels, i.e., RONmax-RONmin. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Source leakage current with the switch "OFF." Channel leakage current with the switch "ON." Analog voltage on terminals D and S. "OFF" switch source capacitance. "ON" switch capacitance. Delay between applying the digital control input and the output switching on. See Test Circuit 4. Delay between applying the digital control input and the output switching off. "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another. A measure of unwanted signal coupling through an "OFF" switch. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. ORDERING GUIDE Model Temperature Range Brand* Package Descriptions Package Options ADG752BRM ADG752BRT -40C to +85C -40C to +85C SEB SEB SOIC SOT-23 RM-8 RT-6 *Brand on these packages is limited to three characters due to space constraints. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG752 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. -4- WARNING! ESD SENSITIVE DEVICE REV. 0 Typical Performance Characteristics- ADG752 10m 40 TA = +258C TA = +258C 35 VDD = +2.7V 1m 30 IDD - Amps RON - V +5V 25 20 VDD = +3.3V 10m +3V 1m 15 VDD = +4.5V 100n 10 VDD = +5.5V 5 0 2 3 4 VD OR VS DRAIN SOURCE VOLTAGE - Volts 1 5 10n 100 5.5 100k 10k FREQUENCY - Hz 1k 10M Figure 4. Supply Current vs. Input Switching Frequency Figure 1. On Resistance as a Function of VD (VS) Single Supplies 40 -40 VDD = +3V TA = +25C 35 30 -60 OFF ISOLATION - dB +858C 25 RON - V 100M 20 +258C 15 -408C 10 -80 -100 5 0 0 0.5 1.0 1.5 2.0 2.5 VD OR VS DRAIN SOURCE VOLTAGE - Volts -120 0.1 3.0 1 10 FREQUENCY - MHz Figure 5. Off Isolation vs. Frequency Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 3 V 40 0 TA = +258C VDD = +5V 35 -20 30 CROSSTALK - dB -40 RON - V 25 20 +858C +258C 15 -408C -80 -120 5 0 2 3 4 1 VD OR VS DRAIN SOURCE VOLTAGE - Volts -140 0.1 5 1 10 FREQUENCY - MHz Figure 6. Crosstalk vs. Frequency Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 5 V REV. 0 -60 -100 10 0 100 -5- 100 ADG752 0 SERIES D S TA = +258C ATTENUATION - dB -2 SHUNT IN -4 Figure 8. Basic T-Switch Configuration LAYOUT CONSIDERATIONS -6 Where accurate high frequency operation is important, careful consideration should be given to the printed circuit board layout and to grounding. Wire wrap boards, prototype boards and sockets are not recommended because of their high parasitic inductance and capacitance. The part should be soldered directly to a printed circuit board. A ground plane should cover all unused areas of the component side of the board to provide a low impedance path to ground. Removing the ground planes from the area around the part reduces stray capacitance. -8 1 10 FREQUENCY - MHz 100 Figure 7. On Response vs. Frequency GENERAL DESCRIPTION The ADG752 is an SPDT switch constructed using switches in a T configuration to obtain high "OFF" isolation while maintaining good frequency response in the "ON" condition. Good decoupling is important in achieving optimum performance. VDD should be decoupled with a 0.1 F surface mount capacitor to ground mounted as close as possible to the device itself. Figure 8 shows the T-switch configuration. While the switch is in the OFF state, the shunt switch is closed and the two series switches are open. The closed shunt switch provides a signal path to ground for any of the unwanted signals that find their way through the off capacitances of the series' MOS devices. This results in more improved isolation between the input and output than with an ordinary series switch. When the switch is in the ON condition, the shunt switch is open and the signal path is through the two series switches which are now closed. VDD CH1 S1 D 75V 75V CH2 75V ADG752 75V VOUT A=2 S2 250V IN 250V Figure 9. Multiplexing Between Two Video Signals -6- REV. 0 ADG752 Test Circuits V1 S IS (OFF) D A VS D S NC VS IDS RON = V1/IDS S D ID (ON) A VD VD NC = NO CONNECT Test Circuit 1. On Resistance Test Circuit 2. Off Leakage Test Circuit 3. On Leakage VDD 0.1mF VIN 50% 50% VDD S1 D S2 VOUT VS RL 300V IN CL 35pF VS 90% VOUT GND 90% GND t OFF t ON Test Circuit 4. Switching Times VDD 0.1mF VDD S1 VS VIN D D2 S2 RL 300V CL 35pF 50% 50% 0V VOUT 50% VOUT IN 50% 0V tD VIN tD GND Test Circuit 5. Break-Before-Make Time Delay, tD VDD VDD 0.1mF 0.1mF NETWORK ANALYZER NETWORK ANALYZER VDD S1 VOUT S RL 50V 50V 50V IN VS RL 50V GND 50V VOUT IN VS GND OFF ISOLATION = 20 LOG Test Circuit 6. Off Isolation CHANNEL-TO-CHANNEL VOUT CROSSTALK = 20 LOG VS VOUT VS Test Circuit 7. Channel-to-Channel Crosstalk VDD 0.1mF NETWORK ANALYZER VDD S 50V IN VS D VIN RL 50V GND INSERTION LOSS = 20 LOG VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH Test Circuit 8. Bandwidth REV. 0 D S2 D VIN VDD -7- ADG752 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C3568-8-4/99 8-Lead SOIC (RM-8) 0.122 (3.10) 0.114 (2.90) 8 5 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) 1 4 PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.120 (3.05) 0.112 (2.84) 0.043 (1.09) 0.037 (0.94) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.011 (0.28) 0.003 (0.08) 338 278 0.028 (0.71) 0.016 (0.41) 6-Lead SOT-23 (RT-6) 0.122 (3.10) 0.106 (2.70) 0.071 (1.80) 0.059 (1.50) 6 5 4 1 2 3 0.118 (3.00) 0.098 (2.50) PIN 1 0.037 (0.95) BSC 0.075 (1.90) BSC 0.006 (0.15) 0.000 (0.00) 0.057 (1.45) 0.035 (0.90) 0.020 (0.50) SEATING 0.010 (0.25) PLANE 108 0.009 (0.23) 08 0.003 (0.08) 0.022 (0.55) 0.014 (0.35) PRINTED IN U.S.A. 0.051 (1.30) 0.035 (0.90) -8- REV. 0