IRF510 - Intersil Corporation - Datasheet.Directory

File Number 1573.4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF510

5.6A, 100V, 0.540 Ohm, N-Channel Power

MOSFET

This N-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17441.

Features

• 5.6A, 100V

•r

DS(ON) = 0.540Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-220AB

Ordering Information

PART NUMBER PACKAGE BRAND

IRF510 TO-220AB IRF510

NOTE: When ordering, include the entire part number.

SOURCE

DRAIN (FLANGE)

DRAIN

GATE

Data Sheet November 1999

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRF510 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 100 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 100 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID5.6 A

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID4A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 20 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD43 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.29 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 19 mJ

Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ,T

STG -55 to 175 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

pkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 150oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA, (Figure 10) 100 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V

Zero-Gate Voltage Drain Current IDSS VDS = 95V, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 5.6 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 3.4A (Figures 8, 9) - 0.4 0.54 Ω

Forward Transconductance (Note 2) gfs VGS = 50V, ID = 3.4A (Figure 12) 1.3 2.0 - S

Turn-On Delay Time td(ON) ID≈ 5.6A, RGS = 24Ω, VDD = 50V, RL = 9Ω,

VDD = 50V, VGS = 10V

MOSFET switching times are essentially independent

of operating temperature

- 8 12 ns

Rise Time tr-2563ns

Turn-Off Delay Time td(OFF) -157 ns

Fall Time tf-1259ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 5.6A, VDS = 0.8 x Rated BVDSS,

IG(REF) = 1.5mA (Figure 14)

Gate charge is essentially independent of operating

temperature.

- 5.0 30 nC

Gate to Source Charge Qgs - 2.0 - nC

Gate to Drain “Miller” Charge Qgd - 3.0 - nC

Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 135 - pF

Output Capacitance COSS -80- pF

Reverse-Transfer Capacitance CRSS -20- pF

Internal Drain Inductance LDMeasured From the

Contact Screw On Tab To

Center of Die

Modified MOSFET

Symbol Showing the

Internal Devices

Inductances

- 3.5 - nH

Measured From the Drain

Lead, 6mm (0.25in) From

Package to Center of Die

- 4.5 - nH

Internal Source Inductance LSMeasured From The

Source Lead, 6mm

(0.25in) From Header to

Source Bonding Pad

- 7.5 - nH

Junction to Case RθJC - - 3.5 oC/W

Junction to Ambient RθJA Free air operation - - 80 oC/W

IRF510

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL Test Conditions MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET

Symbol Showing the

Integral Reverse

P-N Junction Diode

- - 5.6 A

Pulse Source to Drain Current

(Note 3) ISDM - - 20 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 5.6A, VGS = 0V (Figure 13) - - 2.5 V

Reverse Recovery Time trr TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs 4.6 96 200 ns

Reverse Recovered Charge QRR TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs 0.17 0.4 0.83 µC

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 25V, start TJ = 25oC, L = 910µH, RG = 25Ω, peak IAS = 5.6A.

Typical Performance Curves Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

TC, CASE TEMPERATURE (oC)

25 50 75 100 125 150 175

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

TC, CASE TEMPERATURE (oC)

50 75 100 15025 175

ID, DRAIN CURRENT (A)

125

ZθJC, TRANSIENT

0.1

0.01 10-2

10-5 10-4 10-3 0.1 1 10

SINGLE PULSE

t1, RECTANGULAR PULSE DURATION (S)

DUTY FACTOR: D = t1/t2

PEAK TJ= PDM x ZθJC + TC

PDM

NOTES:

THERMAL IMPEDANCE (oC/W)

0.01

0.02

0.5

0.2

0.1

0.05

IRF510

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

100

103

110

102

0.1

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

OPERATION IN THIS

REGION IS LIMITED

BY rDS(ON)

TC = 25oC

10µs

100µs

1ms

TJ = 175oC

SINGLE PULSE

VDS, DRAIN TO SOURCE VOLTAGE (V)

10 20 30 40050

ID, DRAIN CURRENT (A)

VGS = 10V

VGS = 8V

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS, DRAIN TO SOURCE VOLTAGE (V)

2468010

ID, DRAIN CURRENT (A)

VGS = 10V

VGS = 8V

VGS = 7V

VGS = 6V

VGS = 5V

VGS = 4V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX VDS ≥ 50V

PULSE DURATION = 80µs

TJ = 175oCTJ = 25oC

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

0.1

10-2

0 246810

DUTY CYCLE = 0.5% MAX

ID, DRAIN CURRENT (A)

4 8 12 16020

rDS(ON), DRAIN TO SOURCE

VGS = 20V

PULSE DURATION = 80µs

VGS = 10V

ON RESISTANCE (Ω)

DUTY CYCLE = 0.5% MAX

3.0

1.8

0.6

0 60 160 180-60 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED ON RESISTANCE

ID = 3.4A, VGS = 10V

2.4

1.2

0-40 -20 20 40 80 100 140120

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

IRF510

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

1.25

1.05

0.85

0 60 160 180-60 TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

ID = 250µA

1.15

0.95

0.75 -40 -20 20 40 80 100 140120

BREAKDOWN VOLTAGE

VDS, DRAIN TO SOURCE VOLTAGE (V)

C, CAPACITANCE (pF)

500

400

300

200

100

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

CISS

COSS

CRSS

12 5102 5

102

ID, DRAIN CURRENT (A)

2468010

2.5

2.0

1.5

1.0

gfs, TRANSCONDUCTANCE (S)

PULSE DURATION = 80µs

0.5

VDS ≥50V

TJ = 175oC

TJ = 25oC

DUTY CYCLE = 0.5% MAX

TJ = 175oC

TJ = 25oC

ISD, SOURCE TO DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

100

0.1

0 0.4 0.8 1.2 1.6 2.0

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

Qg, GATE CHARGE (nC)

2468010

VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 80V

VDS = 50V

VDS = 20V

ID = 3.4A

IRF510

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORM

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

IG(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRF510

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

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IRF510