VT Type 7.0 x 5.0 mm SMD PECL/LVDS Voltage Controlled Crystal Oscillator PECL Parameter Supply Voltage Variation (VDD) 5% Frequency Range Standard Frequency Absolute Pulling Range (APR) Control Voltage Range Supply Current 1.5MHz F0 < 65 MHz 65MHz F0 < 200 MHz Output Level Output High (Logic "1") Output Low (Logic "0") + Transition Time : Rise/ Fall Time Start Time Tri-State(Input to Pin 2 ) Enable(High voltage or floating) Disable(Low voltage or GND) Linearity Modulation Bandwidth (BW) Input Impedance RMS Phase Jitter(Integraged 12 KHz~20 MHz) F0 < 100MHz 100 MHz F0 < 125 MHz 125 MHz F0 < 150 MHz 150 MHz F0 Phase Noise 100 Hz 1 KHz 10 KHz o Aging ( @25 C 1st year) Storage Temp. Range LVDS 3.3V Min. 3.135 1.5 50 0.3 2.275 - 2.5V 3.3V Unit 2.5V Max. 3.465 200 Min. Max. Min. Max. Min. 2.375 2.625 3.135 3.465 2.375 65 200 1.5 200 65 77.76,106.25,122.88,125,155.52,156.25,200 50 50 50 3.0 0 2.5 0.3 3.0 0 75 75 45 100 100 80 1.475 1.6 1.68 1.095 0.9 0.9 1.0 1.0 1.0 3 3 3 - Max. 2.625 200 2.5 45 80 1.6 1.0 3 0.7VDD 25 50 0.3VDD 10 - 0.7VDD 25 50 0.3VDD 10 - 0.7VDD 25 50 0.3VDD 10 - 0.7VDD 25 50 0.3VDD 10 - -55 1 0.7 0.5 0.3 -80 -110 -133 3 125 -55 1 0.7 0.5 0.3 -80 -110 -133 3 125 -55 1 0.7 0.5 0.3 -80 -110 -133 3 125 -55 1 0.7 0.5 0.3 -80 -110 -133 3 125 V MHz ppm V mA nSec mSec V % KHz K pSec dBc/Hz ppm Rev(12)08/2012 www.taitien.com sales@taitien.com.tw Specifications subject to change without notice