September 1983
Revised February 1999
MM74HCU04 Hex Inverter
© 1999 Fairchild Semicond uctor Corpor ation DS005296.prf www.fairchildsemi.com
MM74HCU04
Hex Inver te r
General Descript ion
The MM74HCU04 inverters utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates wi th the low p ower con sumpti on of standa rd
CMOS integrated circuits.
The MM74HCU04 is an unbuffered inverter. It has high
noise immunity and the ability to drive 15 LS-TTL loads.
The 74HCU logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by inter-
nal diode clamps to VCC and ground.
Features
■Typical propagation delay: 7 ns
■Fanout of 15 LS-TTL loads
■Quiescent power consumption: 10 µA maximum at room
temperature
■Low input curre nt: 1 µA maximum
Ordering Code:
Devices also ava ilable in Tape and Reel. Speci fy by append ing the suffix let t er “X” to the o rdering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Schematic Diagram
Order Number Package Number Package Description
MM74HCU04M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74HCU04SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCU04MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HCU04N N14A 14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300” Wide
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MM74HCU04
Absolute Maximum Ratings(Note 1)
(Note 2) Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unles s ot herwise specified all v olt ages are referen c ed to ground.
Note 3: Power Dissipati on temperat ure deratin g — plastic “N” pa ckage: −
12 mW/°C from 65 °C to 85°C.
DC Electrical Characteristics (Note 4)
Note 4: For a po wer s upply of 5 V ±10% t he worst case ou tput volt ages ( VOH, and VOL) occur f or HC at 4.5V. Thus the 4.5V v alues sho uld be used wh en
designing with this supply. Worst case VIH and VIL occur at VCC = 5. 5V and 4. 5V respec t iv ely. (The VIH value at 5. 5V is 3.8 5V.) The worst c as e leakage cur-
rent (IIN, ICC, and IOZ) occur fo r C M OS at the hi gher voltage and so th e 6. 0V values s hould be used.
Supply Voltage (VCC)−0.5 to +7.0V
DC Input Voltage (VIN)−1.5 to VCC +1.5V
DC Output Voltage (VOUT)−0.5 to VCC +0.5V
Clamp Diode Current (IIK, IOK)±20 mA
DC Output Current, per pin (IOUT)±25 mA
DC VCC or GND Current, per pin (ICC)±50 mA
Stora ge Temperatu re R ang e (TSTG)−65°C to +150°C
Power Di ssipa tion (P D)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Tem perature (TL)
(Soldering 10 seconds) 260°C
Min Max Units
Supply Voltage (VCC)26V
DC Input or Output Voltage 0 VCC V
(VIN, VOUT)
Operating Temperature Range (TA)−40 +85 °C
Symbol Parameter Conditions VCC TA = 25°CT
A = −40 to 85°CT
A = −55 to 125°CUnits
Typ Guaranteed Limits
VIH Minimum HIGH Level 2.0V 1.7 1.7 1.7 V
Input V oltag e 4.5V 3.6 3.6 3.6 V
6.0V 4.8 4.8 4.8 V
VIL Maximum LOW Level 2.0V 0.3 0.3 0.3 V
Input V oltag e 4.5V 0.8 0.8 0.8 V
6.0V 1.1 1.1 1.1 V
VOH Minimum HIGH Level VIN = VIL
Output Voltage |IOUT| ≤ 20 µA 2.0V 2.0 1.8 1.8 1.8 V
4.5V 4.5 4.0 4.0 4.0 V
6.0V 6.0 5.5 5.5 5.5 V
VIN = GND
|IOUT| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V
|IOUT| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V
VOL Maximum LOW Level VIN = VIH
Output Voltage |IOUT| ≤ 20 µA 2.0V 0 0.2 0.2 0.2 V
4.5V 0 0.5 0.5 0.5 V
6.0V 0 0.5 0.5 0.5 V
VIN = VCC
|IOUT| ≤ 6.0 mA 4.5V 0.2 0.26 0.33 0.4 V
|IOUT| ≤ 7.8 mA 6.0V 0.2 0.26 0.33 0.4 V
IIN Maximum Input VIN = VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA
Current
ICC Maximum Quiescent VIN = VCC or GND 6.0V 2.0 20 40 µA
Supply Current IOUT = 0 µA
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MM74HCU04
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Note 5: CPD determ ines the no load dynamic po w er c onsump ti on, PD = CPD VCC2 f + ICC VCC, and the no load dy namic current co ns umption,
IS = CPD VCC f + ICC.
Typical Applications
FIGURE 1. Crystal Oscillator FIGURE 2. Stable RC Oscillator
FIGU RE 3. Schm i t t Trigger
Symbol Parameter Conditions Typ Guaranteed Units
Limit
tPHL, tPLH Maximum Propagation 7 13 ns
Delay
Symbol Parameter Conditions VCC TA=25°CT
A=−40 to 85°CT
A=−55 to 125°CUnits
Typ Guaranteed Limits
tPHL, tPLH Maximum Propagation 2.0V 49 82 103 120 ns
Delay 4.5V 9.9 16 21 24 ns
6.0V 8.4 14 18 20 ns
tTLH, tTHL Maximum Output Rise 2.0V 30 75 95 110 ns
and Fall Time 4.5V 8 15 19 22 ns
6.0V 7 13 16 19 ns
CPD Power Dissipation (per gate) 90 pF
Capacitance (Note 5)
CIN Maximum Input 8 15 15 15 pF
Capacitance
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MM74HCU04
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm W ide
Package Number M14D
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MM74HCU04
Physical Dim ensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Packag e Num be r MTC 14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74HCU04 Hex Inverter
LIFE SUPPORT POLIC Y
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r systems a re devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical compon ent i n any compon ent of a life su pport
device or system whose failure to perform can be rea-
sonabl y ex pect ed to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
