Revised January 2005 FST3244 8-Bit Bus Switch General Description The Fairchild Switch FST3244 provides 8-bits of highspeed CMOS TTL-compatible bus switching in a standard '244 pin-out. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device is organized as two 4-bit switches with separate OE inputs. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Features 4: switch connection between two ports. Minimal propagation delay through the switch. Low lCC. Zero bounce in flow-through mode. Control inputs compatible with TTL level. Ordering Code: Order Number Package Number Package Description FST3244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide FST3244QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide FST3244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide FST3244MTCX_NL (Note 1) MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Diagram Connection Diagram Truth Table Inputs Pin Descriptions Pin Name Description OE1, OE2 Bus Switch Enable 1A, 2A Bus A 1B, 2B Bus B (c) 2005 Fairchild Semiconductor Corporation DS500021 Inputs/Outputs OE1 OE2 1A, 1B L 2A, 2B L 1A 1B 2A L H 1A 1B H L Z H H Z 2B Z 2A 2B Z www.fairchildsemi.com FST3244 8-Bit Bus Switch June 1997 FST3244 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) 0.5V to 7.0V 0.5V to 7.0V DC Switch Voltage (VS) DC Input Voltage (VIN ) (Note 3) 0.5V to 7.0V 50mA DC Input Diode Current (lIK) VIN0V DC Output (IOUT ) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) Recommended Operating Conditions (Note 4) Power Supply Operating (VCC) 128mA 4.0V to 5.5V Input Voltage (VIN) 0V to 5.5V Output Voltage (VOUT) 0V to 5.5V Input Rise and Fall Time (tr, tf) / 100mA 65qC to 150 qC Switch Control Input 0nS/V to 5nS/V Switch I/O 0nS/V to DC Free Air Operating Temperature (TA) 40 qC to 85 qC Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 3: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VCC (V) Parameter TA 40 qC to 85 qC Typ (Note 5) Min Units Conditions Max 1.2 18mA VIK Clamp Diode Voltage VIH High Level Input Voltage 4.0-5.5 VIL Low Level Input Voltage 4.0-5.5 0.8 V II Input Leakage Current 5.5 r1.0 PA IOZ OFF-STATE Leakage Current 5.5 r1.0 PA 0 dA, B dVCC RON Switch On Resistance 4.5 4 7 : VIN 0V, IIN 64mA (Note 6) 4.5 4 7 : VIN 0V, IIN 30mA 4.5 8 15 : VIN 2.4V, IIN 15mA 4.0 11 20 : VIN 2.4V, IIN 15mA VCC or GND, IOUT 4.5 2.0 V IIN V 0d VIN d5.5V ICC Quiescent Supply Current 5.5 3 PA VIN ' ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V 0 Other inputs at VCC or GND Note 5: Typical values are at VCC 5.0V and T A 25qC Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 CL Symbol Parameter tPHL,tPLH Prop Delay Bus to Bus (Note 7) tPZH, tPZL Output Enable Time TA 40 qC to 85 qC, 50pF, RU RD 500: VCC 4.5 - 5.5V Min Max VCC 4.0V Min Units Output Disable Time Figure No. Figures 1, 2 Max 0.25 0.25 ns VI OPEN 5.6 6.1 ns VI 7V for tPZL 1.0 VI tPHZ, tPLZ Conditions 1.0 6.2 5.6 ns VI VI OPEN for tPZH 7V for tPLZ OPEN for tPHZ Figures 1, 2 Figures 1, 2 Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol CIN CI/O Note 8: TA (Note 8) Parameter Typ Max Units Conditions Control Pin Input Capacitance 3 pF VCC Input/Output Capacitance 5 pF VCC, OE 25qC, f 5.0V 5.0V 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 : source terminated in 50 : Note: C L includes load and stray capacitance Note: Input PRR 1.0 MHz, tW 500 nS FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FST3244 AC Electrical Characteristics FST3244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA20 www.fairchildsemi.com 4 FST3244 8-Bit Bus Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Technology Description The Fairchild Switch family derives from and embodies Fairchild's proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com