W83320G - Winbond Electronics - Datasheet.Directory

W83320S/W83320G

Publication Release Date: January 10, 2006

- 1 - Revision 0.51

Winbond

N-Channel FET Synchronous Buck

Regulator Controller

W83320S

W83320G

W83320S/W83320G

- 2 -

W83320S

Data Sheet Revision History

PAGES DATES VERSION VERSION

ON WEB MAIN CONTENTS

1 N.A. N.A. 0.50 N.A.

All version before 0.5 are for internal use

only.

2 N.A. N.A. 0.51 N.A. Add Pb-free part no :W83320G

Please note that all data and specifications are subject to change without notice. All the trademarks of

products and companies mentioned in this datasheet belong to their respective owners.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where

malfunction of these products can reasonably be expected to result in personal injury. Winbond

customers using or selling these products for use in such applications do so at their own risk and

agree to fully indemnify Winbond for any damages resulting from such improper use or sales.

W83320S/W83320G

Publication Release Date: January 10, 2006

- 3 - Revision 0.51

Table of Content-

1. GENERAL DESCRIPTION ......................................................................................................... 4

2. FEATURES ................................................................................................................................. 4

3. APPLICATIONS .......................................................................................................................... 4

4. PIN-OUT ..................................................................................................................................... 5

5. PIN DESCRIPTION..................................................................................................................... 6

6. INTERNAL BLOCK DIAGRAM ................................................................................................... 7

7. APPLICATION CIRCUIT............................................................................................................. 9

8. ELECTRICAL CHARACTERISTICS......................................................................................... 10

9. TYPICAL PERFORMANCE CHARACTERISTICS................................................................... 11

10. PACKAGE DIMENSION OUTLINE........................................................................................... 16

11. ORDERING INSTRUCTION ..................................................................................................... 17

12. HOW TO READ THE TOP MARKING...................................................................................... 17

W83320S/W83320G

- 4 -

1. GENERAL DESCRIPTION

The W83320S is a high-speed, N-Channel synchronous buck regulator controller optimized for wide

reference input range. The W83320S employs adjustable frequency ranging from 100 KHz to 400 KHz

voltage-mode PWM control architecture. The regulator is biased from a 5V rail and the power for the

high-side MOSFET can be supplied by a separate 12V rail or supplied from the internal charge pump.

A Current limit protection is implemented by monitoring the voltage drop across the switch ON

resistance of the low-side MOSFET. This method can eliminate the requirement of extra current

sensing resistor and avoids false trigger of OC protection when VIN varies efficiently. The adaptive

non-overlapping MOSFET gate drivers help avoid potential shoot-through problems while maintaining

high efficiency. All these together with Power-good flag, enable and soft start features make power

sequencing easy.

2. FEATURES

y 1.8V to 5V power stage input voltage

y Providing +/-1.5% reference voltage

y Power Good flag

y Current limit without sense resistor

y Soft start

y Switching frequency from 100 kHz to 400 kHz

y Tiny plastic SOP-14 package

3. APPLICATIONS

y DDR SDRAM and AGP core power for Desktop PC

y Set-Top Boxes/ Home Gateways

y Core Logic Regulators

y High-Efficiency Buck Regulation

W83320S/W83320G

Publication Release Date: January 10, 2006

- 5 - Revision 0.51

4. PIN-OUT

LGATE

VDD

VDDA

PWOK

GNDA

COMP

ISEN

GND

UGATE

BOOT

BG_REF

VREF

W83320S

W83320S/W83320G

- 6 -

5. PIN DESCRIPTION

PIN NAME FUNCTION

1 LGATE

Low-Side N-Channel MOSFET Gate Drive Pin. This pin is monitored by the

adaptive shoot-through protection circuitry to determine when the low-side

MOSFET turned off.

2 VDD +5V supply rail for the lower gate driver and control logic circuit.

3 VDDA VDDA: +5V supply rail for the chip.

4 PWROK

Power OK. Open drain output. This pin will be opened in following conditions:

1. No over-current detected; 2. VREF_IN >0.6V; 3. FB > 75% of VREF_IN; 4. SS

>3V.

5 GNDA Ground for analog circuit. Connect it to system ground.

6 SS

Soft Start Pin. A capacitor should be attached in this pin to ground for soft start

output clamping. This capacitor, along with an internal 12uA current source,

set the output clamp ramp up speed.

7 COMP Internal Error Amplifier Output Pin. This pin is available for compensation of

the control loop.

8 FB Inverting Input of the Error Amplifier. This pin is available for compensation of

the control loop.

9 VREF

Non-inverting Input of the Error Amplifier. Voltage on this pin provides

reference input to the PWM control loop.

When the VREF_IN voltage is less than 0.27V, the PWM is shut-down and the

H_DRV and L_DRV are driven low. Due to its wide input range (0 ~ 3.6V), the

VREF_IN voltage can be raised slowly to perform the input clamp function.

Besides, a special function is implemented in this IC to inform the reference

provider of over current alarm. Each time as the OC occurs, VREF_IN will be

short to GND (through 170 ohms) for about 5~10uS. The reference provider

can be aware of the OC condition by detecting this pulse.

10 BG_REF Internal Bandgap Reference Voltage Output.

11 BOOT Supply rail for the high-side MOSFET driver. A bootstrap circuit may be used

to create a BOOT voltage or a separate 12V supply can be used.

12 UDRV

High-Side N-Channel MOSFET Gate Drive Pin. This pin is also monitored by

the adaptive shoot through protection circuitry to determine when the high-side

MOSFET has turned off.

13 GND Ground for signal level circuit. Connect it to system ground.

14 ISEN

Current limit threshold setting. Connect a resistor (ROCSET) between this pin

and the drain of the low-side MOSFET. An internal 72uA current source will

flow through RISEN and cause a fixed voltage drop on it while the low-side

MOSFET is turned on. In the mean while, the W83320S compares the voltage

drop with the voltage across the low-side MOSFET and determines whether

the current limit has been reached. The equation for over-current limit is:

ILIM = (72uA * RISEN)/RDSON

W83320S/W83320G

Publication Release Date: January 10, 2006

- 7 - Revision 0.51

6. INTERNAL BLOCK DIAGRAM

Soft Start

Logic

Control

Logic

POR

VDDA VDD

Output

Clamp

IREF & VREF Oscillator

VREF

COMP

BG_REF

0.6V

X0.7

Gate

Control

Logic

VDD

GND GNDA

LGATE

UGATE

BOOT

12µA 72µA

. ..

W83320S/W83320G

- 8 -

Soft-Start

When VDDA and VDD ramp over 4.3V and the voltage at pin VREF ramps over 0.27V; the soft start

capacitor begins to charge through an internal 12uA (IREF/2) current source. The error amplifier (and

the PWM duty) is both output clamped by the voltage on soft-start pin VSS and input clamped by the

voltage on VREF. There are two ways to soft start the power that’s following the rising of the slower one

between VSS or VREF; during soft-start, PWOK is forced to low and the internal Over-Current Protection

is triggered to work. 0.4V to 1.9V of VSS is roughly mapping to 0 to 100% pulse-width. Smaller than

0.27V on VREF will disable the PWM controller and discharge CSS.

MOSFET Gate Drivers

The power for the high-side driver is flowing through the BOOT pin. This voltage can be supplied by a

separate, higher voltage source, or supplied from a local charge pump structure or combination of the

two.

Since the voltage of the low-side MOSFET gate and the high-side MOSFET gate are being monitored

to determine the state of the MOSFET, it should be taken carefully to add external components

between the gate drivers and their respective MOSFET gates. Doing so may interfere with the shoot-

through protection.

Current Limit

Current limit is implemented by sensing the voltage across the low-side MOSFET while it is ON. This

method enhances the converter's efficiency and reduces total cost by eliminating a current sensing

resistor.

While low-side MOSFET is turned on, a constant current of 72uA (IREF X 3) is forced through

ROCSET which is an external resistor connected between phase and ISEN, causing a fixed voltage

drop. This fixed voltage is compared against VDS and if the latter is higher, the chip enters current

limit mode. In the current limit mode both the high-side and low-side MOSFETS are turned off and the

soft start capacitor CSS will be discharged immediately. The VREF is shorted to GND for 5~10uS to

indicate the over current condition. After a 5mS delay, a soft-start cycle is initiated. If the cause of the

over-current is still present after the delay interval, the current limit would be triggered again. The shut

down - delay - soft start cycle will be repeated indefinitely until the over-current event been removed.

Input Tracking

When the VREF voltage is less than 0.3V, the PWM is shut-down and the UGATE and LGATE are

driven low. Due to its wide input range (0 ~ 3.6V), this chip is suitable for reference input tracking

application. But note that the chip will be shut-down when VREF <0.27V, a proper setting of CSS is

needed to clamp the output at initiation of start up and avoid output voltage step-up ( and so a large

inrush current).

IREF and PWM Clock

The Internal reference current (IREF) is determined by the resistor between pin BG_REF pin and

GND (RSET) according to the following equation:

IREF = 1.19V/Rset

The nominal 200 kHz PWM clock can be adjusted ranging form 100 kHz to 400 kHz by changing IREF

according to the following equation:

Freq = 200 KHz * IREF / 24uA;

W83320S/W83320G

Publication Release Date: January 10, 2006

- 9 - Revision 0.51

7. APPLICATION CIRCUIT

W83320S/W83320G

- 10 -

8. ELECTRICAL CHARACTERISTICS

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

VCC SUPPLY CURRENT

Nominal Supply ICC EN=VCC; UGATE and LGATE Open - 3 - mA

POWER-ON RESET

Rising VDD

Threshold - 4.3 - V

Falling VDD

Threshold - 3.7 - V

REFIN Enable - 0.27 - V

OSCILLATOR

Free Running

Frequency R

SET=49.6K 160 200 240 kHz

Ramp Amplitude ΔVOSC RSET=49.6K - 1.5 - VP-P

REFERENCE

Reference Voltage

Tolerance VREF -1.5 - 1.5 %

Reference Voltage - 1.19 - V

ERROR AMPLIFIER

DC Gain - 80 - dB

Gain-Bandwidth - 5 - MHz

Slew Rate - 4 - V/µS

GATE DRIVERS

High-side Gate

Source IHGATE-SRC VBOOT=12V,VUGATE=6V 250 - - mA

High-side Gate Sink IHGATE-SNK VBOOT=12V,VUGATE=6V 600 - - mA

Low-side Gate

Source ILGATE-SRC VCC=5V, VLGATE=2.5V 250 - - mA

Low-side Gate Sink ILGATE-SNK VCC=5V, VLGATE=2.5V 300 - - mA

PROTECTION

ISEN Current

Source ISEN 64 72 80 µA

Soft-Start Current ISS 10 12 14 µA

W83320S/W83320G

Publication Release Date: January 10, 2006

- 11 - Revision 0.51

9. TYPICAL PERFORMANCE CHARACTERISTICS

- Power start up with condition: no loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200 KHz.

Ch1: VCC

Ch2: VREF

Ch3: VOUT

Ch4: PWRO

- Power shut down with condition: no loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200 KHz.

Ch1: VCC

Ch2: VREF

Ch3: VOUT

Ch4: PWRO

W83320S/W83320G

- 12 -

- High gate switch off with condition: no loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200

KHz.

- High gate switch off with condition: 2Amp loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200

KHz.

Ch1: UGATE

Ch2: LGATE

Ch3: Phase

Ch1: UGATE

Ch2: LGATE

Ch3: Phase

W83320S/W83320G

Publication Release Date: January 10, 2006

- 13 - Revision 0.51

- High gate switch on with condition: no loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200

KHz.

- High gate switch on with condition: no loading; CSS=0.1uF; VCC=5V; VOUT=2.5V; f = 200

KHz.

Ch1: UGATE

Ch2: LGATE

Ch3: Phase

Ch1: UGATE

Ch2: LGATE

Ch3: Phase

W83320S/W83320G

- 14 -

- Load transient response with condition: 0.5Amp to 5.5Amp; CSS=0.1uF; VIN=5V; VOUT=2.5V;

f = 200 KHz.

- Load transient response with condition: 5.5Amp to 0.5Amp; CSS=0.1uF; VIN=5V; VOUT=2.5V;

f = 200 KHz.

Ch1: IOUT

Ch4: VOUT

Ch1: VOUT

Ch4: IOUT

W83320S/W83320G

Publication Release Date: January 10, 2006

- 15 - Revision 0.51

- Output load transient response with condition: IOUT=2Amp; CSS=0.1uF; VIN=5V; VOUT=2.5V;

f = 200 KHz.

Ch1: VOUT

Ch4: IOUT

- Regulation efficiency with various loading

Efficiency(Vin=5V,Vout=2.5V)

92.59

94.34 94.34 93.9

93.28 92.59

91.6290.9 90

123456789

Output current(A)

Efficiency(%)

W83320S/W83320G

- 16 -

10. PACKAGE DIMENSION OUTLINE

14L SOP (150mil)

SEATING PLANE

0.25

GAUGE PLANE

Control demensions are in milmeters .

4.00

0.25

0.51

0.25

3.80

0.19

0.33

0.10

0.157

0.010

0.020

0.010

0.150

0.008

0.013

0.004

MAX.

DIMENSION IN MM

1.75

SYMBOL MIN.

1.35

DIMENSION IN INCH

0.069

MIN.

0.053

MAX.

1.27

0.10

6.20

0.40

5.80

e1.27 BSC

0.050

0.004

0.244

0.016

0.228

0.050 BSC

D8.55 8.75 0.337 0.344

14 8

W83320S/W83320G

Publication Release Date: January 10, 2006

- 17 - Revision 0.51

11. ORDERING INSTRUCTION

PART NO. PACKAGE REMARKS

W83320S 14-pin SOP

Operation - Commercial 0~70℃

W83320G 14-pin SOP Operation - Commercial 0~70℃,Pb-free package

12. HOW TO READ THE TOP MARKING

Left Line: Winbond Logo

1st Line: Part No – W83320S,W83320G(Pb-free part no)

2nd Line: IC Tracking Code

3rd Line: Manufacturing Date Code (X XX) + Assembly Code (X) + IC Version (X)

W83320G

2322906Z-N

323GA

W83320S

2322906Z-N

323GA

W83320S/W83320G

- 18 -

Please note that all data and specifications are subject to change without notice. All the trade

marks of products and companies mentioned in this data sheet belong to their respective

owners.

Important Notice

Winbond products are not designed, intended, authorized or warranted for use as components

in systems or equipment intended for surgical implantation, atomic energy control

instruments, airplane or spaceship instruments, transportation instruments, traffic signal

instruments, combustion control instruments, or for other applications intended to support or

sustain life. Further more, Winbond products are not intended for applications wherein failure

of Winbond products could result or lead to a situation wherein personal injury, death or

severe property or environmental damage could occur.

Winbond customers using or selling these products for use in such applications do so at their

own risk and agree to fully indemnify Winbond for any damages resulting from such improper

use or sales.