NCP59748
www.onsemi.com
8
APPLICATIONS INFORMATION
The NCP59748 dual−rail very low dropout voltage
regulator is using NMOS pass transistor for output voltage
regulation from VIN voltage. All the low current internal
controll circuitry is powered from the VBIAS voltage.
The use of an NMOS pass transistor offers several
advantages in applications. Unlike a PMOS topology
devices, the output capacitor has reduced impact on loop
stability. Vin to Vout operating voltage difference can be
very low compared with standard PMOS regulators in very
low Vin applications.
The NCP59748 offers programmable smooth monotonic
start-up. The controlled voltage rising limits the inrush
current what is advantageous in applications with large
capacitive loads. The Voltage Controlled Soft−Start timing
is programmable by external Css capacitor value.
The Enable (EN) input is equipped with internal
hysteresis and deglitch filter.
Open Dr a i n t y p e Power Good (PG) output is available for
Vout monitoring and sequencing of other devices.
NCP58748 is a Adjustable linear regulator. The required
Output voltage can be adjusted by two external resistors.
Typical application schematics is shown in Figure 16.
Figure 16. Typical Application Schematics
VOUT +0.8 ǒ1)R1ńR2Ǔ
Dropout Voltage
Because of two power supply inputs VIN and VBIAS and
one VOUT regulator output, there are two Dropout voltages
specified.
The first, the VIN Dropout voltage is the voltage
difference (VIN – VOUT) when VOUT starts to decrease by
percents specified in the Electrical Characteristics table.
VBIAS is high enough, specific value is published in the
Electrical Characteristics table.
The second, VBIAS dropout voltage is the voltage
difference (VBIAS – VOUT) when VIN and VBIAS pins are
joined together and VOUT starts to decrease.
Input and Output Capacitors
The device is designed to be stable for all available types
and values of output capacitors ≥ 2.2 mF. The device is also
stable with multiple capacitors in parallel, which can be of
any type or value.
In applications where no low input supplies impedance
available (PCB inductance in VIN and/or VBIAS inputs as
example), the recommended CIN and CBIAS value is 1 mF or
greater. Ceramic or other low ESR capacitors are
recommended. For the best performance all the capacitors
should be connected to the NCP59748 respective pins
directly in the device PCB copper layer, not through vias
having not negligible impedance.
Enable Operation
The enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table i n this data sheet. If the enable function is not to be used
then the pin should be connected to VIN or VBIAS.
The NCP59748 device is equipped with Output Active
Discharge transistor that is pulling the output to GND
through a n 1.2 kW (typ.) resistor when the device is disabled.
To get the full functionality of Soft−Start, it is
recommended t o turn on the VIN and VBIAS supply voltages
first and activate the Enable pin no sooner than VIN and
VBIAS are on their nominal levels.
Output Noise
When the NCP59748 device reaches the end of the
Soft−Start cycle, the Soft Start capacitor is switched to serve
as a Noise filtering capacitor.
Output Voltage Adjust
The output voltage can be adjusted from 0.8 V to 3.6 V
using resistors divider between the output and the FB input.
Recommended resistor values for frequently used voltages
can be found in the Table 7.
Programmable Soft−Start
The Soft-Start ramp time depends on the Soft−Start
charging current ISS, Soft-Start capacitor value CSS and
internal reference voltage VREF.
The Soft–Start time can be calculated using following
equations:
tss = CSS x (VREF / ISS) [s, F,V,A]
or in more practical units
tSS = CSS x 0.8V / 0.44 = CSS x 1.82
where
tss = Soft−Start time in miliseconds
CSS = Soft−Start capacitor value in nano Farads
Capacitor values for frequently used Soft-Start times can be
found in the Table 8.
The maximal recommended value of CSS capacitor is
15 nF. For higher CSS values the capacitor full discharging
before new Soft-Start cycle is not guaranteed.
Power Good
Power−Good (PG) is an open−drain, active−high output
that indicates the status of VOUT. When VOUT exceeds the
PG trip threshold, the PG pin goes into a high−impedance
state. When VOUT is below this threshold the pin is driven
to a low−impedance state. A pull−up resistor from 10 kW to