FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
©2003 Semiconductor Components Industries, LLC.
September-2017, Rev. 3
Publication Order Number:
FQP13N50C-F105/D
FQP13N50C / FQPF13N50C
N-Channel QFET® MOSFET
500 V, 13 A, 480 mΩ
Description
These N-Channel enhancement mode power field effect
transistors are produced using ON Semiconductor’s
proprietary, planar stripe, DMOS technology. This
advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
•13 A, 500 V, RDS(on) = 480 mΩ (Max.) @ VGS = 10 V,
ID = 6.5 A
•Low Gate Charge (Typ. 43 nC)
•Low Crss (Typ. 20 pF)
•100% Avalanche Tested
TO-220
GDSTO-220F
GDS
G
S
D
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol Parameter FQP13N50C FQPF13N50C Units
VDSS Drain-Source Voltage 500 V
IDDrain Current - Continuous (TC = 25°C) 13 13 * A
- Continuous (TC = 100°C) *88 A
IDM Drain Current - Pulsed (Note 1) 52 52 * A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 860 mJ
IAR Avalanche Current (Note 1) 13 A
EAR Repetitive Avalanche Energy (Note 1) 19.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PDPower Dissipation (TC = 25°C) 195 48 W
- Derate above 25°C 1.56 0.39 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter FQP13N50C FQPF13N50C Units
RθJC Thermal Resistance, Junction-to-Case, Max. 0.64 2.58 °C/W
RθJS Thermal Resistance, Case-to-Sink, Typ. 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W
Package Marking and Ordering Information
Part Number Top Mark Package Reel Size Tape Width Quantity
FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET

1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 6 mH, IAS = 13 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25oC.
3. ISD ≤ 13 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC.
4. Essentially independent of operating temperature.
Packing Method
FQP13N50C-F105 FQP13N50C TO-220 N/A N/A 50 units
Tube
Electrical Characteristics TC = 25oC unless otherwise noted.
FQPF13N50C-F105 FQPF13N50C TO-220F N/A N/A 50 units
Tube
Symbol Parameter Test Conditions Min Typ Max Unit
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA500 -- -- V
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.5 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 1 µA
VDS = 400 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA2.0 -- 4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 6.5 A -- 0.39 0.48 Ω
gFS Forward Transconductance VDS = 40 V, ID = 6.5 A -- 15 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 1580 2055 pF
Coss Output Capacitance -- 180 235 pF
Crss Reverse Transfer Capacitance -- 20 25 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 250 V, ID = 13 A,
RG = 25 Ω
(Note 4)
-- 25 60 ns
trTurn-On Rise Time -- 100 210 ns
td(off) Turn-Off Delay Time -- 130 270 ns
tfTurn-Off Fall Time -- 100 210 ns
QgTotal Gate Charge VDS = 400 V, ID = 13 A,
VGS = 10 V
(Note 4)
-- 43 56 nC
Qgs Gate-Source Charge -- 7.5 -- nC
Qgd Gate-Drain Charge -- 18.5 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 13 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 52 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 13 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 13 A,
dIF / dt = 100 A/µs
-- 410 -- ns
Qrr Reverse Recovery Charge -- 4.5 -- µC
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FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
 !
10-1 0101
0
500
1000
1500
2000
2500
3000 Ciss = C gs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
10
VDS, Drain-Source Voltage [V]
0 01 0320 04 50
0
2
4
6
8
10
12
VDS = 250 V
VDS = 100V
VDS = 400 V
※ Note : ID = 13A
VGS, Gate-Source Voltage [V]
QG, T o ta l G a te Ch a rge [nC]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
101
150℃
※ Note s :
1. V GS = 0V
2. 250μs Pu lse Te st
25℃
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 5 10 15 20 25 30 35
0.5
1.0
1.5
VGS = 20V
VGS = 10V
※ Note : TJ = 25℃
RDS(ON) [Ω],
Drain-Source O n-Resistance
ID, Drain Current [A]
Figure 5. Capacitance Charac te ri st i cs Figure 6. Gate Char ge Ch a racteristics
Figure 3. On-Resistanc e Variation vs
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation with Sour ce Cur r ent
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Charact er i st ics
10-1 0101
10-1
100
101
V GS
Top : 1 5.0 V
1 0 .0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : : .5 V
※ Note s :
1. 250μs Pu lse Tes t
2. T C = 25℃
ID, Drain Current [A]
10
VDS, Drain-Source Voltage [V]
24 810
10-1
100
101
150oC
25oC-55oC
※ Notes :
1 . V DS = 40V
2 . 2 5 0μs Pulse Test
ID, D r a in Cu rre n t [A]
6
VGS, G ate-Source Voltage [V]
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FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
 ! (continued)
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※ No te s :
1. VGS = 10 V
2. ID = 6.5 A
RDS(ON) , (Normalized)
Drain-Source On-Resistance
TJ, Junction Tem perature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※
N o te s :
1 . V GS = 0 V
2 . ID = 250 μA
BV DSS , (No r ma liz e d )
Drain-Source Breakdown Voltage
TJ, Junction Tem perature [oC]
100101102103
10-1
100
101
102
100 m s
10 µs
DC
10 m s
1 m s
100 µs
Operation in This Area
is Limited by R DS(on)
※ No te s :
1. T C = 25 oC
2. T J = 150 oC
3. Single Pulse
ID, D ra in Cu rre n t [A]
VDS, Drain-Source Voltage [V] 100101102103
10-2
10-1
100
101
102
100 ms
10 µs
DC
10 ms1 ms
100 µs
Operation in This Area
is Limited by R DS(on)
※ Note s :
1. T C = 25 oC
2. T J = 150 oC
3. Single Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Figure 9 -1. M aximum Safe O per at in g A re a
for FQP13N50C
Figure 10. Maximu m Drain Current
vs Case Temperat ure
Figu re 7. Breakdown Vol ta ge Variation
vs Temperature Figure 8. On-Resistance Variation
vs Temperature
Figure 9-2. Ma xi m um Saf e O perating Area
for FQPF 13N50C
25 50 75 100 125 150
0
2
4
6
8
10
12
14
ID, Drain Current [A]
TC, Case Tem perature [℃
]
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FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
 ! (continued)
ZθJC(t), Thermal Response [oC/W]
t1, Square Wave P ulse D uration [sec]
Figure 11 -1 . Transient Thermal Response Cur ve for FQP1 3N50C
t1, Square Wave P ulse D uration [sec]
Figure 1 1-2. Transient Thermal Response Curve for FQPF13N50C
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
※ Notes :
1 . ZθJC(t) = 0.64 ℃/W Ma x .
2 . D u ty Fa c to r , D=t1/t2
3 . TJM - T C = Z PDM * θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
※ Notes :
1 . ZθJC(t) = 2.58 ℃/W Ma x .
2 . D ut y F ac to r , Z
1
D= t /t2
3 . TJM - T C P = DM *θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
t1
PDM
t2
t1
PDM
t2
ZθJC(t), Thermal Response [oC/W]
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Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
IG = const.
FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
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Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
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FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
Mechanical Dimensions
Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB
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any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
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FQP13N50C / FQPF13N50C — N-Channel QFET® MOSFET
Mechanical Dimensions
Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
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