FEATURES Triaxis digital gyroscope, 300/sec Tight orthogonal alignment: 0.05 Triaxis digital accelerometer: 18 g Delta-angle/velocity calculations Wide sensor bandwidth: 330 Hz High sample rate: 2.460 kSPS Autonomous operation and data collection No external configuration commands required Startup time: 500 ms Factory-calibrated sensitivity, bias, and axial alignment Calibration temperature range: -40C to +85C SPI-compatible serial interface Embedded temperature sensor Programmable operation and control Automatic and manual bias correction controls 4 FIR filter banks, 120 configurable taps Digital I/O: data-ready, alarm indicator, external clock Alarms for condition monitoring Power-down/sleep mode for power management Enable external sample clock input: up to 2.25 kHz Single-command self test Single-supply operation: 3.3 V 2000 g shock survivability Operating temperature range: -40C to +105C APPLICATIONS Precision instrumentation Platform stabilization and control Industrial vehicle navigation Downhole instrumentation Robotics FUNCTIONAL BLOCK DIAGRAM TEMPERATURE SENSOR TRIAXIS MEMS ANGULAR RATE SENSOR CS SIGNAL CONDITIONING AND CONVERSION CALIBRATION AND DIGITAL PROCESSING OUTPUT REGISTERS AND SPI INTERFACE SCLK DIN DOUT TRIAXIS MEMS ACCELERATION SENSOR VDDRTC ALARMS SELF-TEST DIGITAL CONTROL POWER MANAGEMENT VCC GND ADIS16375 RST DIO1 DIO2 DIO3 DIO4 09389-001 Data Sheet Low Profile, Low Noise Six Degrees of Freedom Inertial Sensor ADIS16375 Figure 1. GENERAL DESCRIPTION The ADIS16375 iSensor(R) is a complete inertial system that includes a triaxis gyroscope and triaxis accelerometer. Each sensor in the ADIS16375 combines industry-leading iMEMS(R) technology with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyro bias). As a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements over a temperature range of -40C to +105C. The ADIS16375 provides a simple, cost-effective method for integrating accurate, multiaxis, inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. An improved SPI interface and register structure provide faster data collection and configuration control. This compact module is approximately 44 mm x 47 mm x 14 mm and provides a flexible connector interface that enables multiple mounting orientation options. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2010-2012 Analog Devices, Inc. All rights reserved. ADIS16375 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Digital Signal Processing ............................................................... 17 Applications ....................................................................................... 1 Sampling Plan ............................................................................. 17 Functional Block Diagram .............................................................. 1 Averaging/Decimation Filter .................................................... 17 General Description ......................................................................... 1 FIR Filter Banks .......................................................................... 17 Revision History ............................................................................... 2 Calibration ....................................................................................... 19 Specifications..................................................................................... 3 Alarms .............................................................................................. 22 Timing Specifications .................................................................. 5 System Controls .............................................................................. 23 Absolute Maximum Ratings ............................................................ 6 Global Commands ..................................................................... 23 ESD Caution .................................................................................. 6 Memory Management ............................................................... 23 Pin Configuration and Function Descriptions ............................. 7 General-Purpose I/O ................................................................. 24 Typical Performance Characteristics ............................................. 8 Power Management.................................................................... 24 Basic Operation................................................................................. 9 Applications Information .............................................................. 26 Register Structure ......................................................................... 9 Prototype Interface Board ......................................................... 26 SPI Communication ................................................................... 10 Installation Tips .......................................................................... 26 Device Configuration ................................................................ 10 Outline Dimensions ....................................................................... 27 Reading Sensor Data .................................................................. 10 Ordering Guide .......................................................................... 27 User Registers .................................................................................. 11 Output Data Registers .................................................................... 13 REVISION HISTORY 8/12--Rev. B to Rev. C Changes to Features Section and General Description Section . 1 Changes to Table 2 ............................................................................ 5 Changes to Table 3 ............................................................................ 6 Changes to Basic Operation Section .............................................. 9 Changes to Dual Memory Structure Section .............................. 10 Changes to Acceleration Section and Delta Angles Section ..... 14 Changes to Figure 18 ...................................................................... 17 Changes to Table 71 to Table 76 ................................................... 20 Changes to Restoring Factory Calibration Section, Linear Acceleration on Effect on Gyroscope Bias Section, and Point of Percussion Alignment Section ...................................................... 21 Changes to Table 88 ........................................................................ 22 Changes to Automatic Self Test Section, Memory Management Section, and Flash Memory Test Section..................................... 23 Changes to General Purpose I/O Control Section ..................... 24 Changes to Real-Time Clock Configuration/Data Section ...... 25 Changes to Prototype Interface Board and Figure 23................ 26 Updated Outline Dimensions ....................................................... 28 Changes to Ordering Guide .......................................................... 28 7/11--Rev. A to Rev. B Changes to Accelerometers, Nonlinearity Parameter and Power Supply, VDD Parameter in Table 1 .................................................3 Changes to tCLS, tCHS, t2, and t3 Parameters in Table 2 ....................5 Changed Angular Displacement Heading to Delta Angles ...... 14 Changes to Delta Angles Section.................................................. 14 Changes to Table 28 and Velocity Changes Section................... 15 Change to Figure 18 ....................................................................... 17 Changes to Data-Ready Indicator Section and Input Sync/Clock Control Section ............................................................................... 24 Moved Real-Time Clock Configuration/Data Section, Table 96, Table 97, and Table 98 .................................................................... 25 Changes to Real-Time Clock Configuration/Data Section ...... 25 Changes to Prototype Interface Board Section .......................... 26 2/11--Rev. 0 to Rev. A Changes to Gyroscopes Misalignment and Accelerometers Misalignment Test Conditions/Comments, Table 1 .....................3 Added Endnote 7 ...............................................................................4 Changes to Table 54 and Table 55 ................................................ 17 Changes to Table 57, Table 58, and Table 59............................... 18 10/10--Revision 0: Initial Version Rev. C | Page 2 of 28 Data Sheet ADIS16375 SPECIFICATIONS TA = 25C, VDD = 3.3 V, angular rate = 0/sec, dynamic range = 300/sec 1 g, unless otherwise noted. Table 1. Parameter GYROSCOPES Dynamic Range Sensitivity 1 Initial Sensitivity Tolerance Sensitivity Temperature Coefficient Misalignment Nonlinearity Initial Bias Error In-Run Bias Stability Angular Random Walk Bias Temperature Coefficient Linear Acceleration Effect on Bias Output Noise Rate Noise Density 3 dB Bandwidth Sensor Resonant Frequency ACCELEROMETERS Dynamic Range Sensitivity1 Initial Sensitivity Tolerance Sensitivity Temperature Coefficient Misalignment Nonlinearity Initial Bias Error In-Run Bias Stability Velocity Random Walk Bias Temperature Coefficient Output Noise Noise Density 3 dB Bandwidth Sensor Resonant Frequency TEMPERATURE SENSOR Scale Factor LOGIC INPUTS 2 Input High Voltage, VIH Input Low Voltage, VIL CS Wake-Up Pulse Width Logic 1 Input Current, IIH Logic 0 Input Current, IIL All Pins Except RST RST Pin Input Capacitance, CIN DIGITAL OUTPUTS Output High Voltage, VOH Output Low Voltage, VOL Test Conditions/Comments Min Typ 300 350 0.01311 16-bit resolution, x_GYRO_OUT registers only Max 1 -40C TA +85C Axis-to-axis Axis-to-frame (package) Best-fit straight line 1 1 1 -40C TA +85C Any axis, 1 (GEN_CONFIG[7] = 1) No filtering f = 25 Hz, no filtering 40 0.05 1.0 0.025 1.0 12 1.0 0.005 0.013 0.45 0.02 330 14.5 Unit /sec /sec/LSB % ppm/C Degrees Degrees % of FS /sec /hr /hr /sec/C /sec/g /sec rms /sec/Hz rms Hz kHz Each axis 16-bit resolution, x_ACCL_OUT registers only 0.8192 -40C TA +85C Axis-to-axis Axis-to-frame (package) Best-fit straight line, 10 g Best-fit straight line, 18 g 1 1 1 -40C TA +85C No filtering No filtering 25 0.035 1.0 0.1 0.5 16 0.13 0.076 0.1 1.5 0.06 330 5.5 g mg/LSB % ppm/C Degrees Degrees % of FS % of FS mg mg m/sec/hr mg/C mg rms mg/Hz rms Hz kHz Output = 0x0000 at 25C (5C) 0.00565 C/LSB 18 1 2.0 0.8 20 VIH = 3.3 V VIL = 0 V 10 10 0.33 10 ISOURCE = 0.5 mA ISINK = 2.0 mA 2.4 0.4 Rev. C | Page 3 of 28 V V s A A mA pF V V ADIS16375 Parameter FLASH MEMORY Data Retention 4 FUNCTIONAL TIMES 5 Power-On Startup Time Reset Recovery Time Sleep Mode Recovery Time Flash Memory Update Time Flash Memory Test Time Automatic Self Test Time CONVERSION RATE Initial Clock Accuracy Temperature Coefficient Sync Input Clock POWER SUPPLY, VDD Power Supply Current 7 POWER SUPPLY, VDDRTC Real-Time Clock Supply Current Data Sheet Test Conditions/Comments Endurance 3 TJ = 85C Time until data is available Min 100,000 20 1 Max 500 500 500 375 50 10 2.46 0.02 40 Using internal clock, 100 SPS Operating voltage range Normal mode, VDD = 3.3 V Sleep mode, VDD = 3.3 V Power-down mode, VDD = 3.3 V Operating voltage range Normal mode, VDDRTC = 3.3 V Typ 0.7 6 3.0 2.25 3.6 173 12.3 120 3.3 13 Unit Cycles Years ms ms s ms ms ms kSPS % ppm/C kHz V mA mA A V A Each gyroscope and accelerometer has 32 bits of available resolution. The 16-bit sensitivity shown reflects the register that contains the upper 16 bits of the sensor output. Divide this number by 2 for every bit added to this resolution in downstream processing routines. The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant. 3 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at -40C, +25C, +85C, and +125C. 4 The data retention lifetime equivalent is at a junction temperature (TJ) of 85C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction temperature. 5 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy. 6 The 0.7 kHz lower limit is established to support Nyquist sampling criteria for the 330 Hz sensor bandwidth. 7 During startup, the power supply current increases and experiences transient behaviors for a period of 400 s. The peak current during the 400 s transient period can reach 1500 mA. 2 Rev. C | Page 4 of 28 Data Sheet ADIS16375 TIMING SPECIFICATIONS TA = 25C, VDD = 3.3 V, unless otherwise noted. Table 2. Description Serial clock Stall period between data Serial clock low period Serial clock high period Chip select to clock edge tDAV tDSU tDHD tDR, tDF tDSOE tHD tSFS tDSHI t1 t2 t3 DOUT valid after SCLK edge DIN setup time before SCLK rising edge DIN hold time after SCLK rising edge DOUT rise/fall times, 100 pF loading CS assertion to data out active SCLK edge to data out invalid Last SCLK edge to CS deassertion CS deassertion to data out high impedance Input sync pulse width Input sync to data-ready output Input sync period 1 Normal Mode Typ Min 1 0.01 2 31 31 32 Parameter fSCLK tSTALL tCLS tCHS tCS Max 15 Unit MHz s ns ns ns 10 ns ns ns ns ns ns ns ns s s s 2 2 3 8 11 0 0 32 0 5 9 430 440 Guaranteed by design and characterization but not tested in production. Timing Diagrams CS tCHS tCS 1 3 2 tCLS 4 tSFS 6 5 15 16 SCLK DOUT MSB tDAV DB14 tHD DIN R/W A6 DB12 DB11 A4 A3 DB13 tDSU tDSHI DB2 DB10 DB1 LSB tDHD A5 A2 D2 D1 09389-002 tDSOE LSB Figure 2. SPI Timing and Sequence tSTALL 09389-003 CS SCLK Figure 3. Stall Time and Data Rate t3 t2 t1 SYNC CLOCK (CLKIN) OUTPUT REGISTERS DATA VALID DATA VALID Figure 4. Input Clock Timing Diagram Rev. C | Page 5 of 28 09389-004 DATA READY ADIS16375 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Acceleration Any Axis, Unpowered Any Axis, Powered VCC to GND Digital Input Voltage to GND Digital Output Voltage to GND Operating Temperature Range Storage Temperature Range 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rating 2000 g 2000 g -0.3 V to +3.6 V -0.3 V to VCC + 0.2 V -0.3 V to VCC + 0.2 V -40C to +105C -65C to +150C1 Table 4. Package Characteristics Extended exposure to temperatures outside the specified temperature range of -40C to +105C can adversely affect the accuracy of the factory calibration. For best accuracy, store the parts within the specified operating range of -40C to +105C. Package Type 24-Lead Module (ML-24-3) ESD CAUTION Rev. C | Page 6 of 28 JA 20.5 JC 6.3 Device Weight 25 g Data Sheet ADIS16375 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADIS16375 DNC DNC DNC GND VDD VDD RST CS DOUT DIO4 20 18 16 14 12 10 8 6 4 2 23 21 19 17 15 13 11 9 7 5 3 1 DNC DNC DNC GND GND VDD DIO2 DIN SCLK DIO3 NOTES 1. THIS REPRESENTATION DISPLAYS THE TOP VIEW PINOUT FOR THE MATING SOCKET CONNECTOR. 2. THE ACTUAL CONNECTOR PINS ARE NOT VISIBLE FROM THE TOP VIEW. 3. MATING CONNECTOR: SAMTEC CLM-112-02 OR EQUIVALENT. 4. DNC = DO NOT CONNECT. 09389-005 DNC 22 DIO1 DNC 24 VDDRTC TOP VIEW (Not to Scale) 09389-006 Figure 5. Mating Connector Pin Assignments PIN 23 PIN 1 Figure 6. Axial Orientation (Top Side Facing Up) Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10, 11, 12 13, 14, 15 16 to 22, 24 23 Mnemonic DIO3 DIO4 SCLK DOUT DIN CS DIO1 RST DIO2 VDD GND DNC VDDRTC Type Input/Output Input/Output Input Output Input Input Input/Output Input Input/Output Supply Supply Not applicable Supply Description Configurable Digital Input/Output. Configurable Digital Input/Output. SPI Serial Clock. SPI Data Output. Clocks output on SCLK falling edge. SPI Data Input. Clocks input on SCLK rising edge. SPI Chip Select. Configurable Digital Input/Output. Reset. Configurable Digital Input/Output. Power Supply. Power Ground. Do Not Connect. Real-Time Clock Power Supply. Rev. C | Page 7 of 28 ADIS16375 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0.001 AVERAGE AVERAGE ALLAN VARIANCE (g) +1 100 +1 10 0.0001 -1 1 0.01 0.1 1 10 100 1000 INTEGRATION PERIOD (Seconds) 10000 0.00001 0.01 Figure 7. Gyroscope Allan Variance, +25C 0.1 1 10 100 1000 INTEGRATION PERIOD (Seconds) Figure 8. Accelerometer Allan Variance, 25C Rev. C | Page 8 of 28 10000 09389-008 -1 09389-007 ALLAN VARIANCE (/Hour) 1000 Data Sheet ADIS16375 BASIC OPERATION The register structure and SPI port provide a bridge between the sensor processing system and an external, master processor. It contains both output data and control registers. The output data registers include the latest sensor data, a real-time clock, error flags, alarm flags, and identification data. The control registers include sample rate, filtering, input/output, alarms, calibration, and diagnostic configuration options. All communication between the ADIS16375 and an external processor involves either reading or writing to one of the user registers. TRIAXIS GYRO 12 11 10 TEMP SENSOR 23 ADIS16375 SS 6 CS SCLK 3 SCLK MOSI 5 DIN MISO 4 DOUT IRQ 9 DIO2 14 15 Figure 9. Electrical Connection Diagram Table 6. Generic Master Processor Pin Names and Functions Mnemonic SS IRQ MOSI MISO SCLK Function Slave select Interrupt request Master output, slave input Master input, slave output Serial clock CONTROL REGISTERS The register structure uses a paged addressing scheme that is comprised of 13 pages, with each one containing 64 register locations. Each register is 16-bits wide, with each byte having its own unique address within that page's memory map. The SPI port has access to one page at a time, using the bit sequences in Figure 15. Select the page to activate for SPI access by writing its code to the PAGE_ID register. Read the PAGE_ID register to determine which page is currently active. Table 8 displays the PAGE_ID contents for each page, along with their basic function. The PAGE_ID register is located at Address 0x00 on every page. Table 8. User Register Page Assignments Embedded processors typically use control registers to configure their serial ports for communicating with SPI slave devices, such as the ADIS16375. Table 7 provides a list of settings, which describe the SPI protocol of the ADIS16375. The initialization routine of the master processor typically establishes these settings using firmware commands to write them into its serial control registers. Table 7. Generic Master Processor SPI Settings Processor Setting Master SCLK 15 MHz SPI Mode 3 MSB-First Mode 16-Bit Mode CONTROLLER Figure 10. Basic Operation 09389-010 13 OUTPUT REGISTERS TRIAXIS ACCEL +3.3V VDD SYSTEM PROCESSOR SPI MASTER DSP 09389-011 I/O LINES ARE COMPATIBLE WITH 3.3V LOGIC LEVELS REGISTER STRUCTURE SPI The ADIS16375 is an autonomous sensor system that starts up on its own when it has a valid power supply. After running through its initialization process, it begins sampling, processing, and loading calibrated sensor data into the output registers, which are accessible using the SPI port. The SPI port typically connects to a compatible port on an embedded processor, using the connection diagram in Figure 9. The four SPI signals facilitate synchronous, serial data communication. Connect RST (see Table 5) to a digital I/O line for remote reset control or leave it open for normal operation. The factory default configuration provides users with a data-ready signal on the DIO2 pin, which pulses high when new data is available in the output data registers. Description The ADIS16375 operates as a slave. Maximum serial clock rate. CPOL = 1 (polarity), and CPHA = 1 (phase). Bit sequence. Shift register/data length. Page 0 1 2 3 4 5 6 7 8 9 10 11 12 Rev. C | Page 9 of 28 PAGE_ID 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C Function Output data, clock, identification Reserved Calibration Control: sample rate, filtering, I/O, alarms Reserved FIR Filter Bank A Coefficients, 1 to 60 FIR Filter Bank A, Coefficients, 61 to 120 FIR Filter Bank B, Coefficients, 1 to 60 FIR Filter Bank B, Coefficients, 61 to 120 FIR Filter Bank C, Coefficients, 1 to 60 FIR Filter Bank C, Coefficients, 61 to 120 FIR Filter Bank D, Coefficients, 1 to 60 FIR Filter Bank D, Coefficients, 61 to 120 ADIS16375 Data Sheet SPI COMMUNICATION MANUAL FLASH BACKUP The SPI port supports full duplex communication, as shown in Figure 15, which enables external processors to write to DIN while reading DOUT, if the previous command was a read request. Figure 15 provides a guideline for the bit coding on both DIN and DOUT. VOLATILE SRAM NONVOLATILE FLASH MEMORY SPI ACCESS (NO SPI ACCESS) 09389-013 START-UP RESET DEVICE CONFIGURATION Figure 12. SRAM and Flash Memory Diagram The SPI provides write access to the control registers, one byte at a time, using the bit assignments shown in Figure 15. Each register has 16 bits, where Bits[7:0] represent the lower address (listed in Table 9) and Bits[15:8] represent the upper address. Write to the lower byte of a register first, followed by a write to its upper byte second. The only register that changes with a single write to its lower byte is the PAGE_ID register. For a write command, the first bit in the DIN sequence is set to 1. The Address Bits[A6:A0] represent the target address and the Data Command Bits[DC7:DC0] represent the data being written to the location. Figure 11 provides an example of writing 0x03 to Address 0x00 (PAGE_ID[7:0]), using DIN = 0x8003. This write command activates the control page for SPI access. READING SENSOR DATA CS SCLK DIN 09389-012 DIN = 1000 0000 0000 0011 = 0x8003, WRITES 0x03 TO ADDRESS 0x00 0x1A00 DOUT Figure 11. SPI Sequence for Activating the Control Page (DIN = 0x8003) 0x1800 NEXT ADDRESS Z_GYRO_OUT Z_GYRO_LOW Figure 13. SPI Read Example Dual Memory Structure Figure 14 provides an example of the four SPI signals when reading PROD_ID in a repeating pattern. This is a good pattern to use for troubleshooting the SPI interface setup and communications because the contents of PROD_ID are predefined and stable. Writing configuration data to a control register updates its SRAM contents, which are volatile. After optimizing each relevant control register setting in a system, use the manual flash update command, which is located in GLOB_CMD[3] on Page 3 of the register map. Activate the manual flash update command by turning to Page 3 (DIN = 0x8003) and setting GLOB_CMD[3] = 1 (DIN = 0x8204, then DIN = 0x8300). Make sure that the power supply is within specification for the entire 375 ms processing time for a flash memory update. Table 9 provides a memory map for all of the user registers, which includes a column for the flash backup support associated with each register. A yes in this column indicates that a register has a mirror location in flash and, when backed up properly, automatically restores itself during startup or after a reset. Figure 12 provides a diagram of the dual memory structure used to manage operation and store critical user settings. CS SCLK DIN DIN = 0111 1110 0000 0000 = 0x7E00 DOUT DOUT = 0011 1111 1111 0111 = 0x3FF7 = 16,375 (PROD_ID) Figure 14. SPI Read Example, Second 16-Bit Sequence CS DIN DOUT R/W D15 A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 R/W D15 A6 A5 D14 D13 NOTES 1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0. 2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE FOR OTHER DEVICES. Figure 15. SPI Communication Bit Sequence Rev. C | Page 10 of 28 09389-016 SCLK 09389-015 DIN 09389-014 The ADIS16375 automatically starts up and activates Page 0 for data register access. Write 0x00 to the PAGE_ID register (DIN = 0x8000) to activate Page 0 for data access after accessing any other page. A single register read requires two 16-bit SPI cycles. The first cycle requests the contents of a register using the bit assignments in Figure 15, and then the register contents flow out of DOUT during the second sequence. The first bit in a DIN command is zero, followed by either the upper or lower address for the register. The last eight bits are don't care, but the SPI requires the full set of 16 SCLKs to receive the request. Figure 13 includes two register reads in succession, which starts with DIN = 0x1A00 to request the contents of the Z_GYRO_OUT register and follows with 0x1800 to request the contents of the Z_GYRO_LOW register. Data Sheet ADIS16375 USER REGISTERS Table 9. User Register Memory Map (N/A = Not Applicable) Name PAGE_ID Reserved SYS_E_FLAG DIAG_STS ALM_STS TEMP_OUT X_GYRO_LOW X_GYRO_OUT Y_GYRO_LOW Y_GYRO_OUT Z_GYRO_LOW Z_GYRO_OUT X_ACCL_LOW X_ACCL_OUT Y_ACCL_LOW Y_ACCL_OUT Z_ACCL_LOW Z_ACCL_OUT Reserved X_DELTA_ANG_L X_DELTA_ANG_H Y_DELTA_ANG_L Y_DELTA_ANG_H Z_DELTA_ANG_L Z_DELTA_ANG_H X_DELTA_VEL_L X_DELTA_VEL_H Y_DELTA_VEL_L Y_DELTA_VEL_H Z_DELTA_VEL_L Z_DELTA_VEL_H Reserved TIME_MS_OUT TIME_DH_OUT TIME_YM_OUT Reserved LOT_ID1 LOT_ID2 LOT_ID3 PROD_ID Reserved PAGE_ID Reserved XGYRO_OFF_L XGYRO_OFF_H YGYRO_OFF_L YGYRO_OFF_H ZGYRO_OFF_L ZGYRO_OFF_H XACCL_OFF_L XACCL_OFF_H R/W R/W N/A R R R R R R R R R R R R R R R R N/A R R R R R R R R R R R R N/A R/W R/W R/W N/A R R R R N/A R/W N/A R/W R/W R/W R/W R/W R/W R/W R/W Flash No N/A No No No No No No No No No No No No No No No No N/A No No No No No No No No No No No No N/A Yes Yes Yes N/A Yes Yes Yes Yes N/A No N/A Yes Yes Yes Yes Yes Yes Yes Yes PAGE_ID 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 Address 0x00 0x02 to 0x07 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 to 0x3F 0x40 0x42 0x44 0x46 0x48 0x4A 0x4C 0x4E 0x50 0x52 0x54 0x56 0x58 to 0x6F 0x70 0x72 0x74 0x76 0x78 0x7A 0x7C 0x7E 0x00 to 0x7F 0x00 0x02 to 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E Default 0x00 N/A 0x0000 0x0000 0x0000 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x3FF7 N/A 0x00 N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 Rev. C | Page 11 of 28 Register Description Page Identifier Reserved Output, system error flags Output, self test error flags Output, alarm error flags Output, temperature Output, x-axis gyroscope, low word Output, x-axis gyroscope, high word Output, y-axis gyroscope, low word Output, y-axis gyroscope, high word Output, z-axis gyroscope, low word Output, z-axis gyroscope, high word Output, x-axis accelerometer, low word Output, x-axis accelerometer, high word Output, y-axis accelerometer, low word Output, y-axis accelerometer, high word Output, z-axis accelerometer, low word Output, z-axis accelerometer, high word Reserved Output, x-axis delta angle, low word Output, x-axis delta angle, high word Output, y-axis delta angle, low word Output, y-axis delta angle, high word Output, z-axis delta angle, low word Output, z-axis delta angle, high word Output, x-axis delta velocity, low word Output, x-axis delta velocity, high word Output, y-axis delta velocity, low word Output, y-axis a delta velocity, high word Output, z-axis delta velocity, low word Output, z-axis delta velocity, high word Reserved Output, time, minutes, and seconds Output, time, days, and hours Output, time, years, and months Reserved Output, lot identification number Output, lot identification number Output, lot identification number Output, product identification (16,375) Reserved Page identifier Reserved Calibration, offset, x-axis gyroscope, low word Calibration, offset, x-axis gyroscope, high word Calibration, offset, y-axis gyroscope, low word Calibration, offset, y-axis gyroscope, high word Calibration, offset, z-axis gyroscope, low word Calibration, offset, z-axis gyroscope, high word Calibration, offset, x-axis accelerometer, low word Calibration, offset, x-axis accelerometer, high word Format N/A N/A Table 41 Table 42 Table 43 Table 39 Table 15 Table 11 Table 16 Table 12 Table 17 Table 13 Table 22 Table 18 Table 23 Table 19 Table 24 Table 20 N/A Table 29 Table 25 Table 30 Table 26 Table 31 Table 27 Table 36 Table 32 Table 37 Table 33 Table 38 Table 34 N/A Table 96 Table 97 Table 98 N/A Table 44 Table 45 Table 46 Table 47 N/A N/A N/A Table 62 Table 59 Table 63 Table 60 Table 64 Table 61 Table 68 Table 65 ADIS16375 Name YACCL_OFF_L YACCL_OFF_H ZACCL_OFF_L ZACCL_OFF_H Reserved XGYRO_SCL YGYRO_SCL ZGYRO_SCL XACCL_SCL YACCL_SCL ZACCL_SCL Reserved SERIAL_NUM Reserved FLSH_CNT_L FLSH_CNT_H Reserved PAGE_ID GLOB_CMD Reserved FNCIO_CTRL GPIO_CTRL GEN_CONFIG DEC_RATE NULL_CFG SLP_CFG Reserved FILTER_SEL1 FILTER_SEL2 Reserved ALM_CONFIG_1 ALM_CONFIG_2 Reserved XG_ALM_MAG YG_ALM_MAG ZG_ALM_MAG XA_ALM_MAG YA_ALM_MAG ZA_ALM_MAG Reserved Reserved FIR_COEF_Axxx FIR_COEF_Axxx FIR_COEF_Bxxx FIR_COEF_Bxxx FIR_COEF_Cxxx FIR_COEF_Cxxx FIR_COEF_Dxxx FIR_COEF_Dxxx Data Sheet R/W R/W R/W R/W R/W N/A R/W R/W R/W R/W R/W R/W N/A R N/A R R N/A R/W W N/A R/W R/W R/W R/W R/W R/W N/A R/W R/W N/A R/W R/W N/A R/W R/W R/W R/W R/W R/W N/A N/A R/W R/W R/W R/W R/W R/W R/W R/W Flash Yes Yes Yes Yes N/A Yes Yes Yes Yes Yes Yes N/A Yes N/A Yes Yes N/A No No N/A Yes Yes Yes Yes Yes No N/A Yes Yes N/A Yes Yes N/A Yes Yes Yes Yes Yes Yes N/A N/A Yes Yes Yes Yes Yes Yes Yes Yes PAGE_ID 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C Address 0x20 0x22 0x24 0x26 0x28 to 0x3E 0x40 0x42 0x44 0x46 0x48 0x4A 0x4C to 0x67 0x68 0x6Ato 0x77 0x78 0x7A 0x7C to 0x7F 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 to 0x15 0x16 0x18 0x1A to 0x1F 0x20 0x22 0x24 to 0x3E 0x40 0x42 0x44 0x46 0x48 0x4A 0x4C to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F 0x00 to 0x7F Default 0x0000 0x0000 0x0000 0x0000 N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A N/A N/A N/A N/A N/A 0x0000 N/A N/A 0x000D 0x0000 0x00C0 0x070B N/A N/A 0x0000 0x0000 N/A 0x0000 0x0000 N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A Rev. C | Page 12 of 28 Register Description Calibration, offset, y-axis accelerometer, low word Calibration, offset, y-axis accelerometer, high word Calibration, offset, z-axis accelerometer, low word Calibration, offset, z-axis accelerometer, high word Reserved Calibration, scale, x-axis gyroscope Calibration, scale, y-axis gyroscope Calibration, scale, z-axis gyroscope Calibration, scale, x-axis accelerometer Calibration, scale, y-axis accelerometer Calibration, scale, z-axis accelerometer Reserved Serial number Reserved Diagnostic, flash memory write count, low word Diagnostic, flash memory write count, high word Reserved Page identifier Control, global commands Reserved Control, I/O pins, functional definitions Control, I/O pins, general purpose Control, clock and miscellaneous correction Control, output sample rate decimation Control, automatic bias correction configuration Control, power-down/sleep mode Reserved Filter selection Filter selection Reserved Alarm configuration Alarm configuration Reserved X-axis gyroscope alarm trigger level Y-axis gyroscope alarm trigger level Z-axis gyroscope alarm trigger level X-axis accelerometer alarm trigger level Y-axis accelerometer alarm trigger level Z-axis accelerometer alarm trigger level Reserved Reserved FIR Filter Bank A, Coefficients 1 through 60 FIR Filter Bank A, Coefficients 61 through 120 FIR Filter Bank B, Coefficients 1 through 60 FIR Filter Bank B, Coefficients 61 through 120 FIR Filter Bank C, Coefficients 1 through 60 FIR Filter Bank C, Coefficients 61 through 120 FIR Filter Bank D, Coefficients 1 through 60 FIR Filter Bank D, Coefficients 61 through 120 Format Table 69 Table 66 Table 70 Table 67 N/A Table 71 Table 72 Table 73 Table 74 Table 75 Table 76 N/A Table 48 N/A Table 91 Table 92 N/A N/A Table 90 N/A Table 93 Table 94 Table 78 Table 50 Table 77 Table 95 N/A Table 51 Table 52 N/A Table 86 Table 87 N/A Table 80 Table 81 Table 82 Table 83 Table 84 Table 85 N/A N/A Table 53 Table 53 Table 54 Table 54 Table 55 Table 55 Table 56 Table 56 Data Sheet ADIS16375 OUTPUT DATA REGISTERS Table 10. Output Data Register Summary Address 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x40 0x42 0x44 0x46 0x48 0x4A 0x4C 0x4E 0x50 0x52 0x54 0x56 0x70 0x72 0x74 0x78 0x7A 0x7C 0x7E X_GYRO_LOW 0 15 0 X-AXIS GYROSCOPE DATA Figure 16. Gyroscope Output Format, DEC_RATE > 0 The arrows in Figure 17 describe the direction of the motion, which produces a positive output response in each sensor's output register. The accelerometers respond to both dynamic and static forces associated with acceleration, including gravity. When lying perfectly flat, as shown in Figure 17, the z-axis accelerometer output is 1 g, and the x and y accelerometers is 0 g. Measurement System flags Self test flags Alarm flags Temperature Gyroscope, X Gyroscope, X Gyroscope, Y Gyroscope, Y Gyroscope, Z Gyroscope, Z Accelerometer, X Accelerometer, X Accelerometer, Y Accelerometer, Y Accelerometer, Z Accelerometer, Z Delta angle, X Delta angle, X Delta angle, Y Delta angle, Y Delta angle, Z Delta angle, Z Delta velocity, X Delta velocity, X Delta velocity, Y Delta velocity, Y Delta velocity, Z Delta velocity, Z Time, min, and sec Time, day, and hour Time, year, and month Lot identifier Lot identifier Lot identifier Product identifier Z-AXIS aZ gZ X-AXIS Y-AXIS aX gX aY gY 09389-018 Register SYS_E_FLAG DIAG_STS ALM_STS TEMP_OUT X_GYRO_LOW X_GYRO_OUT Y_GYRO_LOW Y_GYRO_OUT Z_GYRO_LOW Z_GYRO_OUT X_ACCL_LOW X_ACCL_OUT Y_ACCL_LOW Y_ACCL_OUT Z_ACCL_LOW Z_ACCL_OUT X_DELTA_ANG_L X_DELTA_ANG_H Y_DELTA_ANG_L Y_DELTA_ANG_H Z_DELTA_ANG_L Z_DELTA_ANG_H X_DELTA_VEL_L X_DELTA_VEL_H Y_DELTA_VEL_L Y_DELTA_VEL_H Z_DELTA_VEL_L Z_DELTA_VEL_H TIME_MS_OUT TIME_DH_OUT TIME_YM_OUT LOT_ID1 LOT_ID2 LOT_ID3 PROD_ID X_GYRO_OUT 15 09389-017 After the ADIS16375 completes its startup process, the PAGE_ID register contains 0x0000, which sets Page 0 as the active page for SPI access. Page 0 contains the output data, real-time clock, status and product identification registers. PIN 23 PIN 1 Figure 17. Inertial Sensor Direction Reference Diagram Rotation Rate (Gyroscope) The registers that use the x_GYRO_OUT format are the primary registers for the gyroscope measurements. When processing data from these registers, use a 16-bit, twos complement data format. Table 11, Table 12 and Table 13 provide each register's numerical format, and Table 14 provides x_GYRO_OUT digital coding examples. Table 11. X_GYRO_OUT (Page 0, Base Address = 0x12) Bits [15:0] Description X-axis gyroscope data; twos complement, 300/sec range, 0.013108/sec per LSB, 0/sec = 0x0000 Table 12. Y_GYRO_OUT (Page 0, Base Address = 0x16) Bits [15:0] Description Y-axis gyroscope data; twos complement, 300/sec range, 0.013108/sec per LSB, 0/sec = 0x0000 Table 13. Z_GYRO_OUT (Page 0, Base Address = 0x1A) Bits [15:0] Inertial Sensor Data Format The gyroscope, accelerometer, delta angle, and delta velocity output data use a 32-bit, twos complement format. Each output uses two registers to support this resolution. Figure 16 provides an example of how each register contributes to each inertial measurement. In this case, X_GYRO_OUT is the most significant word (upper 16 bits), and X_GYRO_LOW is the least significant word (lower 16 bits). In many cases, using the x_GYRO_OUT registers alone provides sufficient resolution for preserving key performance metrics. Description Z-axis gyroscope data; twos complement, 300/sec range, 0.013108/sec per LSB, 0/sec = 0x0000 Table 14. x_GYRO_OUT Data Format Examples Rotation Rate +300/sec +0.026216/sec +0.013108/sec 0/sec -0.013108/sec -0.026216/sec -300/sec Rev. C | Page 13 of 28 Decimal +22,887 +2 +1 0 -1 -2 -22,887 Hex 0x5967 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0xA699 Binary 0101 1001 0110 0111 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1010 0110 1001 1001 ADIS16375 Data Sheet The registers that use the x_GYRO_LOW naming format provide additional resolution for the gyroscope measurements. The MSB has a weight of 0.006554/sec, and each subsequent bit carries a weight of 1/2 of the previous one. Table 22. X_ACCL_LOW (Page 0, Base Address = 0x1C) Table 15. X_GYRO_LOW (Page 0, Base Address = 0x10) Bits [15:0] Bits [15:0] Description X-axis gyroscope data; additional resolution bits Table 23. Y_ACCL_LOW (Page 0, Base Address = 0x20) Bits [15:0] Description Y-axis gyroscope data; additional resolution bits The registers that use the x_ACCL_OUT format are the primary registers for the accelerometer measurements. When processing data from these registers, use a 16-bit, twos complement data format. Table 18, Table 19 and Table 20 provide each register's numerical format, and Table 21 provides x_ACCL_OUT digital coding examples. Table 18. X_ACCL_OUT (Page 0, Base Address = 0x1E) Description X-axis accelerometer data; twos complement, 18 g range, 0.8192 mg per LSB, 0 g = 0x0000 Table 19. Y_ACCL_OUT (Page 0, Base Address = 0x22) Bits [15:0] Description Y-axis accelerometer data; twos complement, 18 g range, 0.8192 mg per LSB, 0 g = 0x0000 Table 20. Z_ACCL_OUT (Page 0, Base Address = 0x26) Bits [15:0] Description Z-axis accelerometer data; twos complement, 18 g range, 0.8192 mg per LSB, 0 g = 0x0000 Table 21. x_ACCL_OUT Data Format Examples Acceleration +18 g +1.6384 mg +0.8192 mg 0 mg -0.8192 mg -1.6384 mg -18 g Decimal +21,973 +2 +1 0 -1 -2 -21,973 Hex 0x55D5 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0xAA2B Description Z-axis accelerometer data; additional resolution bits The delta angle outputs represent an integration of the gyroscope measurements and use the following formula for all three axes (x-axis displayed): Description Z-axis gyroscope data; additional resolution bits Acceleration Bits [15:0] Description Y-axis accelerometer data; additional resolution bits Delta Angles Table 17. Z_GYRO_LOW (Page 0, Base Address = 0x18) Bits [15:0] Description X-axis accelerometer data; additional resolution bits Table 24. Z_ACCL_LOW (Page 0, Base Address = 0x24) Table 16. Y_GYRO_LOW (Page 0, Base Address = 0x14) Bits [15:0] Bits [15:0] Binary 0101 0101 1101 0101 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1010 1010 0010 1011 The registers that use the x_ACCL_LOW naming format provide additional resolution for the accelerometer measurements. The MSB has a weight of 0.4096 mg, and each subsequent bit carries a weight of 1/2 of the previous one. x = TS x (x,n+1 + x,n ) 2 where: x is the gyroscope, x-axis. TS is the time between samples. TS = DEC _ RATE fS When using the internal sample clock, fS is equal to 2.46 kHz. When using the external clock option, the time between samples is the time between active edges on the input clock signal, as measured by the internal clock (252 MHz). See Table 50 for more information on the DEC_RATE register. The registers that use the x_DELTA_ANG_H format are the primary registers for the delta angle calculations. When processing data from these registers, use a 16-bit, twos complement data format. Table 25, Table 26, and Table 27 provide each register's numerical format, and Table 28 provides several examples for converting digital data into angular degrees (). Table 25. X_DELTA_ANG_H (Page 0, Base Address = 0x42) Bits [15:0] Description X-axis delta angle data; twos complement, 179.9891 range, sensitivity = 0.005493/LSB, 0 = 0x0000 Table 26. Y_DELTA_ANG_H (Page 0, Base Address = 0x46) Bits [15:0] Description Y-axis delta angle data; twos complement, 179.9891 range, sensitivity = 0.005493/LSB, 0 = 0x0000 Table 27. Z_DELTA_ANG_H (Page 0, Base Address = 0x4A) Bits [15:0] Rev. C | Page 14 of 28 Description Z-axis delta angle data; twos complement, 179.9891 range, sensitivity = 0.005493/LSB, 0 = 0x0000 Data Sheet ADIS16375 Table 28. x_DELTA_ANG_H Data Format Examples Table 33. Y_DELTA_VEL_H (Page 0, Base Address = 0x52) Angle +179.9891 +0.010986 +0.005493 0 -0.005493 -0.010986 -180 Bits [15:0] Decimal +32,767 +2 +1 0 -1 -2 -32,768 Hex 0x7FFF 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0x8000 Binary 0111 1111 1110 1111 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1000 0000 0000 0000 The registers that use the x_DELTA_ANG_L naming format provide additional resolution for the gyroscope measurements. The MSB has a weight of 0.0027465, and each subsequent bit carries a weight of 1/2 of the previous one. Table 29. X_DELTA_ANG_L (Page 0, Base Address = 0x40) Bits [15:0] Description X-axis delta angle data; additional resolution bits Table 30. Y_DELTA_ANG_L (Page 0, Base Address = 0x44) Bits [15:0] Description Y-axis delta angle data; additional resolution bits Table 31. Z_DELTA_ANG_L (Page 0, Base Address = 0x48) Bits [15:0] Description Z-axis delta angle data; additional resolution bits Description Y-axis delta velocity data; twos complement, 99.998 m/sec, 3.0518 mm/sec per LSB, 0 = 0x0000 Table 34. Z_DELTA_VEL_H (Page 0, Base Address = 0x56) Bits [15:0] Description Z-axis delta velocity data; twos complement, 99.998 m/sec, 3.0518 mm/sec per LSB, 0 = 0x0000 Table 35. x_DELTA_VEL_H, Data Format Examples Velocity +99.998 m/sec +6.1036 mm/sec +3.0518 mm/sec 0 m/sec -3.0518 mm/sec -6.1036 mm/sec -100 m/sec Decimal +32,767 +2 +1 0 -1 -2 -32,768 Hex 0x7FFF 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0x8000 Binary 0111 1111 1111 1111 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1000 0000 0000 0000 The registers that use the x_DELTA_VEL_L naming format provide additional resolution for the gyroscope measurements. The MSB has a weight of 1.5259 mm/sec, and each subsequent bit carries a weight of 1/2 of the previous one. Table 36. X_DELTA_VEL_L (Page 0, Base Address = 0x4C) Velocity Changes Bits [15:0] The delta velocity outputs represent an integration of the accelerometer measurements and use the following formula for all three axes (x-axis displayed): Table 37. Y_DELTA_VEL_L (Page 0, Base Address = 0x50) Vx = Bits [15:0] TS x (a x,n +1 + a x,n ) 2 Description Y-axis delta velocity data; additional resolution bits Table 38. Z_DELTA_VEL_L (Page 0, Base Address = 0x54) Bits [15:0] where: x is the gyroscope, x-axis TS is the time between samples. Description Z-axis delta velocity data; additional resolution bits Internal Temperature DEC _ RATE TS = fS When using the internal sample clock, fS is equal to 2.46 kHz. When using the external clock option, the time between samples is the time between active edges on the input clock signal, as measured by the internal clock (252 MHz). See Table 50 for more information on the DEC_RATE register. The registers that use the x_DELTA_VEL_H format are the primary registers for the delta velocity calculations. When processing data from these registers, use a 16-bit, twos complement data format. Table 32, Table 33 and Table 34 provide the numerical format, and Table 35 provides digital coding examples. Table 32. X_DELTA_VEL_H (Page 0, Base Address = 0x4E) Bits [15:0] Description X-axis delta velocity data; additional resolution bits Description X-axis delta velocity data; twos complement, 99.998 m/sec, 3.0518 mm/sec per LSB, 0 = 0x0000 The TEMP_OUT register provides an internal temperature measurement that can be useful for observing relative temperature changes in the environment (see Table 39). Table 40 provides several coding examples for converting the 16-bit twos complement number into units for temperature (C). Table 39. TEMP_OUT (Page 0, Base Address = 0x0E) Bits [15:0] Description Temperature data; twos complement, 0.00565C per LSB, 25C = 0x0000 Table 40. Temperature, Twos Complement Format Temperature +85C +25+0.0113C +25+ 0.00565C +25C +25C-0.00565C +25C-0.0113C -40C Rev. C | Page 15 of 28 Decimal +10,619 +2 +1 0 -1 -2 -11,504 Hex 0x297B 0x0002 0x0001 0x0000 0xFFFF 0xFFFE 0xD310 Binary 0010 1001 0111 1011 0000 0000 0000 0010 0000 0000 0000 0001 0000 0000 0000 0000 1111 1111 1111 1111 1111 1111 1111 1110 1101 0011 0001 0000 ADIS16375 Data Sheet Status/Alarm Indicators Table 43. ALM_STS (Page 0, Base Address = 0x0C) The SYS_E_FLAG register in Table 41 provides the system error flags. Bits [15:6] [5] [4] [3] [2] [1] [0] Table 41. SYS_E_FLAG (Page 0, Base Address = 0x08) Bits [15] [14:8] [7] [6] [5] [4] [3] [2:1] [0] Description Watch dog timer flag (1 = timed out) Not used Processing overrun (1 = error) Flash memory (1 = failure) Inertial self test failure (1= DIAG_STS 0x00) Sensor overrange (1 = at least one sensor overranged) SPI communication error Not used Alarm status flag (1 = ALM_STS 0x00) The DIAG_STS register in Table 42 provides the flags for the internal self test function. Table 42. DIAG_STS (Page 0, Base Address = 0x0A) Bits [15:6] [5] [4] [3] [2] [1] [0] Description Not used Self test failure, Z-axis accelerometer (1 = failure) Self test failure, Y-axis accelerometer (1 = failure) Self test failure, X-axis accelerometer (1 = failure) Self test failure, Z-axis gyroscope (1 = failure) Self test failure, Y-axis gyroscope (1 = failure) Self test failure, X-axis gyroscope (1 = failure) Description Not used Z-axis accelerometer alarm flag 1 = alarm is active) Y-axis accelerometer alarm flag (1 = alarm is active) X-axis accelerometer alarm flag (1 = alarm is active) Z-axis gyroscope alarm flag (1 = alarm is active) Y-axis gyroscope alarm flag (1 = alarm is active) X-axis gyroscope alarm flag (1 = alarm is active) Product Identification Table 44. LOT_ID1 (Page 0, Base Address = 0x78) Bits [15:0] Description Lot identification, binary code Table 45. LOT_ID2 (Page 0, Base Address = 0x7A) Bits [15:0] Description Lot identification, binary code Table 46. LOT_ID3 (Page 0, Base Address = 0x7C) Bits [15:0] Description Lot identification, binary code Table 47. PROD_ID (Page 0, Base Address = 0x7E) Bits [15:0] The ALM_STS register in Table 43 provides the alarm bits for each sensor's programmable alarm levels. Description Product identification = 0x3FF7 Table 48. SERIAL_NUM (Page 2, Base Address = 0x68) Bits [15:0] Rev. C | Page 16 of 28 Description Lot-specific serial number Data Sheet ADIS16375 DIGITAL SIGNAL PROCESSING Figure 18 provides a block diagram for the sampling and digital filter stages inside the ADIS16375. Table 49 provides a summary of the registers for sample rate and filter control. FIR FILTER BANKS The ADIS16375 provides four configurable, 120-tap FIR filter banks. Each coefficient is 16-bits wide and occupies its own register location with each page. When designing a FIR filter for these banks, use a sample rate of 2.46 kHz and scale the coefficients so that their sum equals 32,768. For filter designs that have less than 120 taps, load the coefficients into the lower portion of the filter, start with Coefficient 1. Make sure that all unused taps are equal to zero so that they do not add phase delay to the response. Table 49. Digital Processing Registers Page 0x03 0x03 0x03 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C Address 0x0C 0x16 0x18 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F 0x08 to 0x7F Function Decimation rate Filter selection Filter selection FIR Filter Bank A, 1 to 60 FIR Filter Bank A, 61 to 120 FIR Filter Bank B, 1 to 60 FIR Filter Bank B, 61 to 120 FIR Filter Bank C, 1 to 60 FIR Filter Bank C, 61 to 120 FIR Filter Bank D, 1 to 60 FIR Filter Bank D, 61 to 120 Table 51. FILTER_SEL1 (Page 3, Base Address = 0x16) Bits [15] [14] [13:12] [11] [10:9] SAMPLING PLAN Figure 18 provides a signal flow diagram for all of the components and settings that influence the frequency response for each inertial sensor. The signal processing starts with sampling each inertial sensor at a rate of 9.84 kHz, followed by a divide-by-4 averaging/decimation filter stage. [8] [7:6] [5] [4:3] AVERAGING/DECIMATION FILTER [2] [1:0] The DEC_RATE register (see Table 50) provides user control for the final filter stage (see Figure 18), which averages and decimates the inertial sensor, delta angle and delta velocity data. This provides a simple method for reducing the rate of data updates in the output registers. For example, turn to Page 3 (DIN = 0x8003) and set DEC_RATE = 0x18 (DIN = 0x8C18, then DIN = 0x8D00) to reduce the output sample rate to 98.4 SPS (2460 / 25). Table 52. FILTER_SEL2 (Page 3, Base Address = 0x18) Bits [15:3] [2] [1:0] Table 50. DEC_RATE (Page 3, Base Address = 0x0C) Bits [15:11] [10:0] Description (Default = 0x0000) Don't care Y-axis accelerometer filter enable (1 = enabled) Y-axis accelerometer filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D X-axis accelerometer filter enable (1 = enabled) X-axis accelerometer filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D Z-axis gyroscope filter enable (1 = enabled) Z-axis gyroscope filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D Y-axis gyroscope filter enable (1: enabled) Y-axis gyroscope filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D X-axis gyroscope filter enable (1 = enabled) X-axis gyroscope filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D Description (Default = 0x0000) Don't care Decimation rate, binary format, range: 0 to 2047 Description (Default = 0x0000) Don't care Z-axis accelerometer filter enable (1 = enabled) Z-axis accelerometer filter bank selection: 00 = Bank A, 01 = Bank B, 10 = Bank C, 11 = Bank D 2.46kHz MEMS GYRO 1 4 330Hz GYROSCOPE 2-POLE: 404Hz, 757Hz ACCELEROMETER 1-POLE: 330Hz INTERNAL CLOCK 9.84kHz 4 n=1 4x AVERAGE DECIMATION FILTER FIR FILTER BANK /4 1 D D n=1 AVERAGE/DECIMATION FILTER SELECTABLE D = DEC_RATE[10:0] + 1 FIR FILTER BANK FILTER_BNK1 FILTER_BNK2 Figure 18. Sampling and Frequency Response Block Diagram Rev. C | Page 17 of 28 /D 09389-019 Register DEC_RATE FILTER_SEL1 FILTER_SEL2 FIR_COEF_Axxx FIR_COEF_Axxx FIR_COEF_Bxxx FIR_COEF_Bxxx FIR_COEF_Cxxx FIR_COEF_Cxxx FIR_COEF_Dxxx FIR_COEF_Dxxx ADIS16375 Data Sheet Filter Memory Organization Table 56. Filter Bank D Memory Map Each filter bank uses two pages of the user register structure. See Table 53, Table 54, Table 55, and Table 56 for the register addresses in each filter bank. Page 11 11 11 11 11 PAGE_ID 0x0B 0x0B 0x0B 0x0B 0x0B Address 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 11 12 12 12 12 12 0x0B 0x0C 0x0C 0x0C 0x0C 0x0C 0x7E 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 12 0x0C 0x7E PAGE_ID 0x05 0x05 0x05 0x05 0x05 Address 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 5 6 6 6 6 6 0x05 0x06 0x06 0x06 0x06 0x06 0x7E 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 6 0x06 0x7E Register PAGE_ID Not used FIR_COEF_A001 FIR_COEF_A002 FIR_COEF_A003 to FIR_COEF_A059 FIR_COEF_A060 PAGE_ID Not used FIR_COEF_A061 FIR_COEF_A062 FIR_COEF_A063 to FIR_COEF_A119 FIR_COEF_A120 Table 54. Filter Bank B Memory Map Page 7 7 7 7 7 PAGE_ID 0x07 0x07 0x07 0x07 0x07 Address 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 7 8 8 8 8 8 0x07 0x08 0x08 0x08 0x08 0x08 0x7E 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 8 0x08 0x7E Register PAGE_ID Not used FIR_COEF_B001 FIR_COEF_B002 FIR_COEF_B003 to FIR_COEF_B059 FIR_COEF_B060 PAGE_ID Not used FIR_COEF_B061 FIR_COEF_B062 FIR_COEF_B063 to FIR_COEF_B119 FIR_COEF_B120 Table 55. Filter Bank C Memory Map Page 9 9 9 9 9 PAGE_ID 0x09 0x09 0x09 0x09 0x09 Address 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 9 10 10 10 10 10 0x09 0x0A 0x0A 0x0A 0x0A 0x0A 0x7E 0x00 0x02 to 0x07 0x08 0x0A 0x0C to 0x7C 10 0x0A 0x7E Register PAGE_ID Not used FIR_COEF_C001 FIR_COEF_C002 FIR_COEF_C003 to FIR_COEF_C059 FIR_COEF_C060 PAGE_ID Not used FIR_COEF_C061 FIR_COEF_C062 FIR_COEF_C063 to FIR_COEF_C119 FIR_COEF_C120 Default Filter Performance The FIR filter banks have factory-programmed filter designs. They are all low-pass filters that have unity dc gain. Table 57 provides a summary of each filter design, and Figure 19 shows the frequency response characteristics. For more detailed analysis, read each coefficient into an array and analyze externally. Table 57. FIR Filter Descriptions, Default Configuration FIR Filter Bank A B C D Taps 120 120 32 32 -3 dB Frequency (Hz) 310 55 275 63 0 -10 -20 B D NO FIR FILTERING C A -30 -40 -50 -60 -70 -80 -90 -100 0 200 400 600 800 1000 FREQUENCY (Hz) Figure 19. FIR Filter Frequency Response Curves Rev. C | Page 18 of 28 1200 09389-027 Page 5 5 5 5 5 MAGNITUDE (dB) Table 53. Filter Bank A Memory Map Register PAGE_ID Not used FIR_COEF_D001 FIR_COEF_D002 FIR_COEF_D003 to FIR_COEF_D059 FIR_COEF_D060 PAGE_ID Not used FIR_COEF_D061 FIR_COEF_D062 FIR_COEF_D063 to FIR_COEF_D119 FIR_COEF_D120 Data Sheet ADIS16375 CALIBRATION The ADIS16375 factory calibration produces correction formulas for each gyroscope and accelerometer, and then programs them into the flash memory. Table 58 contains a list of user control registers that provide opportunity for user optimization after installation. The bias and scale correction registers are in Page 2, and the control registers are in Page 3. Figure 20 illustrates an example of how the scale and offset registers for each sensor function. Table 58. Registers for User Calibration Register XGYRO_OFF_L XGYRO_OFF_H YGYRO_OFF_L YGYRO_OFF_H ZGYRO_OFF_L ZGYRO_OFF_H XACCL_OFF_L XACCL_OFF_H YACCL_OFF_L YACCL_OFF_H ZACCL_OFF_L ZACCL_OFF_H XGYRO_SCL YGYRO_SCL ZGYRO_SCL XACCL_SCL YACCL_SCL ZACCL_SCL GEN_CONFIG NULL_CFG GLOB_CMD Page 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 Address 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x40 0x42 0x44 0x46 0x48 0x4A 0x0A 0x0E 0x02 Correction Function Offset, X-axis gyroscope Offset, X-axis gyroscope Offset, Y-axis gyroscope Offset, Y-axis gyroscope Offset, Z-axis gyroscope Offset, Z-axis gyroscope Offset, X-axis accelerometer Offset, X-axis accelerometer Offset, Y-axis accelerometer Offset, Y-axis accelerometer Offset, Z-axis accelerometer Offset, Z-axis accelerometer Scale, X-axis gyroscope Scale, Y-axis gyroscope Scale, Z-axis gyroscope Scale, X-axis accelerometer Scale, Y-axis accelerometer Scale, Z-axis accelerometer Calibration configuration Bias-null configuration Calibration commands The factory calibration addresses initial and temperature dependent bias errors in the gyroscopes, but some environmental conditions, such as temperature cycling and mechanical stress on the package, can cause bias shifts in MEMS gyroscope structures. For systems that value absolute bias accuracy, there are two options for optimizing absolute bias accuracy: autonull and manual correction. Manual Bias Correction The xGYRO_OFF_H (see Table 59, Table 60, and Table 61) and xGYRO_OFF_L (see Table 62, Table 63, and Table 64) registers provide a bias adjustment function for the output of each gyroscope sensor. The xGYRO_OFF_H registers use the same format as x_GYRO_OUT registers. The xGYRO_OFF_L registers use the same format as x_GYRO_LOW registers. Table 60. YGYRO_OFF_H (Page 2, Base Address = 0x16) Bits [15:0] Table 61. ZGYRO_OFF_H (Page 2, Base Address = 0x1A) Bits [15:0] Description (Default = 0x0000) X-axis gyroscope offset correction, upper word; uses same format as X_GYRO_OUT (see Table 11) Description (Default = 0x0000) Z-axis gyroscope offset correction, upper word; uses same format as Z_GYRO_OUT (see Table 13) Table 62. XGYRO_OFF_L (Page 2, Base Address = 0x10) Bits [15:0] Description (Default = 0x0000) X-axis gyroscope offset correction, lower word; uses same format as X_GYRO_LOW (see Table 15) Table 63. YGYRO_OFF_L (Page 2, Base Address = 0x14) Bits [15:0] Description (Default = 0x0000) Y-axis gyroscope offset correction, lower word; uses same format as Y_GYRO_LOW (see Table 16) Table 64. ZGYRO_OFF_L (Page 2, Base Address = 0x18) Bits [15:0] Description (Default = 0x0000) Z-axis gyroscope offset correction, lower word; uses same format as Z_GYRO_LOW (see Table 17) The xACCL_OFF_H (see Table 65, Table 66, and Table 67) and xACCL_OFF_L (see Table 68, Table 69, and Table 70) registers provide a bias adjustment function for the output of each gyroscope sensor. The xACCL_OFF_H registers use the same format as x_ACCL_OUT registers. The xACCL_OFF_L registers use the same format as x_ACCL_LOW registers. Table 65. XACCL_OFF_H (Page 2, Base Address = 0x1E) Bits [15:0] Description (Default = 0x0000) X-axis accelerometer offset correction, upper word; uses same format as X_ACCL_OUT (see Table 18) Table 66. YACCL_OFF_H (Page 2, Base Address = 0x22) Bits [15:0] Description (Default = 0x0000) Y-axis accelerometer offset correction, upper word; uses same format as Y_ACCL_OUT (see Table 19) Table 67. ZACCL_OFF_H (Page 2, Base Address = 0x26) Bits [15:0] Description (Default = 0x0000) Z-axis accelerometer offset correction, upper word; uses same format as Z_ACCL_OUT (see Table 20) Table 68. XACCL_OFF_L (Page 2, Base Address = 0x1C) Bits [15:0] Table 59. XGYRO_OFF_H (Page 2, Base Address = 0x12) Bits [15:0] Description (Default = 0x0000) Y-axis gyroscope offset correction, upper word; uses same format as Y_GYRO_OUT (see Table 12) Description (Default = 0x0000) X-axis accelerometer offset correction, lower word; uses same format as X_ACCL_LOW (see Table 22) Table 69. YACCL_OFF_L (Page 2, Base Address = 0x20) Bits [15:0] Rev. C | Page 19 of 28 Description (Default = 0x0000) Y-axis accelerometer offset correction, lower word; uses same format as Y_ACCL_LOW (see Table 23) ADIS16375 Data Sheet Table 70. ZACCL_OFF_L (Page 2, Base Address = 0x24) Table 74. XACCL_SCL (Page 2, Base Address = 0x46) Bits [15:0] Bits [15:0] Description (Default = 0x0000) Z-axis accelerometer offset correction, lower word; uses same format as Z_ACCL_LOW (see Table 24) Description (Default = 0x0000) X-axis accelerometer scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain Manual Sensitivity Correction The xGYRO_SCL and x_ACCL_SCL registers provide controls for sensitivity adjustment. Table 71. XGYRO_SCL (Page 2, Base Address = 0x40) Bits [15:0] Description (Default = 0x0000) X-axis gyroscope scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain Table 72. YGYRO_SCL (Page 2, Base Address = 0x42) Bits [15:0] Table 75. YACCL_SCL (Page 2, Base Address = 0x48) Bits [15:0] Description (Default = 0x0000) Y-axis accelerometer scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain Table 76. ZACCL_SCL (Page 2, Base Address = 0x4A) Bits [15:0] Description (Default = 0x0000) Z-axis accelerometer scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain Description (Default = 0x0000) Y-axis gyroscope scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain Table 73. ZGYRO_SCL (Page 2, Base Address = 0x44) Description (Default = 0x0000) Z-axis gyroscope scale correction; twos complement, 1 LSB = 0.003052% change in sensitivity; 0x0000 = no scale adjustment, unity gain 1 + XGYRO_SCALE MEMS GYRO ADC FACTORY CALIBRATION AND FILTERING XGYRO_OFF_H X_GYRO_OUT X_GYRO_LOW XGYRO_OFF_L Figure 20. User Calibration Controls, X-Axis Gyroscope Example Rev. C | Page 20 of 28 09389-020 Bits [15:0] Data Sheet ADIS16375 Bias Null Command Restoring Factory Calibration The continuous bias estimator (CBE) accumulates and averages data in a 64-sample FIFO. The average time (TA) for the bias estimates relies on the sample time base setting in NULL_CFG[7:0] (see Table 77). Users can load the correction factors of the CBE into the gyroscope offset correction registers (see Table 59, Table 60, Table 61, Table 62, Table 63, Table 64) using the bias null command in GLOB_CMD[0] (see Table 90). NULL_CFG[13:8] provide on/off controls for the sensors that update when issuing a bias null command. The factory-default configuration for NULL_CFG enables the bias null command for the gyroscopes, disables the bias null command for the accelerometers, and establishes the average time to 53.3 seconds. Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[6] = 1 (DIN = 0x8240, 0x8300) to execute the factory calibration restore function. This function resets each user calibration register to zero, resets all sensor data to 0, and automatically updates the flash memory within 72 ms. See Table 90 for more information on GLOB_CMD. Table 77. NULL_CFG (Page 3, Base Address = 0x0E) Description (Default = 0x070B) Not used Z-axis acceleration bias correction enable (1 = enabled) Y-axis acceleration bias correction enable (1 = enabled) X-axis acceleration bias correction enable (1 = enabled) Z-axis gyroscope bias correction enable (1 = enabled) Y-axis gyroscope bias correction enable (1 = enabled) X-axis gyroscope bias correction enable (1 = enabled) Not used Time base control (TC), range: 0 to 13 (default = 11); TB = 2TC/2460, time base, TA = 64 x TB, average time Turn to Page 3 (DIN = 0x8003) and set GLOB_CMD[0] = 1 (DIN = 0x8201, then DIN = 0x8300) to update the user offset registers with the correction factors of the CBE. Make sure that the inertial platform is stable during the entire average time for optimal bias estimates. MEMS gyroscopes typically have a bias response to linear acceleration that is normal to their axis of rotation. The ADIS16375 offers an optional compensation function for this effect. Turn to Page 3 (DIN = 0x8003) and set GEN_CONFIG[7] = 1 (DIN = 0x8A80, then DIN = 0x8B00). These example commands also disable the point of percussion. To enable this function as well, use DIN = 0x8AC0, 0x8B00. This function reduces the gyroscope bias response by a factor of at least 10. Table 78. GEN_CONFIG (Page 3, Base Address = 0x0A) Bits [15:8] [7] [6] [5:2] [1] [0] Description (Default = 0x00C0) Not used Linear-g compensation for gyroscopes (1 = enabled) Point of percussion alignment (1 = enabled) Not used Real-time clock, daylight savings time (1: enabled, 0: disabled) Real-time clock control (1: relative/elapsed timer mode, 0: calendar mode) Point of Percussion Alignment GEN_CONFIG[6] offers a point of percussion alignment function that maps the accelerometer sensors to the corner of the package identified in Figure 21. To activate this feature, turn to Page 3 (DIN = 0x8003), then set GEN_CONFIG[6] = 1 (DIN = 0x8A40, 0x8B00. These example commands also disable the linear-g compensation. To enable this function as well, use DIN = 0x8AC0, 0x8B00. PIN 23 PIN 1 POINT OF PERCUSSION ALIGNMENT REFERENCE POINT. SEE GEN_CONFIG[6]. Figure 21. Point of Percussion Reference Point Rev. C | Page 21 of 28 09389-021 Bits [15:14] [13] [12] [11] [10] [9] [8] [7:4] [3:0] Linear Acceleration on Effect on Gyroscope Bias ADIS16375 Data Sheet ALARMS The alarm function provides independent alarms for each inertial sensor. Table 79 contains a list of registers that provide configuration and control inputs for the alarm function. Table 79. Registers for Alarm Configuration Register ALM_CONFIG1 ALM_CONFIG2 XG_ALM_MAG YG_ALM_MAG ZG_ALM_MAG XA_ALM_MAG YA_ALM_MAG ZA_ALM_MAG Page 3 3 3 3 3 3 3 3 Address 0x20 0x22 0x40 0x42 0x44 0x46 0x48 0x4A Description Alarm configuration Alarm configuration X-axis gyroscope trigger Y-axis gyroscope trigger Z-axis gyroscope trigger X-axis accelerometer trigger Y-axis accelerometer trigger Z-axis accelerometer trigger Static Alarm Use The static alarm setting compares each sensor's output with the trigger settings in the xG_ALM_MAG and xA_ALM_MAG registers (see Table 80, Table 81, Table 82, Table 83, Table 84, and Table 85) of that sensor. The polarity controls for each alarm are in the ALM_CONFIG_x registers (see Table 86 and Table 87). The polarity establishes whether greater than or less than produces an alarm condition. The comparison between the xG_ALM_MAG (or xA_ALM_MAG) value and the output data only applies to the upper word or 16 bits of the output data. Table 80. XG_ALM_MAG (Page 3, Base Address = 0x40) Bits [15:0] Description (Default = 0x0000) X-axis gyroscope alarm threshold settings; matches format of the X_GYRO_OUT register in Table 11 Description (Default = 0x0000) Y-axis gyroscope alarm threshold settings; matches format of the Y_GYRO_OUT register in Table 12 Table 82. ZG_ALM_MAG (Page 3, Base Address = 0x44) Bits [15:0] Description (Default = 0x0000) Z-axis gyroscope alarm threshold settings; matches format of the Z_GYRO_OUT register in Table 13 Table 83. XA_ALM_MAG (Page 3, Base Address = 0x46) Bits [15:0] Description (Default = 0x0000) X-axis accelerometer alarm threshold settings; uses the same format as X_ACCL_OUT, see Table 18 Table 84. YA_ALM_MAG (Page 3, Base Address = 0x48) Bits [15:0] Description (Default = 0x0000) Y-axis accelerometer alarm threshold settings; uses the same format as Y_ACCL_OUT, see Table 19 Table 85. ZA_ALM_MAG (Page 3, Base Address = 0x4A) Bits [15:0] The dynamic alarm setting provides the option of comparing the change in each sensor's output over a period of 48.7 ms, with that sensor's xx_ALM_MAG register. Alarm Reporting Monitor each sensor's alarm by reading the ALM_STS register (see Table 43), located in Page 0. The FNCIO_CTRL register (see Table 93) provides a control for establishing any of the DIOx lines as an alarm indicator output signal. Table 86. ALM_CONFIG_1 (Page 3, Base Address = 0x20) Bits [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) X-axis accelerometer alarm (1 = enabled) Not used X-axis accelerometer alarm polarity (1 = greater than) X-axis accelerometer dynamic enable (1 = enabled) Z-axis gyroscope alarm (1 = enabled) Not used Z-axis gyroscope alarm polarity (1 = greater than) Z-axis gyroscope dynamic enable (1 = enabled) Y-axis gyroscope alarm (1 = enabled) Not used Y-axis gyroscope alarm polarity (1 = greater than) Y-axis gyroscope dynamic enable (1 = enabled) X-axis gyroscope alarm (1 = enabled) Not used X-axis gyroscope alarm polarity (1 = greater than) X-axis gyroscope dynamic enable (1 = enabled) Table 87. ALM_CONFIG_2 (Page 3, Base Address = 0x22) Table 81. YG_ALM_MAG (Page 3, Base Address = 0x42) Bits [15:0] Dynamic Alarm Use Description (Default = 0x0000) Z-axis accelerometer alarm threshold settings; uses the same format as Z_ACCL_OUT, see Table 20 Bits [15:8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) Not used Z-axis accelerometer alarm (1 = enabled) Not used Z-axis accelerometer alarm polarity (1 = greater than) Z-axis accelerometer dynamic enable (1 = enabled) Y-axis accelerometer alarm (1 = enabled) Not used Y-axis accelerometer alarm polarity (1 = greater than) Y-axis accelerometer dynamic enable (1 = enabled) Alarm Example Table 88 offers an alarm configuration example, which sets the X-axis gyroscope alarm to trip when X_GYRO_OUT > 131.1/sec (0x2710). Table 88. Alarm Configuration Example 1 DIN 0xC010 0xC127 0xA006 0xA100 Rev. C | Page 22 of 28 Description Set XA_ALM_MAG[7:0] = 0x10 Set XA_ALM_MAG[15:8] = 0x27 Set ALM_CONFIG_1[7:0] = 0x06 Set ALM_CONFIG_1[15:8] = 0x00 Data Sheet ADIS16375 SYSTEM CONTROLS Register FLSH_CNT_L FLSH_CNT_H GLOB_CMD FNCIO_CTRL GPIO_CTRL GEN_CONFIG SLP_CONFIG Page 2 2 3 3 3 3 3 Address 0x78 0x7A 0x02 0x06 0x08 0x0A 0x10 Description Flash memory write counter Flash memory write counter Global commands I/O Function control I/O General purpose control Clock configuration Sleep mode control GLOBAL COMMANDS The GLOB_CMD register (see Table 90) provides trigger bits for several operations. Write 1 to the appropriate bit in GLOB_CMD to start a function. After the function completes, the bit restores to 0. Table 90. GLOB_CMD (Page 3, Base Address = 0x02) Bits [15:8] [7] [6] [5:4] [3] [2] [1] [0] Description Not used Software reset Factory calibration restore Not used Flash memory update Flash memory test Self test Bias null Execution Time Not applicable 74 ms 50 ms Not applicable 375 ms 50 ms 10 ms See Table 77 Software Reset Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[7] = 1 (DIN = 0x8280, then DIN = 0x8300) to reset the operation, which removes all data, initializes all registers from their flash settings, and starts data collection. This function provides a firmware alternative to the RST line (see Table 5, Pin 8). MEMORY MANAGEMENT The data retention of the flash memory depends on temperature and the number of write cycles. Figure 22 characterizes the dependence on temperature and the FLSH_CNT_L (see Table 91) and FLSH_CNT_H (see Table 92) registers provide a running count of flash write cycles. The flash updates every time GLOB_CMD[6], GLOB_CMD[3], or GLOB_CMD[0] is set to 1. Table 91. FLSH_CNT_L (Page 2, Base Address = 0x78) Bits [15:0] Table 92. FLSH_CNT_H (Page 2, Base Address = 0x7A) Bits [15:0] Description Binary counter; number of flash updates, upper word 600 450 300 150 0 30 40 55 70 85 100 125 JUNCTION TEMPERATURE (C) Automatic Self Test Turn to Page 3 (DIN = 0x8003) and then set GLOB_CMD[1] = 1 (DIN = 0x8202, then DIN = 0x8300) to run an automatic self test routine, which executes the following steps: 1. 2. 3. 4. 5. 6. 7. Description Binary counter; number of flash updates, lower word Measure output on each sensor Activate self test on each sensor Measure output on each sensor Deactivate the self test on each sensor Calculate the difference with self test on and off Compare the difference with internal pass/fail criteria Report the pass/fail results for each sensor in DIAG_STS (see Table 42) 135 150 09389-022 Table 89. System Control Registers After waiting 10 ms for this test to complete, turn to Page 0 (DIN = 0x8000) and read DIAG_STS using DIN = 0x0A00. Note that using an external clock can extend this time. When using an external clock of 100 Hz, this time extends to 35 ms. Note that 100 Hz is too slow for optimal sensor performance; however, it demonstrates the potential for longer self test times. RETENTION (Years) The ADIS16375 provides a number of system-level controls for managing its operation using the registers listed in Table 89. Figure 22. Flash Memory Retention Flash Memory Test Turn to Page 3 (DIN = 0x8003), and then set GLOB_CMD[2] = 1 (DIN = 0x8204, then DIN = 0x8300) to run a check-sum test of the internal flash memory, which compares a factory-programmed sum with the current sum of the same memory locations. The result of this test loads into SYS_E_FLAG[6] (see Table 41). Read this register by turning to Page 0 (DIN = 0x8000) and using DIN = 0x0800 as the read request command. Rev. C | Page 23 of 28 ADIS16375 Data Sheet GENERAL-PURPOSE I/O There are four general-purpose I/O lines: DIO1, DIO2, DIO3, and DIO4. The FNCIO_CTRL register controls the basic function of each I/O line, which provides a number of useful functions. Table 93. FNCIO_CTRL (Page 3, Base Address = 0x06) Bits [15:12] [11] [10] [9:8] [7] [6] [5:4] [3] [2] [1:0] Description (Default = 0x000D) Not used Alarm indicator: 1 = enabled, 0 = disabled Alarm indicator polarity: 1 = positive, 0 = negative Alarm indicator line selection: 00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4 Sync clock input enable: 1 = enabled, 0 = disabled Sync clock input polarity: 1 = rising edge, 0 = falling edge Sync clock input line selection: 00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4 Data-ready enable: 1 = enabled, 0 = disabled Data-ready polarity: 1 = positive, 0 = negative Data-ready line selection: 00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4 Data-Ready Indicator FNCIO_CTRL[3:0] provide some configuration options for using one of the DIOx lines as a data-ready indicator signal, which can drive a processor's interrupt control line. The factorydefault assigns DIO2 as a positive-polarity, data-ready signal. Use the following sequence to change this assignment to DIO1 with a negative polarity: turn to Page 3 (DIN = 0x8003) and set FNCIO_CTRL[3:0] = 1000 (DIN = 0x8608, then DIN = 0x8700). The timing jitter on the data-ready signal is 1.4 s. Input Sync/Clock Control FNCIO_CTRL[7:4] provides some configuration options for using one of the DIOx lines as an input synchronization signal for sampling inertial sensor data. For example, use the following sequence to establish DIO4 as a positive-polarity, input clock pin and keep the factory default setting for the data-ready function: turn to Page 3 (DIN = 0x8003) and set FNCIO_CTRL[7:4] = 1111 (DIN = 0x86FD, then DIN = 0x8700). Note that this command also disables the internal sampling clock, and no data sampling takes place without the input clock signal. When using this mode, each clock pulse generates four sequential samples at a rate of 9.84 kHz, which are then averaged together. When selecting a clock input frequency, consider the 330 Hz sensor bandwidth, because undersampling the sensors can degrade noise and stability performance. DIO4 as input lines. Turn to Page 3 (DIN = 0x8003) and set GPIO_CTRL[7:0] = 0x15 (DIN = 0x8815, then DIN = 0x8900). Table 94. GPIO_CTRL (Page 3, Base Address = 0x08) Bits [15:8] [7] [6] [5] [4] [3] [2] [1] [0] Description (Default = 0x0000) Don't care General-Purpose I/O Line 4 (DIO4) data level General-Purpose I/O Line 3 (DIO3) data level General-Purpose I/O Line 2 (DIO2) data level General-Purpose I/O Line 1 (DIO1) data level General-Purpose I/O Line 4 (DIO4) direction control (1 = output, 0 = input) General-Purpose I/O Line 3 (DIO3) direction control (1 = output, 0 = input) General-Purpose I/O Line 2 (DIO2) direction control (1 = output, 0 = input) General-Purpose I/O Line 1 (DIO1) direction control (1 = output, 0 = input) POWER MANAGEMENT The SLP_CFG register (see Table 95) provides four different power management modes for system-level management: power-down, timed power-down, normal sleep, and timed sleep. The trade-off between power-down and sleep mode is between idle power and recovery time. Power-down mode offers the best idle power consumption but requires the most time to recover. All volatile settings are lost during power-down but are preserved during sleep mode. For timed sleep mode, turn to Page 3 (DIN = 0x8003), write the amount of sleep time to SLP_CFG[7:0], and set SLP_CFG[8] = 1 (DIN = 0x9101) to start the sleep period. For a timed power-down period, change the last command to set SLP_CFG[9] = 1 (DIN = 0x9102). To power down or sleep for an indefinite period, set SLP_CFG[7:0] = 0x00 first, then set either SLP_CFG[8] or SLP_CFG[9] to 1. Note that the command takes effect when the CS line goes high. To awaken the device from sleep or powerdown mode, use one of the following options to restore normal operation: * * * Assert CS from high to low Pulse RST low, then high again Cycle the power For example, set SLP_CFG[7:0] = 0x64 (DIN = 0x9064), then set SLP_CFG[8] = 1 (DIN = 0x9101) to start a sleep period of 100 seconds. General-Purpose I/O Control Table 95. SLP_CFG (Page 3, Base Address = 0x10) When FNCIO_CTRL does not configure a DIOx pin, the GPIO_CTRL provides a control register for general-purpose use of the pins. GPIO_CTRL[3:0] provides input/output assignment controls for each line. When the DIOx lines are inputs, monitor their level by reading GPIO_CTRL[7:4]. When the DIOx lines are used as outputs, set their level by writing to GPIO_CTRL[7:4]. For example, use the following sequence to set DIO1 and DIO3 as high and low output lines, respectively, and set DIO2 and Bits [15:10] [9] [8] [7:0] Description Not used Power-down mode Normal sleep mode Programmable sleep time bits; 1 sec/LSB; 0x00 = indefinite If the sleep mode and power-down mode bits are both set high, then the sleep mode (SLP_CFG[8]) bit take precedence. Rev. C | Page 24 of 28 Data Sheet ADIS16375 Real-Time Clock Configuration/Data The VDDRTC power supply pin (Pin 23, see Table 5) provides a separate supply for the real-time clock (RTC) function. This enables the RTC to keep track of time, even when the main supply (VDD) is off. Configure the RTC function by selecting one of two modes in GEN_CONFIG[0] (see Table 78). The real-time clock data is available in the TIME_MS_OUT (see Table 96), TIME_DH_OUT (see Table 97), and TIME_YM_OUT (see Table 98) registers. When using the elapsed timer mode, the time data registers start at 0x0000 when the device starts up (or resets) and begin keeping time in a manner that is similar to a stopwatch. When using the clock/calendar mode, write the current time to the real-time registers in the following sequence: seconds (TIME_MS_OUT[7:0]), minutes (TIME_MS_OUT[15:8]), hours (TIME_DH_OUT[7:0]), day (TIME_DH_OUT[15:8]), month (TIME_YM_OUT[7:0]), and year (TIME_YM_OUT[15:8]). The updates to the timer do not go active until a successful write to the TIME_YM_OUT[15:8] byte. The six registers reflect the newly updated values only after the next seconds tick of the clock that follows the write to TIME_YM_OUT[15:8] (year). Writing to TIME_YM_OUT[15:8] activates all timing values; therefore, always write to this location last when updating the timer, even if the year information does not require updating. Write the current time to each time data register after setting GEN_CONFIG[0] = 1 (DIN = 0x8003, 0x8A01, and 0x8B00). Note that GEN_CONFIG[1] provides a bit for managing daylight savings time. After the GEN_CONFIG and TIME_xx_OUT registers are configured, set GLOB_CMD[3] = 1 (DIN = 0x8003, 0x8204, and 0x8300) to back these settings up in flash, and use a separate 3.3 V source to supply power to the VDDRTC function. Note that access to time data in the TIME_xx_OUT registers requires normal operation (VDD = 3.3 V and full startup), but the timer function only requires that VDDRTC = 3.3 V when the rest of the ADIS16375 is turned off. Table 96. TIME_MS_OUT (Page 0, Base Address = 0x70) Bits [15:14] [13:8] [7:6] [5:0] Description Not used Minutes, binary data, range = 0 to 59 Not used Seconds, binary data, range = 0 to 59 Table 97. TIME_DH_OUT (Page 0, Base Address = 0x72) Bits [15:13] [12:8] [7:6] [5:0] Description Not used Day, binary data, range = 1 to 31 Not used Hours, binary data, range = 0 to 23 Table 98. TIME_YM_OUT (Page 0, Base Address = 0x74) Bits [15] [14:8] [7:4] [3:0] Rev. C | Page 25 of 28 Description Not used Year, binary data, range = 0 to 99, relative to 2000 A.D. Not used Month, binary data, range = 1 to 12 ADIS16375 Data Sheet APPLICATIONS INFORMATION PROTOTYPE INTERFACE BOARD INSTALLATION TIPS The ADIS16375/PCBZ includes one ADIS16375AMLZ, one interface printed circuit board (PCB), and four M2 x 18 machine screws. The interface PCB provides larger connectors than the ADIS16375AMLZ for simpler prototyping, four-tapped M2 holes for attachment of the ADIS16375AMLZ, and four holes (machine screw size M2.5 or #4) for mounting the ADIS16375AMLZ to a solid structure. J1 is a dual-row, 2 mm (pitch) connector that mates to a number of ribbon cable systems, including 3M Part Number 152212-0100-GB (ribbon crimp connector) and 3M Part Number 3625/12 (ribbon cable). Note that J1 has 16 pads; however, some legacy boards use only Pin 1 through Pin 12. Figure 24 and Figure 25 provide the mechanical design information used for the ADIS16375/PCBZ. Use these figures when implementing a connector-down approach, where the mating connector and the ADIS16375AMLZ are on the same surface. When designing a connector-up system, use the mounting holes shown in Figure 24 as a guide in designing the bulkhead mounting system and use Figure 25 as a guide in developing the mating connector interface on a flexible circuit or other connector system. The suggested torque setting for the attachment hardware is 40 inch-ounces, or 0.2825 N-m. 39.600 BSC Table 99 provides the pin assignments for J1. The pin assignments for J2 match those listed in Table 5. The C1 and C2 locations provide solder pads for extra capacitors, which can provide additional filtering for start-up transients and system power supply noise. 19.800 BSC 1.642 BSC 0.560 BSC 2x ALIGNMENT HOLES FOR MATING SOCKET 5 BSC 5 BSC 09389-037 ADIS16375 MOUNTING HOLES 59.69mm 66.04mm 21.300 BSC 42.600 2.500 BSC 4x NOTES 1. ALL DIMENSIONS IN mm UNITS. 6.35mm Figure 24. Suggested Mounting Hole Locations, Connector Down 0.4334 [11.0] 0.019685 [0.5000] (TYP) 0.0240 [0.610] 0.054 [1.37] 0.0394 [1.00] 0.1800 [4.57] 58.42mm 64.77mm Figure 23. Physical Diagram for the ADIS16375/PCBZ Table 99. ADIS16375/PCBZ J1 Pin Assignments Pin 1 3 5 7 9 11 13 15 Function Reset, RST Chip select, CS DNC Ground, GND Ground, GND Power supply, VDD Digital I/O, DIO1 Digital I/O, DIO3 Pin 2 4 6 8 10 12 14 16 Function Serial clock, SCLK Data output, DOUT Data input, DIN Ground, GND Power supply, VDD Power supply, VDD Digital I/O, DIO2 Digital I/O, DIO4 0.022 DIA (TYP) 0.022 DIA THRU HOLE (TYP) NONPLATED NONPLATED THRU HOLE THRU HOLE 2x 0.0394 [1.00] 09389-026 09389-028 6.35mm Figure 25. Suggested Layout and Mechanical Design for the Mating Connector Rev. C | Page 26 of 28 Data Sheet ADIS16375 OUTLINE DIMENSIONS 44.254 44.000 43.746 O 2.40 BSC (4 PLCS) 39.854 39.600 39.346 19.20 19.80 19.40 2.20 BSC DETAIL A 15.00 BSC 0.069 0.054 0.039 8.25 BSC 42.80 42.60 42.30 1.00 BSC 47.254 47.000 46.746 DETAIL A BOTTOM VIEW 14.200 14.000 13.800 DETAIL B FRONT VIEW 6.50 BSC 3.454 3.200 2.946 5.50 BSC 5.50 BSC 1.00 BSC PITCH 0.30 SQ BSC DETAIL B 03-28-2012-C 2.84 BSC Figure 26. 24-Lead Module with Connector Interface (ML-24-6) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADIS16375AMLZ ADIS16375BMLZ ADIS16375/PCBZ 1 Temperature Range -40C to +85C -40C to +105C Package Description 24-Lead Module with Connector Interface 24-Lead Module with Connector Interface Interface PCB Z = RoHS Compliant Part. Rev. C | Page 27 of 28 Package Option ML-24-6 ML-24-6 ADIS16375 Data Sheet NOTES (c)2010-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09389-0-8/12(C) Rev. C | Page 28 of 28