AI00710B
17
A0-A16
P
Q0-Q7
VPP
VCC
M27C1001
G
E
VSS
8
Figure 1. Logic Diagram
M27C1001
1 Megabit (128K x 8) UV EPROM and OTP EPROM
FASTACCESS TIME: 45ns
LOW POWER ”CMOS CONSUMPTION:
ActiveCurrent 30mA
StandbyCurrent 100µA
PROGRAMMINGVOLTAGE:12.75V
ELECTRONIC SIGNATUREfor AUTOMATED
PROGRAMMING
PROGRAMMINGTIMES of AROUND12sec.
(PRESTO II ALGORITHM)
DESCRIPTION
The M27C1001 is a high speed 1 Megabit UV
erasable and electrically programmable EPROM
ideallysuitedformicroprocessorsystemsrequiring
largeprograms.Itisorganizedas131,072by8bits.
The Window Ceramic Frit-Seal Dual-in-Line and
LeadlessChip Carrierpackages have transparent
lids which allow the user to expose the chip to
ultraviolet light to erase the bit pattern. A new
patterncan then be written to the device byfollow-
ing the programming procedure. For applications
where the content is programmed only one time
and erasure is not required, the M27C1001 is
offeredin both PlasticDual-in-Line, PlasticLeaded
Chip Carrier and Plastic Thin Small Outline pack-
ages.
A0 -A16 Address Inputs
Q0 - Q7 Data Outputs
E Chip Enable
G Output Enable
P Program
VPP Program Supply
VCC Supply Voltage
VSS Ground
Table 1. Signal Names
PLCC32 (C)
LCCC32W (L)
1
32
FDIP32W (F)
TSOP32 (N)
8 x 20mm
June 1996
32
1
PDIP32 (B)
1/16
DEVICEOPERATION
ThemodesofoperationoftheM27C1001arelisted
in the Operating Modes table. A single power
supplyis required in the read mode. All inputs are
TTLlevels except for VPP and 12V on A9 for Elec-
tronicSignature.
Read Mode
The M27C1001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
OutputEnable (G) is the output controland should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV) isequaltothedelayfromEtooutput(tELQV).
Datais availableatthe outputafter a delayof tGLQV
from the falling edge of G, assuming that E has
been low and the addresseshave been stable for
atleast tAVQV-tGLQV.
Standby Mode
The M27C1001 has a standby mode which re-
ducestheactive currentfrom 30mAto 100µA. The
M27C1001 is placed in the standby mode by ap-
plying a CMOS high signalto the E input. When in
thestandbymode, theoutputsare ina highimped-
ance state,independentof theG input.
A1
A0
Q0
A7
A4
A3
A2
A6
A5
A13
A10
A8
A9
Q7
A14
A11
G
E
Q5Q1
Q2 Q3VSS Q4
Q6
NC
PA16
A12
VPP VCC
A15
AI00711
M27C1001
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Figure2A. DIPPin Connections
A1
A0
Q0
A7
A4 A3
A2
A6
A5
A13
A10
A8
A9
Q7
A14
A11 G
E
Q5
Q1
Q2
Q3
Q4
Q6
NC
P
A16
A12
VPP
VCC
A15
AI01151B
M27C1001
(Normal)
8
1
9
16 17
24
25
32
VSS
Figure2C. TSOPPin Connections
Warning: NC = Not Connected. Warning: NC = Not Connected.
AI00712
NC
A8
A10
Q5
17
A1
A0
Q0
Q1
Q2
Q3
Q4
A7
A4
A3
A2
A6
A5
9
P
A9
1
A16
A11
A13
A12
Q7
32
VPP
VCC
M27C1001
A15
A14
Q6
G
E
25
VSS
Figure 2B. LCC Pin Connections
Warning: NC = Not Connected.
2/16
M27C1001
Mode E G P A9 VPP Q0 - Q7
Read VIL VIL XXV
CC or VSS Data Out
Output Disable VIL VIH XXV
CC or VSS Hi-Z
Program VIL VIH VIL Pulse X VPP Data In
Verify VIL VIL VIH XV
PP Data Out
Program Inhibit VIH XXXV
PP Hi-Z
Standby VIH XXXV
CC or VSS Hi-Z
Electronic Signature VIL VIL VIH VID VCC Codes
Note:X=V
IH or VIL,V
ID = 12V ±0.5V
Table 3. OperatingModes
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code VIL 00100000 20h
Device Code VIH 00000101 05h
Table 4. Electronic Signature
Two Line Output Control
BecauseEPROMsareusuallyused inlargermem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection.The two line control function
allows :
a. the lowest possible memory powerdissipation,
b. completeassurance that output bus contention
willnot occur.
For themost efficientuse ofthesetwocontrollines,
E should be decoded and used as the primary
deviceselectingfunction,while G should be made
a common connection to all devices in the array
and connectedto the READ line from the system
control bus. This ensuresthat all deselectedmem-
ory devices are in their low power standby mode
and that theoutput pins are only activewhen data
is requiredfrom a particular memory device.
Symbol Parameter Value Unit
TAAmbient Operating Temperature –40 to 125 °C
TBIAS Temperature Under Bias –50 to 125 °C
TSTG Storage Temperature –65 to 150 °C
VIO (2) Input orOutput Voltages (except A9) –2 to 7 V
VCC Supply Voltage –2 to 7 V
VA9 (2) A9 Voltage –2 to 13.5 V
VPP Program Supply Voltage –2 to 14 V
Notes: 1. Exceptfor the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sectionsof this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability.Refer also to the SGS-THOMSON SURE Programand other
relevant quality documents.
2. Minimum DC voltage on Inputor Output is –0.5Vwith possibleundershoot to 2.0V for aperiod less than 20ns. MaximumDC
voltage on Outputis VCC +0.5V with possible overshoot to VCC +2V for a period less than20ns.
Table 2. Absolute MaximumRatings (1)
3/16
M27C1001
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure3. ACTesting Input Output Waveform
AI01823
1.3V
OUT
CL= 30pF or 100pF
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure 4. AC Testing Load Circuit
High Speed Standard
Input Rise and Fall Times 10ns 20ns
Input PulseVoltages 0 to 3V 0.4Vto 2.4V
Input and Output TimingRef. Voltages 1.5V 0.8Vand 2V
Table 5. ACMeasurement Conditions
Symbol Parameter TestCondition Min Max Unit
CIN Input Capacitance VIN =0V 6 pF
C
OUT Output Capacitance VOUT =0V 12 pF
Note: 1. Sampled only, not 100% tested.
Table 6. Capacitance(1) (TA=25°C, f = 1 MHz )
SystemConsiderations
The power switching characteristics of Advanced
CMOSEPROMsrequire careful decouplingof the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitiveandinductiveloadingofthedeviceatthe
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
andVSS. Thisshouldbe ahigh frequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
betweenVCC and VSS for everyeight devices.The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
4/16
M27C1001
Symbol Parameter Test Condition Min Max Unit
ILI InputLeakage Current 0V VIN VCC ±10 µA
ILO Output Leakage Current 0V VOUT VCC ±10 µA
ICC SupplyCurrent E=V
IL,G=V
IL,
IOUT = 0mA, f = 5MHz 30 mA
ICC1 SupplyCurrent (Standby) TTL E = VIH 1mA
I
CC2 SupplyCurrent (Standby) CMOS E > VCC 0.2V 100 µA
IPP Program Current VPP =V
CC 10 µA
VIL InputLow Voltage –0.3 0.8 V
VIH (2) InputHigh Voltage 2 VCC +1 V
V
OL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –400µA 2.4 V
Output High Voltage CMOS IOH = –100µAV
CC 0.7V V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltageon Outputis VCC +0.5V.
Table 7. Read Mode DC Characteristics(1)
(TA= 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC =5V±5% or5V ±10%; VPP =V
CC)
Symbol Alt Parameter TestCondition M27C1001 Unit
-45 (3) -60 -70
Min Max Min Max Min Max
tAVQV tACC Address Valid to
Output Valid E=V
IL,G=V
IL 45 60 70 ns
tELQV tCE ChipEnable Low to
Output Valid G=V
IL 45 60 70 ns
tGLQV tOE Output Enable Low
to Output Valid E=V
IL 25 30 35 ns
tEHQZ (2) tDF ChipEnable High to
Output Hi-Z G=V
IL 0 25 0 30 0 30 ns
tGHQZ (2) tDF Output Enable High
to Output Hi-Z E=V
IL 0 25 0 30 0 30 ns
tAXQX tOH Address Transition to
Output Transition E=V
IL,G=V
IL 000ns
Notes: 1. VCC must be applied simultaneously with or before VPP andremoved simultaneously orafter VPP.
2. Sampled only, not 100% tested.
3. In case of45ns speed see High Speed AC measurament conditions.
Table 8A. Read Mode AC Characteristics(1)
(TA= 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC =5V±5%or 5V ±10%; VPP =VCC)
5/16
M27C1001
Symbol Alt Parameter TestCondition
M27C1001
Unit
-80 -90 -10 -12/-15/
-20/-25
Min Max Min Max Min Max Min Max
tAVQV tACC Address Valid to
Output Valid E=V
IL,G=V
IL 80 90 100 120 ns
tELQV tCE ChipEnable Low to
Output Valid G=V
IL 80 90 100 120 ns
tGLQV tOE Output Enable Low
to Output Valid E=V
IL 40 45 50 60 ns
tEHQZ (2) tDF ChipEnable High to
Output Hi-Z G=V
IL 0 30 0 30 0 30 0 40 ns
tGHQZ (2) tDF Output Enable High
to Output Hi-Z E=V
IL 0 30 0 30 0 30 0 40 ns
tAXQX tOH Address Transition to
Output Transition E=V
IL,G=V
IL 0000ns
Notes: 1. VCC must be applied simultaneously with or before VPP andremoved simultaneously orafter VPP.
2. Sampled only, not 100% tested.
Table 8B. Read Mode AC Characteristics(1)
(TA= 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC =5V±5%or 5V ±10%; VPP =VCC)
AI00713
tAXQX
tEHQZ
DATA OUT
A0-A16
E
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
Figure5. Read Mode AC Waveforms
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C1001 are in the ”1
state. Data is introduced by selectively program-
ming ”0”s into the desired bit locations. Although
only ”0”s will be programmed, both ”1”s and 0”s
can be present in the data word. The only way to
change a ”0 to a 1” is by die exposition to ultra-
violet light (UV EPROM). The M27C1001 is in the
programming mode whenVpp input is at 12.75V,E
is at VIL and P is pulsed to VIL. The data to be
programmed is applied to 8 bits in parallel to the
data output pins. The levels required for the ad-
dress and datainputs are TTL. VCC isspecified to
be 6.25V ±0.25V.
6/16
M27C1001
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIL VIN VIH ±10 µA
ICC Supply Current 50 mA
IPP Program Current E = VIL 50 mA
VIL Input Low Voltage –0.3 0.8 V
VIH Input High Voltage 2 VCC + 0.5 V
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –400µA 2.4 V
VID A9 Voltage 11.5 12.5 V
Note: 1. VCC must be applied simultaneously with or before VPP andremoved simultaneously orafter VPP.
Table 9. ProgrammingMode DCCharacteristics (1)
(TA=25°C; VCC = 6.25V ±0.25V;VPP = 12.75V ±0.25V)
Symbol Alt Parameter Test Condition Min Max Unit
tAVPL tAS Address Valid to Program Low 2 µs
tQVPL tDS Input Validto Program Low 2 µs
tVPHPL tVPS VPP High to Program Low 2 µs
tVCHPL tVCS VCC High to Program Low 2 µs
tELPL tCES Chip Enable Low to
Program Low 2µs
tPLPH tPW Program Pulse Width 95 105 µs
tPHQX tDH Program Highto Input
Transition 2µs
tQXGL tOES Input Transition to Output
Enable Low 2µs
tGLQV tOE Output Enable Low to
Output Valid 100 ns
tGHQZ (2) tDFP Output Enable High to
Output Hi-Z 0 130 ns
tGHAX tAH Output Enable High to
Address Transition 0ns
Notes: 1. VCC must be applied simultaneously with or before VPP andremoved simultaneously orafter VPP.
2. Sampled only, not 100% tested.
Table 10. ProgrammingMode AC Characteristics(1)
(TA=25°C; VCC = 6.25V ±0.25V;VPP = 12.75V ±0.25V)
7/16
M27C1001
tAVPL
VALID
AI00714
A0-A16
Q0-Q7
VPP
VCC
P
G
DATA IN DATA OUT
E
tQVPL
tVPHPL
tVCHPL
tPHQX
tPLPH
tGLQV
tQXGL
tELPL
tGHQZ
tGHAX
PROGRAM VERIFY
Figure6. Programming and Verify ModesAC Waveforms
AI00715C
n=0
Last
Addr
VERIFY
P = 100µs Pulse
++n
=25 ++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC =6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
Figure 7. Programming Flowchart PRESTO II ProgrammingAlgorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed,with a guaranteed
margin, in a typicaltime of 13 seconds.Program-
ming with PRESTO II involves in applying a se-
quenceof 100µs program pulsesto eachbyte until
a correctverify occurs (see Figure 7). During pro-
gramming and verify operation,a MARGIN MODE
circuitis automaticallyactivatedinordertoguaran-
tee that each cell is programmed with enough
margin. No overprogrampulse isapplied since the
verifyin MARGIN MODE provides necessary mar-
gin to eachprogrammed cell.
Program Inhibit
Programming of multiple M27C1001s in parallel
with different data is also easily accomplished.
Except for E, all like inputs including G of the
parallel M27C1001 may be common. A TTL low
level pulse applied to a M27C1001’sP input, with
ElowandV
PP at 12.75V, will program that
M27C1001. Ahigh level E input inhibits the other
M27C1001sfrom being programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determinethat theywere correctly
programmed. The verify is accomplished with E
and G at VIL, P at VIH,V
PP at 12.75V and VCC at
6.25V.
8/16
M27C1001
On-Board Programming
The M27C1001can be directlyprogrammed inthe
application circuit. See the relevant Application
NoteAN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out ofa binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automaticallymatch the device to be programmed
withitscorrespondingprogrammingalgorithm.The
ES mode is functionalin the 25°C±5°C ambient
temperaturerange that is requiredwhen program-
ming theM27C1001.To activatethe ES mode, the
programmingequipmentmustforce11.5Vto 12.5V
on address line A9 of the M27C1001, with
VPP=VCC=5V. Two identifier bytes may then be
sequenced from the device outputs by toggling
address line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode.
Byte0 (A0=VIL) representsthe manufacturercode
and byte1(A0=VIH) thedevice identifiercode. For
the SGS-THOMSON M27C1001, thesetwo identi-
fier bytes are given in Table4 andcan be read-out
on outputsQ0 to Q7.
ERASURE OPERATION (applies to UV EPROM)
The erasure characteristics of the M27C1001 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately4000Å.Itshouldbenotedthatsunlight
and some type of fluorescent lamps have wave-
lengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo-
rescentlighting could erase a typical M27C1001in
about3 years, while it wouldtake approximately1
week to cause erasure when exposed to direct
sunlight. IftheM27C1001isto beexposedto these
typesof lightingconditionsforextended periodsof
time,itis suggestedthat opaquelabels beput over
the M27C1001 window to prevent unintentional
erasure. The recommendederasure procedurefor
theM27C1001isexposuretoshortwaveultraviolet
light which has a wavelengthof 2537 Å. The inte-
grated dose (i.e. UV intensityx exposuretime) for
erasure should be a minimum of 15 W-sec/cm2.
Theerasuretime withthisdosageis approximately
15 to 20 minutes using an ultraviolet lamp with
12000 µW/cm2power rating. The M27C1001
should beplacedwithin 2.5 cm(1 inch) of the lamp
tubes during the erasure. Somelamps have afilter
on their tubes which should be removed before
erasure.
9/16
M27C1001
Speed
-45 (1) 45 ns
-60 60 ns
-70 70 ns
-80 80 ns
-90 90 ns
-10 100 ns
-12 120 ns
-15 150 ns
-20 200 ns
-25 250 ns
VCC Tolerance
X±5%
blank ±10%
Package
F FDIP32W
L LCCC32W
B PDIP32
C PLCC32
N TSOP32
8x 20mm
Temperature Range
1 0 to 70 °C
3 –40 to 125 °C
6 –40 to 85 °C
Option
X Additional
Burn-in
TR Tape& Reel
Packing
Example: M27C1001 -70 X C 1 TR
ORDERING INFORMATION SCHEME
Note: 1. High Speed, see AC Characteristics section for further information
Foralistofavailableoptions(Speed,VCC Tolerance,Package,etc...) refer tothe currentMemoryShortform
catalogue.
For further information on any aspect of this device, please contact the SGS-THOMSON Sales Office
nearestto you.
10/16
M27C1001
FDIP32W - 32 pin Ceramic Frit-seal DIP, with window
FDIPW-a
A2
A1
A
L
B1 B e1
D
S
E1 E
N
1
CαeA
e3
Symb mm inches
Typ Min Max Typ Min Max
A 5.71 0.225
A1 0.50 1.78 0.020 0.070
A2 3.90 5.08 0.154 0.200
B 0.40 0.55 0.016 0.022
B1 1.27 1.52 0.050 0.060
C 0.22 0.31 0.009 0.012
D 42.78 1.684
E 15.40 15.80 0.606 0.622
E1 14.50 14.90 0.571 0.587
e1 2.54 0.100
e3 38.10 1.500
eA 16.17 18.32 0.637 0.721
L 3.18 4.10 0.125 0.161
S 1.52 2.49 0.060 0.098
9.65 0.380
α4°15°4°15°
N32 32
FDIP32W
Drawing is not to scale
11/16
M27C1001
LCCC32W - 32 lead Leadless Ceramic Chip Carrier, square window
LCCCW-a
e3
1
NL1
B
Lhx45
o
jx45
o
e2
e
e1
A
D
EK
K1
Symb mm inches
Typ Min Max Typ Min Max
A 2.28 0.090
B 0.51 0.71 0.020 0.028
D 11.23 11.63 0.442 0.458
E 13.72 14.22 0.540 0.560
e 1.27 0.050
e1 0.39 0.015
e2 7.62 0.300
e3 10.16 0.400
h 1.02 0.040
j 0.51 0.020
L 1.14 1.40 0.045 0.055
L1 1.96 2.36 0.077 0.093
K 10.50 10.80 0.413 0.425
K1 8.03 8.23 0.316 0.324
N32 32
LCCC32W
Drawing is not to scale
12/16
M27C1001
PDIP32 - 32 lead Plastic DIP, 600 mils width
Symb mm inches
Typ Min Max Typ Min Max
A 4.83 0.190
A1 0.38 0.015
A2–––––
B 0.41 0.51 0.016 0.020
B1 1.14 1.40 0.045 0.055
C 0.20 0.30 0.008 0.012
D 41.78 42.04 1.645 1.655
E 15.24 15.88 0.600 0.625
E1 13.46 13.97 0.530 0.550
e1 2.54 0.100
eA 15.24 0.600
L 3.18 3.43 0.125 0.135
S 1.78 2.03 0.070 0.080
α0°15°0°15°
N32 32
PDIP32
PDIP
A2
A1
A
L
B1 B e1
D
S
E1 E
N
1
CαeA
Drawing is not to scale
13/16
M27C1001
PLCC
D
Ne E1 E
1N
D1
Nd
CP
B
D2/E2 e
B1
A1
A
Drawing is not to scale
PLCC32 - 32 lead Plastic Leaded Chip Carrier,rectangular
Symb mm inches
Typ Min Max Typ Min Max
A 2.54 3.56 0.100 0.140
A1 1.52 2.41 0.060 0.095
B 0.33 0.53 0.013 0.021
B1 0.66 0.81 0.026 0.032
D 12.32 12.57 0.485 0.495
D1 11.35 11.56 0.447 0.455
D2 9.91 10.92 0.390 0.430
E 14.86 15.11 0.585 0.595
E1 13.89 14.10 0.547 0.555
E2 12.45 13.46 0.490 0.530
e 1.27 0.050
N32 32
Nd 7 7
Ne 9 9
CP 0.10 0.004
PLCC32
14/16
M27C1001
TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20mm
TSOP-a
D1
E
1N
CP
B
e
A2
A
N/2
D
DIE
C
LA1 α
Symb mm inches
Typ Min Max Typ Min Max
A 1.20 0.047
A1 0.05 0.17 0.002 0.006
A2 0.95 1.50 0.037 0.059
B 0.15 0.27 0.006 0.011
C 0.10 0.21 0.004 0.008
D 19.80 20.20 0.780 0.795
D1 18.30 18.50 0.720 0.728
E 7.90 8.10 0.311 0.319
e 0.50 0.020
L 0.50 0.70 0.020 0.028
α0°5°0°5°
N32 32
CP 0.10 0.004
TSOP32
Drawing is not to scale
15/16
M27C1001
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringementof patents or other rights ofthird parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights ofSGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are notauthorized for useas critical components in life supportdevices or systemswithout express
written approval of SGS-THOMSON Microelectronics.
1996 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada- China - France - Germany- Hong Kong - Italy -Japan - Korea- Malaysia - Malta - Morocco - The Netherlands -
Singapore- Spain - Sweden - Switzerland - Taiwan- Thailand - United Kingdom- U.S.A.
16/16
M27C1001