International Rectifier HEXFET Power MOSFET Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Repetitive Avalanche Rated 175C Operating Temperature Fast Switching Ease of Paralleling PD-9.897 IRF530S Voss = 100V Roscon) = 0.1 6Q Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low Ip = 144 on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. Absolute Maximum Ratings SMD-220 Parameter Max. Units Ip @ Tc = 25C Continuous Drain Current, Ves @ 10 V 14 Ip @ Te = 100C | Continuous Drain Current, Veg @ 10 V 10 A lpm Pulsed Drain Current 56 Pp @ Tc =25C_| Power Dissipation 88 Ww Pp @ Ta= 25C | Power Dissipation (PCB Mount}** 3.7 Linear Derating Factor 0.59 WeC. | Linear Derating Factor (PCB Mount)** 0.025 Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy 69 ms | laR Avalanche Current 14 A Ear Repetitive Avalanche Energy 8.8 mJ dv/dt Peak Diode Recovery dv/dt @ 5.5 Vins Tu, Tsta Junction and Storage Temperature Range -55 to +175 6 Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. | Units Roc Junction-to-Case _ _ 17 Resa Junction-to-Ambient (PCB mount)** _ =_ 40 C Raa Junction-to-Ambient _ _ 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 143IRF530S | Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Viarypss Drain-to-Source Breakdown Voltage 100 | _ V_ | Vas=0V, In= 250nA AV prypss/ATy| Breakdown Voltage Temp. Coefficient | 012} | V/PC | Reference to 25C, Ip= 1mA Ros(ony Static Drain-to-Source On-Resistance _ | 0.16; QO | Ves=10V, Ip=8.4A @ Vestn) Gate Threshold Voltage 2.0 ~ 4.0 V__ | Vos=Ves, Ip= 250nA fs Forward Transconductance 5.1 _ _ S| Vos=50V, Ip=8.4A @ loss Drain-to-Source Leakage Current 2 HA Vos=100V, Vas=0V _ _ 250 Vos=80V, Ves=0V, Ty=150C lass Gate-to-Source Forward Leakage _ _ 100 nA Ves=20V Gate-to-Source Reverse Leakage _ | -100 Ves=-20V Qg Total Gate Charge _ = 26 Ips14A Qgs Gate-to-Source Charge | {| 55 |} nC | Vpg=80v Qoa Gate-to-Drain ("Miller") Charge _ 11 Ves=10V See Fig. 6 and 13 tajon) Turn-On Delay Time - 10 _ Vop=50V tr Rise Time _ 34 ns Ip=14A taott) Turn-Off Delay Time _ 23 _ + | Re=12Q tt Falt Time . - 24 _ Ro=3.6Q See Figure 10 Lo Internal Drain Inductance _ 4.5 _ e pel ead ) = nH | from package les | Ls Internal Source Inductance j}75} and center of die contact s Ciss Input Capacitance | 670 | Vas=0V Coss Output Capacitance | 250] PF | Vpg=25V Crss Reverse Transfer Capacitance _ 60 _- f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 14 MOSFET symbol o (Body Diode) A showing the Ism Pulsed Source Current _ _ 56 integral reverse g (Body Diode) : p-n junction diode. 8 Vsp Diode Forward Voltage _ 2.5 V | Tu=25C, Is=14A, Vas=0V tre Reverse Recovery Time _ 150 | 280 ns | Ty=25C, Ips14A Qr Reverse Recovery Charge | 0.85; 1.7 | uC | di/dt=100A/us @ ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by Isps14A, di/dts140A/us, Vop<VeR)pss, max. junction temperature (See Figure 11) Tys175C Vpp=25V, starting Tj=25C, L=528H @ Pulse width < 300 ps; duty cycle <2%. Re=25Q, las=14A (See Figure 12) 144Ip, Drain Current (Amps) Ip, Drain Current (Amps) 26us WIDTH Te = 25% 107 10! Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, To=25C Vpg = SOV 20us_ PULSE WIDTH 7 8 10 Vas, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Rosvon); Drain-to-Source On Resistance IRF530S {p, Drain Current (Amps) 20us PULSE WIDTH Te = 175C so-! Vos, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, Tc=175C (Normalized) VGS = 10V 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 145IRF530S 1400 20 . oF Cgs + fgg. Cag SHORTED 1200 Cog + a an 1000 - nm 800 600 Capacitance (pF) 400 Vas, Gate-to-Source Voltage (volts) SEE FIGURE 13 to! 0 5 10 15 20 25 Vps, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage oe a < CG 5 E Sw! < = w o o = = > a oO o & 2 g o a 3 a M490 _ 4 D T=1758C Ves = OV SINGLE PULSE 0. : 1, 4. 2.0 o.4 2 4 102 5 4 103 Vsp, Source-to-Drain Voltage (volts) Vos, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 146Ip, Drain Current (Amps) 14 12 10 IRF530S Vos D.U.T. = Vob \ftov Pulse Width s ips Duty Factor < 0.1% pa Fig 10a. Switching Time Test Circuit Vps 90% 10% | 1 125 150 1 Vas | i To, Case Temperature (C) tajon) fr tof) tf Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Thermal Response (Zp jc) Fig 11. 10 4 0.4 ~ Pe L [ett e| NOTES: 4, DUTY FACTOR, Det,/to 0 2 2. PEAK T, x +T, 107 10-5 1074 1073 1072 o.4 4 10 ty, Rectangular Pulse Duration (seconds) Maximum Effective Transient Thermal Impedance, Junction-to-Case 147IRF530S Vary tp to obtain Vps > required fas 200 Ip TOP 5.7A 9.9A BOTTOM 144A 160 120 Fig 12a. Unclamped Inductive Test Circuit 80 ViBR)DSS 40 Eas, Single Pulse Energy (mJ) = 25V Vos 0 25 50 75 100 125 150 176 Starting Ty, Junction Temperature(C) lag mee Fig 12. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator wt | | vito a A eS b+ + ___ [ [Sos yr Reo L Vas Vq Charge -> la = 'D Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1507 Appendix C: Part Marking Information See page 1515 International Appendix D: Tape & Reel Information See page 1519 R tifi er 148