1
LTC1755/LTC1756
Smart Card Interface
■
Fully ISO 7816-3 and EMV Compliant
(Including Auxiliary I/O Pins)
■
Buck-Boost Charge Pump Generates 3V or 5V
■
2.7V to 6.0V Input Voltage Range (LTC1755)
■
Very Low Operating Current: 60µA
■
>10kV ESD on All Smart Card Pins
■
Dynamic Pull-Ups Deliver Fast Signal Rise Times
■
Soft-Start Limits Inrush Current at Turn On
■
3V ↔ 5V Signal Level Translators
■
Shutdown Current: <1µA
■
Short-Circuit and Overtemperature Protected
■
Alarm Output Indicates Fault Condition
■
Multiple Devices May Be Paralleled for
Multicard Applications (LTC1755)
■
Available in 16- and 24-Pin SSOP Packages
The LTC
®
1755/LTC1756 universal Smart Card interfaces
are fully compliant with ISO 7816-3 and EMV specifica-
tions. The parts provide the smallest and simplest inter-
face circuits between a host microcontroller and general
purpose Smart Cards.
An internal charge pump DC/DC converter delivers regu-
lated 3V or 5V to the Smart Card, while on-chip level
shifters allow connection to a low voltage controller. All
Smart Card contacts are rated for 10kV ESD, eliminating
the need for external ESD protection devices.
Input voltage may range from 2.7V to 6.0V, allowing direct
connection to a battery. Internal soft-start mitigates start-
up problems that may result when the input power is
provided by another regulator. Multiple devices may be
paralleled and connected to a single controller for multicard
applications.
Battery life is maximized by 60µA operating current and
1µA shutdown current. The narrow SSOP packages mini-
mize PCB area for compact portable systems.
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Handheld Payment Terminals
■
Pay Telephones
■
ATMs
■
Key Chain Readers
■
Smart Card Readers
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LTC1755
PRES
PWR
CS
NC/NO
GND
V
IN
V
CC
AUX1
AUX2
I/O
RST
CLK
C2
10µF
C3
10µF
V
CC
AUX1
AUX2
I/O
RST
CLK
C1
0.68µF
GND
SMART CARD
17556 TA01
SMART CARD
PRESENT SWITCH
µCONTROLLER
3.3V
5V/3V
CARD
ALARM
READY
DV
CC
C
–
C
+
AUX1IN
AUX2IN
DATA
RIN
CIN
2
LTC1755/LTC1756
ORDER PART
NUMBER
LTC1755EGN
TJMAX = 125°C, θJA = 150°C/W
Consult factory for Industrial and Military grade parts.
V
IN
to GND (LTC1755)............................. –0.3V to 6.5V
V
IN
to GND (LTC1756)............................. –0.3V to 6.0V
DV
CC
to GND (LTC1755).......................... –0.3V to 5.5V
V
CC
to GND .............................................. –0.3V to 5.5V
Digital Inputs to GND
(LTC1755) .............................. –0.3V to DV
CC
+ 0.3V
Digital Inputs to GND
(LTC1756) ................................. –0.3V to V
IN
+ 0.3V
(Note 1)
CLK, RST, I/O, AUX1,
AUX2 to GND.............................. –0.3V to V
CC
+ 0.3V
V
CC
Short-Circuit Duration............................... Indefinite
Operating Temperature Range (Note 2) .. –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
24
23
22
21
20
19
18
17
16
15
14
13
PRES
PWR
CS
NC/NO
GND
V
IN
V
CC
AUX1
AUX2
I/O
RST
CLK
5V/3V
CARD
ALARM
READY
DV
CC
C
–
C
+
AUX1IN
AUX2IN
DATA
RIN
CIN
ORDER PART
NUMBER
LTC1756EGN
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
PRES
PWR
GND
V
IN
V
CC
I/O
RST
CLK
5V/3V
CARD
READY
C
–
C
+
DATA
RIN
CIN
TJMAX = 125°C, θJA = 135°C/W
PART MARKING
1756
3
LTC1755/LTC1756
The ● denotes specifications which apply over the full specified
temperature range, otherwise specificatons are at TA = 25°C.
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
LTC1755 (V
IN
= 2.7V to 6V, DV
CC
= 2V to 5.5V, unless otherwise noted)
V
IN
Operating Voltage ●2.7 6 V
DV
CC
Operating Voltage ●2.0 5.5 V
I
VIN
Operating Current ACTIVE State, I
VCC
= 0 ●50 100 µA
I
DVCC
Operating Current ACTIVE State, DV
CC
= 3V ●10 20 µA
I
VIN
Shutdown Current IDLE State, DV
CC
= 0V, V
IN
≤ 3.6V ●1µA
IDLE State, DV
CC
= 0V, 3.6V < V
IN
≤ 6V ●10 µA
IDLE State, DV
CC
= 5.5V, V
IN
≤ 6V ●20 µA
V
CC
Output Voltage 5V/3V = DV
CC
●4.75 5.00 5.25 V
5V/3V = 0V ●2.80 3.00 3.20 V
I
VCC
Output Current 5V/3V = 0V 3V ≤ V
IN
≤ 6.0V ●55 mA
5V/3V = DV
CC
3V ≤ V
IN
≤ 6.0V ●65 mA
5V/3V = 0V 2.7V ≤ V
IN
≤ 6.0V ●55 mA
5V/3V = DV
CC
2.7V ≤ V
IN
≤ 6.0V ●40 mA
V
CC
Turn-On Time C
OUT
= 10µF, PWR to READY, 50% to 50% ●2.7 12 ms
V
CC
Discharge Time to 0.4V I
VCC
= 0mA, V
CC
= 5V, C
OUT
= 10µF●100 250 µs
LTC1756 (V
IN
= 2.7V to 5.5V, unless otherwise noted)
V
IN
Operating Voltage ●2.7 5.5 V
I
VIN
Operating Current ACTIVE State, I
VCC
= 0 ●75 150 µA
I
VIN
Shutdown Current IDLE State, V
IN
≤ 3.6V ●2.5 µA
IDLE State, 3.6V < V
IN
≤ 5.5V ●10 µA
V
CC
Output Voltage 5V/3V = V
IN
●4.75 5.00 5.25 V
5V/3V = 0V ●2.80 3.00 3.20 V
I
VCC
Output Current 5V/3V = 0V 3V ≤ V
IN
≤ 5.5V ●55 mA
5V/3V = V
IN
3V ≤ V
IN
≤ 5.5V ●65 mA
5V/3V = 0V 2.7V ≤ V
IN
≤ 5.5V ●55 mA
5V/3V = V
IN
2.7V ≤ V
IN
≤ 5.5V ●40 mA
V
CC
Turn-On Time C
OUT
= 10µF, PWR to READY, 50% to 50% ●2.7 12 ms
V
CC
Discharge Time to 0.4V I
VCC
= 0mA, V
CC
= 5V, C
OUT
= 10µF●100 250 µs
4
LTC1755/LTC1756
The ● denotes specifications which apply over the full specified
temperature range, otherwise specificatons are at TA = 25°C. DVCC = 2V to 5.5V, unless otherwise noted (Note 4).
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC1755/LTC1756 are guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: The DATA, AUX1IN, AUX2IN, AUX1, AUX2 and I/O pull-down
drivers must sink up to 250µA sourced by the internal current sources.
Note 4: On the LTC1756, DV
CC
is internally connected to the V
IN
pin.
Specifications that call out DV
CC
should be referred to V
IN
instead.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Controller Inputs/Outputs DATA, AUX1IN, AUX2IN, DV
CC
= 3V
High Input Voltage Threshold (V
IH
) (Note 4) ●DV
CC
– 0.6 0.5 • DV
CC
V
Low Input Voltage Threshold (V
IL
) (Note 4) ●0.5 • DV
CC
0.3 V
High Level Output Voltage (V
OH
) Source Current = 20µA (Note 4) ●0.7 • DV
CC
V
Low Level Output Voltage (V
OL
) Sink Current = –500µA (Note 3) ●0.3 V
Output Rise/Fall Time Loaded with 30pF, 10% to 90% ●0.5 µs
Input Current (I
IH
/I
IL
) CS = DV
CC
●–1 1 µA
RIN, CIN, PWR, CS, 5V/3V, NC/NO
High Input Voltage Threshold (V
IH
) (Note 4) ●0.7 • DV
CC
0.5 • DV
CC
V
Low Input Voltage Threshold (V
IL
) (Note 4) ●0.5 • DV
CC
0.2 • DV
CC
V
Input Current (I
IH
/I
IL
)●–1 1 µA
READY, ALARM, CARD
Pull-Up Current (I
OH
)●250 nA
Low Level Output Voltage (V
OL
) Sink Current = –20µA●0.3 V
Smart Card Inputs/Outputs I/O, AUX1, AUX2, V
CC
= 3V or 5V
High Input Voltage Threshold (V
IH
)I
IH(MAX)
= ±20µA●0.6 • V
CC
0.5 • V
CC
V
Low Input Voltage Threshold (V
IL
)I
IL(MAX)
= 1mA ●0.5 • V
CC
0.8 V
High Level Output Voltage (V
OH
) Source Current = 20µA●0.8 • V
CC
V
DATA, AUX1IN, AUX2IN = DV
CC
Low Level Output Voltage (V
OL
) Sink Current = –1mA ●0.3 V
DATA, AUX1IN, AUX2IN = 0V (Note 3)
Rise/ Fall Time Loaded with 30pF, 10% to 90% ●0.5 µs
Short-Circuit Current Shorted to V
CC
●3.5 7.5 mA
CLK
High Level Output Voltage (V
OH
) Source Current = 100µA●V
CC
– 0.5 V
Low Level Output Voltage (V
OL
) Sink Current = –200µA●0.3 V
CLK Rise/Fall Time CLK Loaded with 30pF ●16 ns
CLK Frequency CLK Loaded with 30pF ●5 MHz
RST
High Level Output Voltage (V
OH
) Source Current = 200µA●0.8 • V
CC
V
Source Current = 50µA●V
CC
– 0.5V V
Low Level Output Voltage (V
OL
) Sink Current = –200µA●0.3 V
RST Rise/Fall Time Loaded with 30pF, 10% to 90% ●0.5 µs
PRES
High Input Voltage Threshold (V
IH
) (Note 4) ●0.7 • DV
CC
0.5 • DV
CC
V
Low Input Voltage Threshold (V
IL
) (Note 4) ●0.5 • DV
CC
0.2 • DV
CC
V
PRES Pull-Up Current V
PRES
= 0V ●0.5 1 µA
PRES Debounce Time Proportional to the 0.68µF Charge Pump Capacitor ●40 80 ms
ELECTRICAL CHARACTERISTICS
5
LTC1755/LTC1756
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Power Efficiency vs Input Voltage Card Detection Debounce Period
vs Temperature
V
IN
INPUT VOLTAGE (V)
3
0
EFFICIENCY (%)
25
50
75
100
45
17556 G01
6
I
L
= 35mA
T
A
= 25°C
V
CC
= 3V
V
CC
= 5V
TEMPERATURE (°C)
–50
0
DEBOUNCE DELAY (ms)
25
50
75
100
150
–25 02550
17556 G02
75 100
125
CFLY = 0.68µF
VIN = 6V
VIN = 3.3V
VIN = 2.7V
TEMPERATURE (°C)
–50
3.3
I/O, AUX1, AUX2 SHORT-CIRCIUT CURRENT (mA)
3.4
3.5
3.6
–25 02550
17556 G03
75 100
VCC = 5V
VIN = 3V
I/O, AUX1, AUX2 Short-Circuit
Current vs Temperature
CARD, READY, ALARM Pull-Up
Current vs Temperature
TEMPERATURE (°C)
–50
0
PULL-UP CURRENT (µA)
2
4
6
8
10
–25 02550
17556 G04
75 100
DVCC = 5.5V
DVCC = 3V DVCC = 2V
DV
CC
INPUT VOLTAGE (V)
2
PULL-UP CURRENT (µA)
8
10
12
17556 G05
6
4
345
2
0
V
PRES
= 0V
T
A
= 25°C
DVCC INPUT VOLTAGE (V)
1
5
INPUT CURRENT (µA)
10
15
20
25
35
2345
17556 G02
67
30
VPRES = 0V
TA = –40°CT
A = 25°C
TA = 85°C
PRES Pin Pull-Up Current vs DVCC DVCC Input Current vs DVCC Voltage
Oscillator Frequency
vs Temperature
TEMPERATURE (°C)
–50
500
OSCILLATOR FREQUENCY (kHz)
600
700
800
900
1100
–25 02550
17556 G07
75 100
1000
V
IN
= 5V
V
IN
= 3.3V
V
IN
= 2.7V
Oscillator Frequency
vs Input Voltage
V
IN
INPUT VOLTAGE (V)
2.5
500
OSCILLATOR FREQUENCY (kHz)
600
700
800
900
1100
3.0 3.5 4.0 4.5
17556 G07
5.0 5.5
1000
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
VIN Supply Current
vs Temperature
TEMPERATURE (°C)
–50
40
SUPPLY CURRENT (µA)
50
60
70
–25 02550
17556 G09
75 100
VIN = 3.3V
ICC = 0
6
LTC1755/LTC1756
TYPICAL PERFOR A CE CHARACTERISTICS
UW
DVCC, VIN Supply Current
In Shutdown
DVCC INPUT VOLTAGE (V)
0
0
INPUT CURRENT (µA)
3.0
6.0
9.0
1.5
4.5
7.5
DVCC
VIN
1234
17556 G10
56
VIN = 3V
TA = 25°C
VIN Shutdown Current
vs Input Voltage
INPUT VOLTAGE (V)
0
0
INPUT CURRENT (µA)
0.2
0.4
0.6
0.8
1.0
1234
17556 G11
56
DVCC = 0
TA = 25°C
UU
U
PI FU CTIO S
PRES (Pin 1): (Input) Connects to the Smart Card acceptor’s
PRESENT indicator switch to detect if a card is inserted.
This pin has a pull-up current source so that a grounded
switch can be detected with no external components. The
pull-up current source is nonlinear, delivering higher
current when the PRES pin is above 1V but very little
current below 1V. This helps resist false card indications
due to leakage current. The activation state of the PRES pin
can be set by the NC/NO pin so that both normally open
(NO) and normally closed (NC) switches are easily recog-
nized (see NC/NO pin description).
DV
CC
sets the logic reference level for the PRES pin.
PWR (Pin 2): (Input) A low on the PWR pin places the
LTC1755/LTC1756 in the ACTIVE state enabling the charge
pump. The READY pin indicates when the card supply
voltage (V
CC
) has reached its final value and communica-
tion with the Smart Card is possible. The reset and clock
channels are enabled after READY goes low. The three I/
O channels are also enabled only after READY goes low,
however they may be disabled separately via the CS pin
(CS is not available on the LTC1756).
The falling edge of PWR latches the state of the 5V/3V pin.
After PWR is low, changes on the 5V/3V pin are ignored.
CS (Pin 3, LTC1755 Only): (Input) The CS pin enables the
three bidirectional I/O channels of the LTC1755. When the
I/O channels are disabled the Smart Card pins (I/O, AUX1,
AUX2) are forced to logic one and the controller pins
(DATA, AUX2IN, AUX1IN) are high impedance. CS can be
brought low along with PWR when the device is first
enabled, however communication with the Smart Card is
inhibited until V
CC
reaches its final value as indicated by a
low on the READY pin. CS does not affect the charge
pump, CLK or RST channels. On the LTC1756, CS is
internally connected to the PWR pin.
DV
CC
sets the logic reference level for the CS pin.
NC/NO (Pin 4, LTC1755 Only): (Input) This pin controls
the activation level of the PRES pin. When it is high (DV
CC
)
the PRES pin is active high. When it is low (GND) the PRES
pin is active low. In either case the presence of a Smart
Card is indicated by a low on the CARD output. When a
ground side normally open (NO) switch is used the NC/NO
pin should be grounded. When a ground side normally
closed (NC) switch is used the NC/NO pin should be
connected to DV
CC
. The LTC1756 is permanently config-
ured to accept a normally open switch.
LTC1755/LTC1756
7
LTC1755/LTC1756
Note: If a normally closed switch is used, a small current
(several microamperes) will flow through the switch when-
ever a Smart Card is not present. For ultralow power
consumption in shutdown, a normally open switch is
optimum.
DV
CC
sets the logic reference level for the NC/NO pin.
GND (Pins 5/3): Ground Reference for the IC. This pin
should be connected to a low impedance ground plane.
Bypass capacitors for V
IN
and V
CC
should be in close
proximity to the GND pin.
V
IN
(Pins 6/4): Supply Voltage for the Charge Pump. May
be between 2.7V and 6V. A 10µF low ESR ceramic bypass
capacitor is required on this pin for optimum performance.
V
CC
(Pins 7/5): Regulated Smart Card Supply Voltage.
This pin should be connected to the Smart Card V
CC
contact. The 5V/3V pin determines the V
CC
output voltage.
The V
CC
pin is protected against short circuits by compar-
ing the actual output voltage with an internal reference
voltage. If V
CC
is below its correct level (for as little as 5µs)
the LTC1755/LTC1756 switch to the Alarm state (see the
State Diagram). The V
CC
pin requires a 10µF charge
storage capacitor to ground. For optimum performance a
low ESR ceramic capacitor should be used.
During the Idle and Alarm states the V
CC
pin is rapidly
discharged to ground to comply with the deactivation
requirements of the EMV and ISO-7816 specifications.
AUX1 (Pin 8, LTC1755 Only): (Input/Output) Smart Card
Side Auxiliary I/O Pin. This pin is used for auxiliary
bidirectional data transfer between the microcontroller
and the Smart Card. It has the same characteristics as the
I/O pin.
AUX2 (Pin 9, LTC1755 Only): (Input/Output) Smart Card
Side Auxiliary I/O Pin. This pin is used for auxiliary
bidirectional data transfer between the microcontroller
and the Smart Card. It has the same characteristics as the
I/O pin.
I/O (Pins 10/6): (Input/Output) Smart Card Side Data I/O
Pin. This pin is used for bidirectional data transfer between
the microcontroller and the Smart Card. It should be con-
nected to the Smart Card I/O contact. The Smart Card I/O
pin must be able to sink up to 250µA when driving the I/O
pin low due to the pull-up current source. The I/O pin be-
comes a low impedance to ground during the Idle state. It
does not become active until READY goes low indicating
that V
CC
is stable.
Once READY is low the I/O pin is protected against short
circuits to V
CC
by current limiting to 5mA maximum.
The DATA-I/O channel is bidirectional for half-duplex
transmissions. Its idle state is H-H. Once an L is detected
on one side of the channel the direction of transmission is
established. Specifically, the side which received an L first
is now the input, and the opposite side is the output.
Transmission from the output side back to the input side
is inhibited, thereby preventing a latch condition. Once the
input side releases its L, both sides return to H, and the
channel is now ready for a new L to be transmitted in either
direction. If an L is forced externally on the output side, and
it persists until after the L on the input side is released, this
illegal input will not be transmitted to the input side
because the transmission direction will not have changed.
The direction of transmission can only be established from
the idle (H-H) state and is determined by the first receipt
of an L on either side.
RST (Pins 11/7): (Output) Level-Shifted Reset Output Pin.
This pin should be connected to the Smart Card RST
contact. The RST pin becomes a low impedance to ground
during the Idle state (see the State Diagram). The reset
channel does not become active until the READY signal
goes low indicating that V
CC
is stable.
Short-circuit protection is provided on the RST pin by
comparing RST with R
IN
. If these signals differ for several
microseconds then the LTC1755/LTC1756 switch to the
Alarm state. This fault checking is only performed after the
V
CC
pin has reached its final value (as indicated by the
READY pin).
CLK (Pins 12/8): (Output) Level-Shifted Clock Output Pin.
This pin should be connected to the Smart Card CLK
contact. The CLK pin becomes a low impedance to ground
during the Idle state (see the State Diagram). The clock
channel does not become active until the READY signal
goes low indicating that V
CC
is stable.
Short-circuit protection is provided on the CLK pin by
comparing CLK with C
IN
. If these signals differ for several
UU
U
PI FU CTIO S
LTC1755/LTC1756
8
LTC1755/LTC1756
microseconds then the LTC1755/LTC1756 switch to the
Alarm state. This fault checking is only performed after the
V
CC
pin has reached its final value (as indicated by the
READY pin).
The clock channel is optimized for signal integrity in order
to meet the stringent duty cycle requirements of the EMV
specification. Therefore, to reduce power in low power
applications, clock stop mode is recommended when data
is not being exchanged.
CIN (Pins 13/9): (Input) Clock Input Pin from the Micro-
controller. During the Active state this signal appears on
the CLK pin after being level-shifted and buffered.
DV
CC
sets the logic reference level for the C
IN
pin.
RIN
(Pins 14/10): (Input) Reset Input Pin from the Micro-
controller. During the Active state this signal appears on
the RST pin after being level-shifted and buffered.
DV
CC
sets the logic reference level for the R
IN
pin.
DATA (Pins 15/11): (Input/Output) Microcontroller Side
Data I/O Pin. This pin is used for bidirectional data transfer
between the microcontroller and the Smart Card. The
microcontroller data pin must be open drain and must be
able to sink up to 250µA when driving the DATA pin low
due to the pull-up current source. The DATA pin becomes
high impedance during the Idle state or when CS is high
(see the State Diagram). It does not become active until the
READY signal goes low indicating that V
CC
is stable.
AUX2IN (Pin 16, LTC1755 Only): (Input/Output) Micro-
controller Side Auxiliary I/O pin. This pin is used for
bidirectional auxiliary data transfer between the micro-
controller and the Smart Card. It has the same character-
istics as the DATA pin.
AUX1IN (Pin 17, LTC1755 Only): (Input/Output) Micro-
controller Side Auxiliary I/O Pin. This pin is used for
bidirectional auxiliary data transfer between the micro-
controller and the Smart Card. It has the same character-
istics as the DATA pin.
C
+
, C
–
(Pins 18/12, 19/13): Charge Pump Flying Capaci-
tor Terminals. Optimum values for the flying capacitor
range from 0.68µF to 1µF. Best performance is achieved
with a low ESR X7R ceramic capacitor.
DV
CC
(Pin 20, LTC1755 Only): Supply Voltage for the
Microcontroller Side Digital Input and Input/Output Pins
(Typically 3V). If the charge pump input pin (V
IN
) is
powered from the same source as the microcontroller,
then DV
CC
should be connected directly to V
IN
. In this case
only one (10µF) input bypass capacitor is needed for the
LTC1755. If the DV
CC
pin is powered separately then it
should be bypassed separately with a 0.1µF capacitor. The
DV
CC
pin may be between 2V and 5.5V.
The DV
CC
pin is monitored for adequate voltage. If DV
CC
drops below approximately 1.5V the LTC1755 automati-
cally enters the Idle state. On the LTC1756, DV
CC
is
connected internally to V
IN
.
READY (Pins 21/14): (Output) Readiness Indicator of the
Smart Card Supply Voltage (V
CC
). When the LTC1755/
LTC1756 are placed in the Active state the soft-start
feature slowly ramps the V
CC
voltage. A low on the READY
pin indicates that V
CC
has reached its final value.
The READY pin also indicates if the LTC1756 is in Alarm
mode. The LTC1756 detects faults such as V
CC
underrange
for at least 5µs, overtemperature shutdown, CLK or RST
invalid output levels and card removal during Active
state. CLK or RST invalid and overtemperature faults are
detected only after V
CC
has reached its final value. V
CC
underrange and card removal during Active faults are
detected at any time during the Active period (i.e., once
PWR = 0V).
If the LTC1756 has been activated normally and V
CC
, the
card voltage, has reached its final value then READY will
go low indicating normal operation. If, following this, a
fault occurs and the LTC1756 enters the Alarm state, the
READY pin will return high.
In the event that a fault precedes the activation of VCC,
such as a direct short circuit from VCC to GND, the
LTC1756 will attempt to operate until the fault is detected
and then automatically shut down and enter the Alarm
state. In this case the READY pin will never go low after the
command to start the smart card is given (i.e., PWR = 0V).
If the LTC1755/LTC1756 enter the Alarm state they can
only be cleared by returning the PWR pin high.
UU
U
PI FU CTIO S
LTC1755/LTC1756
9
LTC1755/LTC1756
The READY pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755/LTC1756s to a
single microcontroller.
ALARM (Pin 22, LTC1755 Only): (Output) A low on this
pin indicates that a fault has occurred and that the LTC1755
is in the Alarm state (see the State Diagram). Possible
faults include V
CC
underrange for at least 5µs, overtem-
perature shutdown, CLK or RST invalid output levels, and
card removal during the Active state.
CLK or RST invalid and overtemperature faults are de-
tected only after V
CC
has reached its final value (as
indicated by the READY pin). V
CC
underrange and card
removal during Active faults are detected at any time
during the Active period (i.e., once PWR = 0V).
The ALARM pin is configured as an open-drain pull-down
with a weak pull-up current source. This permits wired-
OR connections of multiple LTC1755s to a single micro-
controller.
UU
U
PI FU CTIO S
LTC1755/LTC1756
CARD (Pin 23/15): (Output) Level-Shifted and Debounced
PRES Signal from the Smart Card Acceptor Switch. When
a valid card indication appears, this pin communicates the
presence of the Smart Card to the microcontroller. The
CARD pin has an open-drain active pull-down with a weak
pull-up current source for logic-OR connections. The
debounce circuit ensures that a card has been present for
a continuous period of at least 40ms before asserting
CARD low. The CARD pin returns high within 50µs of card
removal. The PRES pin, in conjunction with the NC/NO pin,
determines if a card is present.
5V/3V (Pin 24/16): (Input) Controls the output voltage
(V
CC
) of the DC/DC converter during the Active state. A
valid high sets V
CC
to 5V. A valid low sets V
CC
to 3V. The
5V/3V pin is latched on the falling edge of the PWR pin.
When PWR is low, changes on the 5V/3V pin are ignored.
To change the voltage on V
CC
the LTC1755/LTC1756 must
first be returned to the Idle state by bringing the PWR pin
high.
DV
CC
sets the logic reference level for the 5V/3V pin.
10
LTC1755/LTC1756
BLOCK DIAGRA
W
*
*
*
*
*
*
DVCC
PRES
PWR
τ
DC/DC CONVERTER
AND
CONTROL LOGIC
CS
(LTC1755 ONLY)
NC/NO
(LTC1755 ONLY)
GND
VIN
VCC
AUX1
(LTC1755 ONLY)
AUX2
(LTC1755 ONLY)
I/O
RST
CLK
17556 BD
*
DYNAMIC PULL-UP CURRENT SOURCE
5V/3V
CARD
ALARM
(LTC1755 ONLY)
READY
DVCC
(LTC1755 ONLY,
CONNECTED INTERNALLY
TO VIN ON LTC1756)
C–
C+
AUX1IN
(LTC1755 ONLY)
AUX2IN
(LTC1755 ONLY)
DATA
RIN
CIN
11
LTC1755/LTC1756
10kV ESD Protection
All Smart Card pins (CLK, RST, I/O, AUX1, AUX2, V
CC
and
GND) can withstand over 10kV of human body model ESD
in situ. In order to ensure proper ESD protection, careful
board layout is required. The GND pin should be tied
directly to a ground plane. The V
CC
capacitor should be
located very close to the V
CC
pin and tied immediately to
the ground plane.
Capacitor Selection
The style and value of capacitors used with the LTC1755/
LTC1756 determine several parameters such as output
ripple voltage, charge pump strength, Smart Card switch
debounce time and V
CC
discharge rate.
Due to the switching nature of a capacitive charge pump,
low equivalent series resistance (ESR) capacitors are
recommended for the capacitors at V
IN
and V
CC
. When-
ever the flying capacitor is switched to the V
CC
charge
storage capacitor, considerable current flows. The prod-
uct of this high current and the ESR of the output capacitor
can generate substantial voltage spikes on the V
CC
output.
These spikes may cause problems with the Smart Card or
may interfere with the regulation loop of the LTC1755/
LTC1756. Therefore, ceramic or tantalum capacitors are
recommended rather than higher ESR aluminum capaci-
tors. Between ceramic and tantalum, ceramic capacitors
generally have the lowest ESR. Some manufacturers have
developed low ESR tantalum capacitors but they can be
expensive and may still have higher ESR than ceramic
types. Thus, while they cannot be avoided, ESR spikes will
typically be lowest when using ceramic capacitors.
For ceramic capacitors there are several different materi-
als available to choose from. The choice of ceramic
material is generally based on factors such as available
capacitance, case size, voltage rating, electrical perfor-
mance and cost. For example, capacitors made of Y5V
material have high packing density, which provides high
capacitance for a given case size. However, Y5V capaci-
tors tend to lose considerable capacitance over the –40°C
to 85°C temperature range. X7R ceramic capacitors are
more stable over temperature but don’t provide the high
packing density. Therefore, large capacitance values are
generally not available in X7R ceramic.
The value and style of the flying capacitor are important
not only for the charge pump but also because they
provide the large debounce time for the Smart Card
detection channel. A 0.68µF X7R capacitor is a good
choice for the flying capacitor because it provides fairly
constant capacitance over temperature and its value is not
prohibitively large.
The charge storage capacitor on the V
CC
pin determines
the ripple voltage magnitude and the discharge time of the
Smart Card voltage. To minimize ripple, generally, a large
value is needed. However, to meet the V
CC
discharge rate
specification, the value should not exceed 20µF. A 10µF
capacitor can be used but the ripple magnitude will be
higher leading to worse apparent DC load regulation.
Typically a 15µF to 18µF Y5V ceramic capacitor is the best
choice for the V
CC
charge storage capacitor. For best
performance, this capacitor should be connected as close
as possible to the V
CC
and GND pins. Note that most of the
electrostatic discharge (ESD) current on the Smart Card
pins is absorbed by this capacitor.
The bypass capacitor at V
IN
is also important. Large dips
on the input supply due to ESR may cause problems with
the internal circuitry of the LTC1755/LTC1756. A good
choice for the input bypass capacitor is a 10µF Y5V style
ceramic
Dynamic Pull-Up Current Sources
The current sources on the bidirectional pins (DATA,
AUX2IN, AUX1IN, I/O, AUX2 and AUX1) are dynamically
activated to achieve a fast rise time with a relatively small
static current (Figure 1). Once a bidirectional pin is relin-
quished, a small start-up current begins to charge the
node. An edge rate detector determines if the pin is
Figure 1. Dynamic Pull-Up Current Sources
–
+
δV
δt
I
START
17556 F01
V
REF
BIDIRECTIONAL PIN
V
CC
OR DV
CC
APPLICATIO S I FOR ATIO
WUUU
12
LTC1755/LTC1756
5V/µs, the following expression for RPULL-UP should be
applied:
RVV
CpF
PULL UP SUPPLY
PAR
−
=
()
()
–
–•
1
50 5 10
6
where C
PAR
is the extra capacitance on the bidirectional
pin and V
SUPPLY
is the minimum local supply for the
bidirectional pin. For example, on the smart card side, 3V
should be assumed for V
SUPPLY
.
Note that the addition of a pull-up resistor will give a higher
output voltage when the bidirectional pin pulls down. Care
should be taken so that the V
IL
or V
OL
specifications are not
compromised with this technique.
Bidirectional Channels
As described in Pin Functions (Pins 10/6), the bidirec-
tional channels allow transmission in only one direction at
a time. Figure 2 shows a simplified block diagram of one
of the three bidirectional channels. The three channels
operate in an identical fashion.
Figure 3 shows an example of normal transmit and receive
operations as well as the two possible collision scenarios.
If a channel is activated from one direction and an L is
imposed in the other direction before both sides return H
a collision results. The result of the collision is that the
receiving side (
Slave Side
) will remain low until it is
released, but the transmitting side (first side to go low or
Master Side
), will be allowed to return high if released. The
colliding L externally imposed on the slave side will not be
transmitted back through the channel.
released by comparing its slew rate with an internal
reference value. If a valid transition is detected, a large
pull-up current enhances the edge rate on the node. The
higher slew rate corroborates the decision to charge the
node thereby effecting a dynamic form of hysteresis. Once
the node has reached the power supply voltage the internal
comparator requires several hundred nanoseconds to
reset. Pulling down on the pin before the reset delay
expires will result in a momentary contention and a higher
current flow. Therefore, the comparator delay sets the
upper limit on the maximum data rate of the bidirectional
channels to about 500kHz.
The dynamic pull-up current sources are designed to
trigger with as much as 50pF of capacitive load on the
bidirectional pins. At approximately 90pF (or greater), the
edge rate on the node will be insufficient to trigger the edge
rate detector and the node will only ramp up at a rate given
by the I
START
current source and the load capacitance. In
these instances the edge rate of the bidirectional pin may
not meet the requirements of existing smart card stan-
dards. Therefore, it is recommended that the sum of both
explicit and parasitic capacitances on the bidirectional
pins be kept below 50pF.
If excessive capacitance (either explicit or parasitic) is
present on the bidirectional pins, the starting pull-up
current must also be increased. This can be accomplished
with a pull-up resistor to the respective supply. For the
smart card side (I/O, AUX1 and AUX2), the pull-up resis-
tor should be connected to VCC. For the microcontroller
side (DATA, AUX1IN and AUX2IN), the pull-up resistor
should be connected to DVCC on the LTC1755 (VIN on the
LTC1756). To maintain an edge rate of approximately
APPLICATIO S I FOR ATIO
WUUU
DV
CC
CS
DATA
CHARGE
PUMP
BIDIRECTIONAL
LATCH
I/O
TO
SMART CARD
TO
MICROCONTROLLER
V
CC
READY
3.5mA
17756 F02
Figure 2. Bidirectional Channel Simplified Block Diagram
13
LTC1755/LTC1756
less than 10µA. If DV
CC
is 0V the current drops below 1µA.
When a Smart Card is present the LTC1755/LTC1756
operate with a quiescent current of only 60µA, thus the
majority of power is consumed by charge pump losses
and the card itself. If the card can be made to consume less
power during idle times a significant power savings will be
achieved. Whenever possible Clock Stop Mode should be
used (or alternatively a very low “idling” clock speed).
Furthermore, in the Active state, the bidirectional pins
should all be relinquished whenever possible since there
is some static current flow when a bidirectional pin is
pulled down.
LTC1755
*
2N7002T1 (MOTOROLA)
TN2460T (TEMIC/SILICONIX)
I/O
R1
20k
TO
SMART CARD
17556 F04
*CONNECT GATE TO V
CC
FOR DV
CC
= 5V APPLICATIONS
CONNECT GATE TO DV
CC
OR DV
CC
LOGIC LEVEL SIGNAL
FOR DV
CC
≤ 3.3V APPLICATONS
5V
POWER
TO
MICROCONTROLLER
DATA MN1
V
CC
DV
CC
Figure 4. I2C Level Translation Technique
I
2
C
TM
Compatibility
Some smart cards still require I
2
C compatibility. In the I
2
C
format it is permissible to impose an L before the signal
line has returned H. This is used, for example, as an
acknowledge signal. Such a scenario will cause a collision
as shown in Figure 3.
Figure 4 shows an analog level translation technique that
can be used along with the LTC1755 to support I
2
C smart
cards. In this technique it is important to connect the gate
of the external MOSFET to the lower of the two supplies
(i.e., the lower of V
CC
or DV
CC
). If DV
CC
is operating from
a fixed 5V supply, the gate of MN1 should be connected to
V
CC
. If DV
CC
is operating from a regulated 3.3V supply, the
gate of MN1 should be connected to DV
CC
. In the latter
case, the gate may need to be connected to a digital signal
ranging from 0V to DV
CC
so that it can be disabled when
the LTC1755 is in shutdown. Otherwise, the the LTC1755
will try to assert an L on the microcontroller side of the
channel when it is in shutdown.
Supporting Synchronous and Asyncronous Cards
In synchronous/asynchronous applications it is neces-
sary to switch the CLK pin of the card socket from a free
running asynchronous clock to a controlled syncronous
clock. To avoid glitches and pulses shorter than the
minimum allowed pulse width, the circuit shown in Figure
5 should be used as a clock selection circuit. Note that for
this circuit to be effective the SYNC input should be held
constant while switching the ASYNC\SYNC control signal.
Low Power Operation
The LTC1755/LTC1756 are inherently low power devices.
When there is no Smart Card present the supply current is
Q
QD
TO C
IN
17556 F05
Q
ASYNC SYNC
ASYNC IN
SYNC IN
QD
Figure 5. Glitchless Clock Selection Circuit
APPLICATIO S I FOR ATIO
WUUU
I
2
C is a trademark of Philips Electronics N.V.
DATA
I/O
NORMAL
TRANSMIT NORMAL
RECEIVE I/O PULLED LOW DURING
TRANSMIT MODE (COLLISION) DATA PULLED LOW DURING
RECEIVE MODE (COLLISION)
17556 F03
Figure 3. Possible Bidirectional Channel Scenarios
14
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
WUUU
Figure 7. Deactivation Sequence
V
CC
1755 F07
RST
CLK
I/O
AUX2
AUX1
RST = R
IN
DEACTIVATION DIRECTIVE
CLK = C
IN
I/O = DATA
GND
V
IN
V
CC
17556 F08
Figure 8. Optimum Bypass Capacitor Placement
Overtemperature Fault Protection
An overtemperature circuit disables the chip and activates
the ALARM pin if the IC’s junction temperature exceeds
150°C.
Self-Start Mode
By connecting the CARD pin to the PWR pin, the LTC1755/
LTC1756 can be made to start up automatically when a
Smart Card is detected (Figure 6). In this mode, the READY
pin becomes an interrupt signal indicating to the micro-
controller that a Smart Card is present and that V
CC
, the
charge pump voltage, is at its final value. The Smart Card
remains powered as long as it is detected by the PRES pin.
When the Smart Card is removed the LTC1755/LTC1756
will automatically be deactivated by the fault detection
circuitry.
Deactivation Sequence
For maximum flexibility the Smart Card can be deactivated
either manually or automatically. In manual mode the de-
activation is controlled by explicitly manipulating the
LTC1755/LTC1756 input and control pins (DATA, AUX1IN,
AUX2IN, RIN and CIN followed by PWR and CS). In auto-
matic mode the PWR pin is used to perform the built-in
Figure 6. Self-Start Mode
CARD
TO
MICROCONTROLLER
PWR
READY
1755 F06
deactivation sequence. Once PWR is brought high the built-
in deactivation sequence occurs as shown in Figure 7.
In the event of a fault, the LTC1755/LTC1756 automatically
implement the built-in deactivation sequence.
PC Board Layout
For best performance, the V
IN
and V
CC
capacitors should
be placed as close to the LTC1755/LTC1756 as possible.
This will help reduce ringing due to inductance on the V
IN
and V
CC
pins that could cause problems with the LTC1755/
LTC1756 control circuitry or Smart Card. Figure 8 illus-
trates a possible layout technique using only a single layer
of the PC board.
State Definitions
IDLE/DEACTIVATION
V
CC
, RST, CLK, I/O AUX2, AUX1 = L
READY, ALARM, DATA, AUX2IN, AUX1IN = Z
CARD = PRES ⊕ NC/NO
Once the LTC1755/LTC1756 enter the Idle/Deactivation
state the deactivation sequence begins. The deactivation
sequence will continue until V
CC
is discharged to approxi-
mately 1V. An activation command (PWR = 0V) will only be
acknowledged once this occurs.
ALARM/DEACTIVATION
Same as Idle/Deactivation except:
ALARM = L
15
LTC1755/LTC1756
APPLICATIO S I FOR ATIO
WUUU
Figure 9. LTC1755/LTC1756 State Diagram
DEACTIVATION
NO
FAULT FAULT
1755 F09
POWER OFF IDLE
DEACTIVATION
ALARM
ACTIVE
FAULT
TIMEOUT
PWR = DVCC
PWR = DVCC
PWR = 0V
PRES ≠ NC/NO
FAULT > 5µs
or
PRES ≠ NC/NO
The only possible next state is Idle/Deactivation which is
achieved by disabling the LTC1755/LTC1756 via the PWR
pin (i.e., PWR = DV
CC
).
The alarm indication can be cleared by rapidly cycling the
PWR pin. However, a new activation cycle will not begin
until V
CC
is or has dropped below approximately 1V.
ACTIVE
V
CC
= 3V or 5V (as determined by the 5V/3V pin)
RST = R
IN
, CLK = C
IN
I/O, AUX2, AUX1, DATA, AUX2IN, AUX1IN = Ready for
data (after READY becomes low)
CARD = PRES ⊕ NC/NO
ALARM = H
FAULT TIMEOUT
Same as Active except:
The duration of a fault is being measured. If the fault
duration exceeds 5µs then the Alarm/Deactivation state
follows. If the fault duration is less than 5µs, then the
device is returned to the Active state.
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
U
PACKAGE DESCRIPTIO
GN Package
24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
GN16 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 – 0.050
(0.406 – 1.270)
0.015 ± 0.004
(0.38 ± 0.10) × 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.0250
(0.635)
BSC
12
345678
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.189 – 0.196*
(4.801 – 4.978)
12 11 10 9
0.009
(0.229)
REF
GN24 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 – 0.050
(0.406 – 1.270)
0.015 ± 0.004
(0.38 ± 0.10) × 45°
0° – 8° TYP
0.007 – 0.0098
(0.178 – 0.249)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
0.004 – 0.0098
(0.102 – 0.249)
0.0250
(0.635)
BSC
0.337 – 0.344*
(8.560 – 8.738)
12
345678 9 10 11 12
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
161718192021222324 15 14 13
0.033
(0.838)
REF
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LTC1755/LTC1756
LINEAR TECHNOLOGY CORPORATION 1999
sn17556a 17556fs LT/LCG 0800 4K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear-tech.com
PART NUMBER DESCRIPTION COMMENTS
LTC1514/LTC1515 Micropower Step-Up/Step-Down Inductorless Regulated Output Up to 50mA, V
IN
from 2V to 10V, SO-8 Package
DC/DC Converters
LTC1516 Micropower Regulated 5V Charge Pump 5V/50mA Output from 2V to 5V Input, S0-8 Package
LTC1555/LTC1556 SIM Power Supply and Level Translator Step-Up/Step-Down Charge Pump + Generates 3V or 5V
LTC1754-5 5V Charge Pump with Shutdown in SOT-23 V
IN
from 2.7V to 5.5V, 50mA Output with V
IN
≥ 3V
LTC1986 3V/5V SIM Power Supply in SOT-23 V
IN
from 2.6V to 4.4V, 3V/5V Output at 10mA
RELATED PARTS
TYPICAL APPLICATIO
U
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LTC1756
PRES
PWR
GND
V
IN
V
CC
I/O
RST
CLK
C2
10µF
N.O.
C3
10µF
V
CC
I/O
RST
CLK
C1
0.68µF
GND
SMART CARD
17556 TA02
SMART CARD
PRESENT SWITCH
µCONTROLLER
3.3V
5V/3V
CARD
READY
C
–
C
+
DATA
RIN
CIN
Asynchronous Smart Card Interface
