A product Line of Diodes Incorporated PI3HDX1204B1 HDMI 2.0 6Gbps Limiting ReDriver with High EQ, Low Jitter and DP++ Level Shift Description HDMI/DVI PI3HDX1204B1 is suitable for HDMI 2.0 6.0 Gbps ReDriver with programmable high equalization, output swing and de-emphasis control mode. Max EQ is +22dB @ 6Gbps and can deliver 2x better additive jitter performance than other traditional ReDriver. In addition, it can supports the Dual-mode DisplayPort Level Shifter application for HDMI 2.0 compliant output signals. Dual-mode Displayport Level Shifter/Repeater GPU DP++ Tx Level Shifter Figure 1-1 DP++ to HDMI 2.0 Level Shifter The device EQ/SW/De-emphasis configuration can be supported by either the pin-strapping or the I2C programming to optimize differential signal performance over the variety of physical mediums. Monitor HDMI Repeater Features HDMI Cable compensate high insertion loss of the long TMDS signal transmission IISupport Dual-mode DP HBR3 to HDMI 2.0 Level Shifting IIDouble the jitter performance than conventional CMOS-process redriver IIInput EQ support 16 steps up to +22.2dB @ 3GHz ( 6 Gbps ), 4 steps De-emphasis and 4 steps output voltage swing setting IIIndependent each channel configuration for Equalization, Output Swing and De-emphasis IIBuilt-in channel activity detector with selectable input termination between 50 to VDD and 200k to VDD 2 IIPin Strap and I C selectable device programming mode support IISupply Voltage: 3.3V o o IIIndustrial Temperature Range: -40 C to 85 C IIPackaging (Pb-free & Green): 42-contact TQFN (3.4x9mm) Applications IINotebooks, Desktops and AIO PCs Active cables IIInternal board connection inside Video system IIHDMI XXXXX Document number: DS PARTNUMBER Rev.XX DP++ or HDMI Connector Notebook PC IIHDMI 2.0 compliant Limiting-type Redriver to 16-0170 DDC-ch HDMI Connector Figure 1-2 HDMI 2.0 Active cable application LCD Control Board System Control Board Internal Cable PI3HDX1204B Figure 1-3 TMDS Connection inside TV Ordering Information Ordering Number Package Code Package Description PI3HDX1204B1 ZH ZHE Pb-free & Green 42-pin TQFN (3.5x9mm) PI3HDX1204B1 ZH ZHEX Pb-free & Green 42-pin TQFN (3.5x9mm), Tape & Reel. PI3HDX1204B1 ZH ZHIEX Industrial-temp, Pb-free & Green 42-pin TQFN (3.5x9mm), Tape & Reel. Suffix: I = Industrial Temp, E = Pb-free and Green, X = Tape/Reel 1 www.diodes.com November 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Revision History Revision Description June 2016 Electrical chapter: PI3HDX1204-B revision to improve TMDS clock rising and falling time from typ 50ps to 70ps. De-emp [1:0] range adjusted between 0 and -2.1dB. Package and pin-out are same as PI3HDX1204-B. July 2016 Application chapter: Updated reference schematics in application chapter. Add load switch AP2151 requirement to protect sink to source-side devices back drive. Sep 2016 Finial datasheet release with package pin-out typo fixed - pin name 30, 37 and 38 XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 2 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Contents 1. Product Summary....................................................................................................................................................... 1 2. Pin Configuration ....................................................................................................................................................... 4 2.1 Package Pin-out...................................................................................................................................................... 4 2.1 Pin Description....................................................................................................................................................... 5 3. Functional Description.............................................................................................................................................. 7 3.1 Functional Block Diagram................................................................................................................................... 7 3.2 Function settings.................................................................................................................................................... 7 3.3 Output Eye Diagram changes with Different EQ setting............................................................................ 9 4. I2C Programming...................................................................................................................................................... 12 4.1 Address assignment............................................................................................................................................. 12 4.2I2C Data Transfer Sequence.............................................................................................................................. 16 5.Electrical........................................................................................................................................................................ 17 5.1 Absolute Maximum Ratings.............................................................................................................................. 17 5.2 Recommended Operation Conditions .......................................................................................................... 17 5.3 DC/AC Characteristics....................................................................................................................................... 17 5.4 I2C Bus.................................................................................................................................................................... 21 6.Application/Implementation................................................................................................................................. 23 6.1 Source Application............................................................................................................................................... 23 6.2 Sink Application................................................................................................................................................... 25 6.3 DC/AC-coupled Application............................................................................................................................ 26 6.4 Product Layout Guideline.................................................................................................................................. 27 6.5 General Layout Guideline.................................................................................................................................. 30 6.6 CTS Test Report ................................................................................................................................................... 36 7. Mechanical/Packaging Information.................................................................................................................... 38 7.1Mechanical ............................................................................................................................................................ 38 7.2 Part Marking Information................................................................................................................................. 39 7.3 Tape & Reel Materials and Design................................................................................................................... 39 7.4 Products Information.......................................................................................................................................... 43 7.5 Product Status Definition................................................................................................................................... 43 XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 3 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 2. Pin Configuration DE1 DE0 1 2 VCC A0RX+ 3 4 A0RX- BST1 BST0 BST3 BST2 2.1 Package Pin-out 42 41 40 39 38 37 36 35 NC NC VCC A0TX+ 34 A0TXVCC A1RX+ A1RXVCC A2RX+ 5 6 7 8 9 10 31 30 29 A2RXGND 11 12 A3RX+ 13 A3RXVCC 14 15 A1 A4 16 17 GND 33 32 A1TX+ A1TXGND A2TX+ 28 A2TX- 27 26 VCC 25 24 A3TX+ A3TXVCC 23 VOD1 22 A0 PIN_MODE PEN SDA SCL 18 19 20 21 Figure 2-1 Package Pin-out (Top-Side View) XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 4 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 2.1 Pin Description Pin # Pin Name Type Description Data Signals 4 5 A0RX+ A0RX- I TMDS inputs for Channel A0, with internal 50-Ohm Pull-Up and ~200k-Ohm Pull-Up otherwise. 35 34 A0TX+, A0TX- O TMDS outputs for Channel A0, with internal 50-Ohm Pull-Up and ~2k-Ohm Pull-Up otherwise. 7 8 A1RX+, A1RX- I TMDS inputs for Channel A1, with internal 50-Ohm Pull-Up and ~200k-Ohm Pull-Up otherwise. 32 31 A1TX+, A1TX- O TMDS outputs for Channel A1, with internal 50-Ohm Pull-Up and ~2k-Ohm Pull-Up otherwise. 10 11 A2RX+, A2RX- I TMDS inputs for Channel A2, with internal 50-Ohm Pull-Up and ~200k-Ohm Pull-Up otherwise. 29 28 A2TX+, A2TX- O TMDS outputs for Channel A2, with internal 50-Ohm Pull-Up and ~2k-Ohm Pull-Up otherwise. 13 14 A3RX+, A3RX- I TMDS inputs for Channel A3, with internal 50-Ohm Pull-Up and ~200k-Ohm Pull-Up otherwise. 26 25 A3TX+, A3TX- O TMDS outputs for Channel A3, with internal 50-Ohm Pull-Up and ~2k-Ohm Pull-Up otherwise. I2C Clock input. Control Signals 19 SCL I 18 SDA I/O 17, 16, 22 A4, A1, A0 I I2C programmable address bits, with internal 100k-Ohm Pull-Up. 20 PEN I Power Enable with internal 100K-Ohm Pull-Up 21 Pin_Mode I Input with internal 100k-Ohm Pull-Up. When HIGH, each channel is programmed by the external pin voltage. When LOW, each channel is programmed by the data stored in the I2C bus. 42 41 40 39 BST[3:0] I Inputs with internal 100k-Ohm Pull-Up. This pins set the amount of Equalizer Boost in all channel when Pin mode is HIGH. 23 VOD1 I Inputs with internal 100k-Ohm Pull-Up. This pin sets the output Voltage Level in all channel when Pin mode is HIGH. 1 2 DE[1:0] I Inputs with internal 100k-Ohm Pull-Up. This pins set the output De-Emphasis Level in all channel when Pin_Mode is HIGH. 38 37 NC XXXXX Document number: DS PARTNUMBER Rev.XX NC I2C Data input/output. No Connect 16-0170 5 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Power Pins 6, 12, 30, Center Pad GND GND Ground Pins 3, 9, 15, 24, 27, 33, 36 VDD PWR Power Supply Pins XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 6 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 3. Functional Description 3.1 Functional Block Diagram VDD VDD 50 or 200K AxRX+/- 50 or 2K De-emp Rx SDA/SCL Pin_Mode AxTX+/- Tx Output Driver Equalization A0, A1, A4 Buffer De-emp Voltage Swing Control Logic/Configuration Registers VOD1 DE[1:0] I2C Slave BST[3:0] PEN Figure 3-1 Functional block diagram 3.2 Function settings 3.2.1 Output Termination Detector On power up or when PEN becomes true, the output resistance is set to 2K ohms, and the input resistance is set to 200K ohms. The device continually looks to detect an external 50 ohm termination resistor on a per channel basis. If no 50 ohms is detected in the first 5ms of time, the channel is continually polled with 5ms detection cycle until detection occurs. 3.2.2 Input Activity Detector When the input voltage on individual channel basis falls below de-assert threshold VTH-, the output is driven to the common mode voltage so as to eliminate output chatter. When the input voltage is higher than assert threshold VTH+, the channel is resumed immediately. 3.2.3 Power Enable function One pin control or I2C control, when PEN is set to low, the IC goes into power down mode, both input and output termination set to 200K and 2K respectively. Individual Channel Enabling is done through the I2C register programming. 3.2.4 Equalization Setting BST[3:0] are the selection pins for the equalization selection for each channel. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 7 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Table 3-1. Table 1. Equalization Setting BST3 BST2 BST1 BST0 6Gbps (3GHz) 8Gbps (4GHz) 0 0 0 0 0.25 dB 0.4 dB 0 0 0 1 0.8 dB 1.1 dB 0 0 1 0 1.1 dB 1.6 dB 0 0 1 1 2.2 dB 3.1 dB 0 1 0 0 4.1 dB 5.4 dB 0 1 0 1 7.1 dB 8.9 dB 0 1 1 0 9.0 dB 10.8 dB 0 1 1 1 10.3 dB 12.2 dB 1 0 0 0 11.8 dB 13.8 dB 1 0 0 1 13.9 dB 15.8 dB 1 0 1 0 15.3 dB 17.3 dB 1 0 1 1 16.9 dB 19.0 dB 1 1 0 0 17.9 dB 20.0 dB 1 1 0 1 19.2 dB 21.3 dB 1 1 1 0 20.5 dB 22.6 dB 1 1 1 1 22.2 dB 24.3 dB 3.2.5 Output De-emphasis Setting De-emphasis Setting: DE[1:0] are the selection bits for the de-emphasis value. Table 3-2. Output De-emphasis Setting DE1 DE0 De-emphasis 0 0 0 dB 0 1 -0.5 dB 1 0 -0.7 dB 1 1 -1.0 dB 3.2.6 Swing Setting Swing Setting: VOD1 is the selection bit for the output swing voltage value.VOD0 fixed as 1. Table 3-3. Output Voltage Swing Setting VOD1 VOD0 Output Voltage Swing 0 1 0.85 Vppd 1 1 1.15 Vppd XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 8 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 3.2.7 Activity Detector Threshold Threshold Setting: VTH[1:0] are the selection bits for the activity detector threshold. Table 3-4. Activity Detector Threshold Setting VTH1 VTH0 VTH+ (Assert threshold) VTH- (De-assert threshold) 0 0 130 30 0 1 150 50 1 0 170 70 1 1 210 110 Units mVppd 3.3 Output Eye Diagram changes with Different EQ setting Figure 3-2 Eye Width vs. Input Equalization at Different Input trace Lengths XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 9 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 3-3 Eye Height vs. Input Equalization at Different Input trace Lengths XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 10 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Table 3-5. Input Eye Diagram without trace boards 6-in trace 24-in trace 18-in trace 30-in trace 36-in trace Table 3-6. Output Eye Opening with trace and different EQ Settings, 6.0 Gbps, Vdd=3.3V, 25C 6-in trace EQ=0001 (0.8dB) 12-in trace EQ=0100(4.1dB) 30-in trace EQ=0111(10.4dB) 48-in trace EQ=1000(11.8dB) 18-in trace EQ=0110(9.0dB) 24-in trace EQ=0111(10.3dB) Note: Trace Card Loss Informations is shown below. Frequency 6 inch Input Trace 3 GHz 6GHz -2.1 -4 Units dB 12 inch Input Trace -4 -7.5 dB 18 inch Input Trace -6.1 -11.3 dB 30 inch Input Trace -10.14 -18 dB 36 inch Input Trace -12.13 -22 dB 48 inch Input Trace -16.42 -29 dB XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 11 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 4. I2C Programming 4.1 Address assignment A6 A5 A4 A3 A2 A1 A0 R/W 1 1 Controlled by Pin# A4 0 0 Program Program ConControlled by 1=R, 0=W trolled by Pin# A1 Pin# A0 BYTE 0 Bit Type Power up condition Control affected 7 R Ch3 Activity Detector 6 R Ch2 Activity Detector 5 R Ch1 Activity Detector 4 R Ch0 Activity Detector [3:0] R 0 Not used Type Power up condition Control affected R 0 Not used Bit Type Power up condition Control affected 7 R/W 6 R/W 5 R/W 4 R/W [3:0] R/W Comment 1 = Activity 0 = No activity BYTE 1 Bit [7:0] Comment BYTE 2 Comment Ch3 Enable Latch from PEN input at startup Ch2 Enable Ch1 Enable 1 = Enable Ch0 Enable 0 Not used BYTE 3 Bit Type XXXXX Document number: DS PARTNUMBER Rev.XX Power up condition 16-0170 Control affected 12 Comment www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7 R/W BST3 Ch1 6 R/W BST2 Ch1 5 R/W BST1 Ch1 4 R/W 3 R/W 2 R/W BST2 Ch0 1 R/W BST1 Ch0 0 R/W BST0 Ch0 BST0 Ch1 Latch from BST[3:0] at startup BST3 Ch0 BYTE 4 Bit Type Power up condition Control affected 7 R/W BST3 Ch3 6 R/W BST2 Ch3 5 R/W BST1 Ch3 4 R/W 3 R/W 2 R/W BST2 Ch2 1 R/W BST1 Ch2 0 R/W BST0 Ch2 Comment BST0 Ch3 Latch from BST[3:0] at startup BST3 Ch2 BYTE 5 Bit Type Power up condition Control affected 7 R/W Latch from VOD1 at startup VOD1 Ch3 6 R/W VOD0 = "1" VOD0 Ch3 5 R/W Latch from VOD1 at startup VOD1 Ch2 4 R/W VOD0 = "1" VOD0 Ch2 3 R/W Latch from VOD1 at startup VOD1 Ch1 2 R/W VOD0 = "1" VOD0 Ch1 1 R/W Latch from VOD1 at startup VOD1 Ch0 0 R/W VOD0 = "1" VOD0 Ch0 Power up condition Control affected Comment BYTE 6 Bit Type XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 13 Comment www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7 R/W DE1 Ch3 6 R/W DE0 Ch3 5 R/W DE1 Ch2 4 R/W 3 R/W 2 R/W DE0 Ch1 1 R/W DE1 Ch0 0 R/W DE0 Ch0 DE0 Ch2 Latch from DE[1:0] at startup DE1 Ch1 BYTE 7: Reserved BYTE 8 Bit Type Power up condition Control affected 7 R/W 1 Ch3 RX detect PD 6 R/W 1 Ch2 RX detect PD 5 R/W 1 Ch1 RX detect PD 4 R/W 1 Ch0 RX detect PD 3 R/W 0 Ch3 RX reset 2 R/W 0 Ch2 RX reset 1 R/W 0 Ch1 RX reset 0 R/W 0 Ch0 RX reset Comment 1 = power down 1 = reset BYTE 9 Bit Type Power up condition Control affected 7 R/W 0 Ch3 Activity Detector Enable 6 R/W 0 Ch2 Activity Detector Enable 5 R/W 0 Ch1 Activity Detector Enable 4 R/W 0 Ch0 Activity Detector Enable [3:0] R/W 0 Not use Comment 1=inactive BYTE A Bit Type Power up condition XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 Control affected 14 Comment www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7 R/W 0 Ch3 Activity Detector Threshold VTH1 6 R/W 0 Ch3 Activity Detector Threshold VTH0 5 R/W 0 Ch2 Activity Detector Threshold VTH1 4 R/W 0 Ch2 Activity Detector Threshold VTH0 3 R/W 0 Ch1 Activity Detector Threshold VTH1 2 R/W 0 Ch1 Activity Detector Threshold VTH0 1 R/W 0 Ch0 Activity Detector Threshold VTH1 0 R/W 0 Ch0 Activity Detector Threshold VTH0 BYTE B-F : RESERVED XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 15 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 4.2 I2C Data Transfer Sequence Read sequence ACK DATAOUT ACK ACK ACK ACK DATAOUTN NOACK I2C Slave Writesequence R/W stop start DEVSEL ACK ACK ACK I2C Slave R/W DATAIN1 DATAIN DATAINN stop start DEVSEL Combinedsequence ACK DATAOUT1 ACK ACK ACK DATAOUTN NOACK DEVSEL R/W stop DEVSEL R/W start start I2C Slave Notes: 1. only block read and block write from the lowest byte are supported for this application. 2. for some I2C application, an offset address byte will be presented at the second byte in write command, which is called dummy byte here and will be simply ignored in this application for correct interoperation. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 16 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 5. Electrical 5.1 Absolute Maximum Ratings Supply Voltage to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +4.6 V DC SIG Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VDD + 0.5 V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25 mA to +25 mA Power Dissipation Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 W ESD, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2 kV to +2 kV Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 C to +150 C Note (1) Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 5.2 Recommended Operation Conditions Parameter Min. Power supply voltage (VDD to GND)(1) Typ. 3.0 Max 3.6 V I2C (SDA, SCL) 3.6 V Supply Noise Tolerance up to 25 MHz (2) 100 mVp-p 85 C Ambient Temperature 3.3 Units -40 25 Note (1) Typical parameters are measured at VDD = 3.3 0.3V, TA = 25C. They are for the reference purposes, and are not production-tested (2) Allow supply noise (mVp-p sine wave) under typical condition 5.3 DC/AC Characteristics 5.3.1 LVCMOS DC specifications Symbol Parameter Conditions Min. Typ. Max Unit VIH DC input logic high VDD/2 + 0.7 VDD + 0.3 V VIL DC input logic low -0.3 VDD/2 - 0.7 V VOH At IOH = -200A VOL At IOL = -200A V hys Hysteresis of Schmitt trigger input VDD + 0.2 V 0.2 0.8 V V 5.3.2 Power Dissipation Symbol Parameter Conditions PEN = 1, EQ = 0dB, De-emphasis = 0dB, All 4 channels 0.8V Swing Imax Supply Current Min. Typ. Max. Units 265 325 mA PEN = 1, EQ = 0dB, De-emphasis = 0dB, All 4 channels 1.3V Swing 300 350 mA IDDQ Quiescent Supply Current PEN=0, TMDS Output Disable 0.17 mA Pidle Standby Mode Supply Power PEN=0, All channels disable 0.8 mA XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 17 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 5.3.3 Package power ratings Package Theta Ja(still air) (C/W) Theta Jc (C/W) Max. Power Dissipation Rating (Ta 70) 33.69 15.17 1.63W 42-pin TQFN (ZH42) 5.3.4 TMDS Differential Pins Symbol Parameter Conditions VOH Single-ended High Level Output Voltage VOL Single-ended Low Level Output Voltage Vswing Output Voltage Swing RT Input Termination Resistance VIN = 2.9V IOZ Leakage Current with Hi-Z I/O VDD = 3.6V VDD = 3.3 V, Rout = 50 Ohm Min. Typ. Max. Units VDD-10 VDD+10 mV VDD-600 VDD-400 mV 700 45 1300 50 mVppd 55 Ohm 10 uA 5.3.5 Switching Characteristics Symbol Parameter Conditions Min. Typ. Max. Tpd Propagation Delay Tr Tx Signal Rise Time (20% - 80%) Tf Tx Signal Fall Time (80% - 20%) Tsk(p) Pulse Skew 10 50 ps Tsk(D) Intra-pair Differential Skew 23 50 ps Tsk(O) Inter-pair Differential Skew 100 ps TJit-Clk Peak-to-peak Output Jitter for Clock channel 15 30 ps TJit-Data Peak-to-peak Output Jitter for Data channels 18 50 ps tsx Select to switch Output 10 ns ten Enable Time 200 ns tdis Disable Time 10 ns 2000 VDD = 3.3V, RT = 50 Ohm, Pre-/Deemp = 0 dB Pre-/De-emp = 0 dB Data Input = 6 Gbps HDMI Pattern, Clock input = 150 MHz Units ps 70 ps 70 ps 5.3.6 Signal Detector Symbol Parameter Conditions Vth+ Assert Threshold of Signal Detector Signal swing @ 3GHz 130 210 mVppd Vth- De-assert Threshold of Signal Detector Signal swing @ 100 MHz 30 110 mVppd XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 18 Min. Typ. Max. Units www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Test Unit Board Signal Generater (BERT) D.U.T. In Out Pre-trace Board TP1 Post-trace Board TP2 TP3 TP4 Figure 5-1 Electrical parameter test setup Latency Delay Time, tDD Input Intra-Pair Skew, tSK_INTRA_IN INxP 50% INxN Output Intra-Pair Skew, tSK_INTRA_OUT OUTxP 50% OUTxN Output Inter-Pair Skew, tSK_INTER_OUT OUTyP Falling time, tF 80% 20% 50% 20% OUTyN 80% Rising time, tR Figure 5-2 Intra and Inter-pair Differential Skew definition Common Mode Voltage VCM = (|VD+ + VD-| / 2) VD+ VDIFF VCM VCMP = (max |VD+ + VD-| / 2) VD- V_D + -V_D- DIFFp-p Symmetric Differential Swing VDIFFp-p = (2 * max |VD+ - VD-|) 0V VDIFFP-P Asymmetric Differential Swing VDIFFp-p = (max |VD+ - VD-| {VD+ > VD-} + max |VD+ - VD-| {VD+ < VD-}) Figure 5-3 Definition of Peak-to-peak Differential voltage XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 19 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 5-4 HDMI Source Test Point for Eye Diagram Figure 5-5 HDMI Sink Test Point for Eye Diagram XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 20 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 5.4 I2C Bus Symbol Parameter VDD Nominal Bus Voltage Freq Bus Operation Frequency VIH DC input logic high VIL DC input logic low VOL DC output logic low IOL = 3mA Current Through Pull-Up Resistor High Power specification Ipullup Conditions Min. Typ. 3.0 VDD/2 Input leakage per bus segment Ileak-pin Input leakage per device pin CI Capacitance for SDA/SCL tBUF Bus Free Time Between Stop and Start condition tHD:STA Hold time after (Repeated) Start condition. After this period, the first clock is generated. TSU:STA TSU:STO 3.6 V 400 kHz VDD/2 -0.3 Ileak-bus Units VDD + 0.3 + 0.7 or Current Source Max - 0.7 V V 0.4 V 3.0 3.6 mA -200 200 uA -15 uA 10 pF 1.3 us 0.6 us Repeated start condition setup time 0.6 us Stop condition setup time 0.6 us 0 ns At pull-up, Max THD:DAT Data hold time TSU:DAT Data setup time 100 ns tLOW Clock low period 1.3 us tHIGH Clock high period tF Clock/Data fall time 0.6 tR tPOR 50 us 300 ns Clock/Data rise time 300 ns Time in which a device must be operation after power-on reset 500 ms Note: (1) Recommended maximum capacitance load per bus segment is 400pF. (2) Compliant to I2C physical layer specification. (3) Ensured by Design. Parameter not tested in production. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 21 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 STOP START START SDA tf tSU;DAT tLOW tf tr t HD;STA tBUF SCL S tHD;STA tHD;DAT HIGH t SU;STA Sr t SU;STO P S Figure 5-6 I2C Timing Diagram XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 22 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6. Application/Implementation 6.1 Source Application PI3HDX1204B1 is designed to accept AC-coupled as well as DC-coupled main link signals. When a dual-mode DP source is connected to the input of PI3HDX1204B1 in a source application, AC coupling capacitors must be placed at the input side. PI3HDX1204B1 +3.3V_SYS AP2151 VDD VDD VDD Load Switch Dual-mode DP Source 50 50 50 Common ESD Mode Protector Choke 50 0.1u_0402 AxRX+ AxTX+ 0.1u_0402 AxRX- AxTX- HDMI Connector PEN Pin_Mode, A[4,1:0] BST[3:0], DE[1:0], PS[1:0], VOD[1:0] +3V3 10K +5V DDC Switch / Buffer 10K SCL(3.3V) SDA(3.3V) 2K 2K SCL(5V) PI6ULS5V9617 SDA(5V) 20K HPD(3V3) HPD(5V) 47K Title Size Date: PI3HDX1204B1 Source Application Diagram Document Number Tuesday, July 05, 2016 Rev A Sheet 1 of 1 Figure 6-1 PI3HDX1204B1 Source Application Circuit 6.1.1 ESD Protectors on Output TMDS As 8kV contact ESD is commonly required, ESD protectors are implemented at the output TMDS pins of PI3HDX1204B1 for source application. ESD8104 HDMI2.0 ESD protector can be considered to protect the 3.3V TMDS paths as its reverse working voltage is 3.3V. 6.1.2 Extra Component for Rise/fall Time Control Per HDMI2.0 specification, rise/fall time of TMDS clock is kept at minimal 75ps while that of TMDS data is decreased to minimal 42.5ps if data rate is between 3.4Gbps and 6Gbps. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 23 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-2 HDMI2.0 Trise/fall Requirement PI3HDX1204B1 is designed to meet the rise/fall time of TMDS data. If output trace length is short, maybe 1" only, common-mode choke or external inductor can be considered for slowing down the rise/fall time for TMDS clock of PI3HDX1204B1. 6.1.3 Leakage Blockage for VOFF Test When performing VOFF test specified in HDMI 1.4a Compliance Test Specification, each output TMDS of PI3HDX1204B1 will be pulled to 3.3V via an external 50k resistor. In this case, current will pass through an internal ESD protector at the output TMDS pin of PI3HDX1204B1 and leakage will be found at VCC pin of PI3HDX1204B1. Figure 6-3 HDMI VOFF Test Setup Figure 6-4 HDMI VOFF Requirement To avoid this leakage, AP2151A power switch can be employed between the main 3.3V supply on a system and the VCC power plane of PI3HDX1204B1. Below is an example borrowed from an evaluation board schematic. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 24 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-5 Power Distribution Switch Example 6.2 Sink Application PI3HDX1204B1 can also be employed in a sink application as it offers a range of equalization setting. +5V Regulator PI3HDX1204B1 AP2151 Load Switch EN VDD VDD VDD HDMI Scalar Chipset ESD Protector 50 50 50 50 AxRX+ AxTX+ AxRX- AxTX- PEN HDMI Connector Pin_Mode, A[4, 1:0] BST[3:0], DE[1:0], PS[1:0], VOD[1:0] +5V SCL SDA 47K 47K +5V +5V HPD +5V SCL, SDA and HPD of the HDMI scalar chipset are assumed 5V tolerant. 1K Figure 6-6 PI3HDX1204B1 Sink Application Circuit Title Size 6.2.1 ESD Protectors on Output TMDS Date: PI3HDX1204B1 Sink Application Diagram Document Number Rev A Tuesday, July 05, 2016 Sheet 1 of 1 ESD protector selection guidance for source and sink applications is the same. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 25 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6.3 DC/AC-coupled Application High-speed differential signal traces VDD 50 VBias 50 50 A0RX+ A0TX+ A0RX- A0TX- GND 50 GND Receiver DC-Coupled Differential Signaling Application Circuits VDD VBias 50 50 4.7nF A0RX+ 50 4.7nF 50 A0TX+ A0TX- A0RX- GND Receiver AC-Coupled Differential Signaling Application Circuits Figure 6-7 DC/AC-coupled application diagram XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 26 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6.4 Product Layout Guideline 6.4.1 AC Coupling Capacitor Below is an example of placing AC coupling capacitors on high-speed channels Figure 6-8 AC Coupling Capacitor Placement 6.4.2 Output Trace Length To fulfill minimal 75ps rise/fall time requirement of TMDS clock, 1.5 - 4.5" TMDS trace length between PI3HDX1204B1 and HDMI connector for source application is recommended. This trace length varies with PCB trace width, characteristics of common-mode choke/ESD protector and connector quality. If trace width is 5 mil, 2.7 - 3.3" is recommended. Isolation space should be larger than 5 mil to minimize the crosstalk so thus jitter. Below is the PI3HDX1204B1 placement on its evaluation board. Figure 6-9 Source-side placement near to the HDMI connectors 6.4.3 Differential Impedance (TDR) Layout guideline especially for high-speed transmission is critical. Please refer to PI3DPxxx_PI3HDxxx_Layout Guideline for detailed recommendations. Differential impedance test is required for both source and sink applications per HDMI 2.0 specification. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 27 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-10 HDMI2.0 Differential Impedance Requirement for Source Application Figure 6-11 HDMI2.0 Differential Impedance Requirement for Sink Application The PCB impedance immediately before and after an ESD protector must be adjusted to compensate the capacitance loading of the ESD protector. Below is an example designing RClampe0544M in PI3HDX1204B1 evaluation board. Trace impedances before and after the ESD protector are tuned to compensate the capacitance of RClamp0544M. Semtech's layout guideline is followed. Figure 6-12 ESD Protector on PI3HDX1204B1 Source EVB 6.4.4 GND via on the thermal pad area Several GND via are "MUST" required on thermal area. The via size is 12/24 mil. Below is the thermal pad via layout recommendation. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 28 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-13 Recommended Land patterns XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 29 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6.5 General Layout Guideline As transmission data rate increases rapidly, any flaws and/or mis-matches on PCB layout are amplified in terms of signal integrity. Layout guideline for high-speed transmission is highlighted in this application note. 6.5.1 Power and Ground To provide a clean power supply for Pericom high-speed device, few recommendations are listed below: * * * * * * Power (VDD) and ground (GND) pins should be connected to corresponding power planes of the printed circuit board directly without passing through any resistor. The thickness of the PCB dielectric layer should be minimized such that the VDD and GND planes create low inductance paths. One low-ESR 0.1uF decoupling capacitor should be mounted at each VDD pin or should supply bypassing for at most two VDD pins. Capacitors of smaller body size, i.e. 0402 package, is more preferable as the insertion loss is lower. The capacitor should be placed next to the VDD pin. One capacitor with capacitance in the range of 4.7uF to 10uF should be incorporated in the power supply decoupling design as well. It can be either tantalum or an ultra-low ESR ceramic. A ferrite bead for isolating the power supply for Pericom high-speed device from the power supplies for other parts on the printed circuit board should be implemented. Several thermal ground vias must be required on the thermal pad. 25-mil or less pad size and 14-mil or less finished hole are recommended. V DD P la ne Bypass noise Power Flow Several Thermal GND Vias must be required on the Thermal Pad area 10uF 1uF 0.1uF 0.1uF VIN Center Pad GND Plane VIN G N D P la ne 0.1uF VIN Figure 6-14 Decoupling Capacitor Placement Diagram 6.5.2 High-speed signal Routing Well-designed layout is essential to prevent signal reflection: * * For 90 differential impedance, width-spacing-width micro-strip of 6-7-6 mils is recommended; for 100 differential impedance, width-spacing-width micro-strip of 5-7-5 mils is recommended. Differential impedance tolerance is targeted at 15%. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 30 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-15 Trace Width and Clearance of Micro-strip and Strip-line * For micro-strip, using 1/2oz Cu is fine. For strip-line in 6+ PCB layers, 1oz Cu is more preferable. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 31 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-16 4-Layer PCB Stack-up Example Figure 6-17 6-Layer PCB Stack-up Example * Ground referencing is highly recommended. If unavoidable, stitching capacitors of 0.1uF should be placed when reference plane is changed. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 32 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-18 Stitching Capacitor Placement * * To keep the reference unchanged, stitching vias must be used when changing layers. Differential pair should maintain symmetrical routing whenever possible. The intra-pair skew of micro-strip should be less than 5 mils. * * To keep the reference unchanged, stitching vias must be used when changing layers. Differential pair should maintain symmetrical routing whenever possible. The intra-pair skew of micro-strip should be less than 5 mils. Figure 6-19 Layout Guidance of Matched Differential Pair * * * * For minimal crosstalk, inter-pair spacing between two differential micro-strip pairs should be at least 20 mils or 4 times the dielectric thickness of the PCB. Wider trace width of each differential pair is recommended in order to minimize the loss, especially for long routing. More consistent PCB impedance can be achieved by a PCB vendor if trace is wider. Differential signals should be routed away from noise sources and other switching signals on the printed circuit board. To minimize signal loss and jitter, tight bend is not recommended. All angles should be at least 135 degrees. The inner air gap A should be at least 4 times the dielectric thickness of the PCB. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 33 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-20 Layout Guidance of Bends * Stub creation should be avoided when placing shunt components on a differential pair. Figure 6-21 Layout Guidance of Shunt Component * Placement of series components on a differential pair should be symmetrical. Figure 6-22 Layout Guidance of Series Component * Stitching vias or test points must be used sparingly and placed symmetrically on a differential pair. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 34 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Figure 6-23 Layout Guidance of Stitching Via XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 35 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6.6 CTS Test Report 6.6.1 HDMI 2.0 Compliance Test Set-up Figure 6-24 HDMI 2.0 CTS test setup Note: Application Trace Card Information for CTS test HDMI FR4 trace Insertion loss @ 6Gbps XXXXX Document number: DS PARTNUMBER Rev.XX 0 in 6 in 12 in 18 in 24 in 30 in 36 in -5.91 dB -9.75 dB -10.47 dB -13.05 dB -15.87 dB -16.97 dB -21.20 dB 16-0170 36 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 6.6.2 HDMI 2.0 Compliance Report XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 37 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7. Mechanical/Packaging Information 7.1 Mechanical Note: (1) For latest package info, please check: http://www.pericom.com/support/packaging/packaging-mechanicals-and-thermal-characteristics/ XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 38 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7.2 Part Marking Information Our standard product mark follows our standard part number ordering information, except for those products with a speed letter code. The speed letter code mark is placed after the package code letter, rather than after the device number as it is ordered. After electrical test screening and speed binning has been completed, we then perform an "add mark" operation which places the speed code letter at the end of the complete part number. PI Y 1 X 2X 3X 4 Y 2Y 3Y 4Y 5 X 5Y 6 X 6 X 7 X 8 X 9 X 10 X 11 X11(1-letter) Blank=Tube; X=Tape/Reel X10(1-letter) E = Pb-free & Green X9(1-letter): Temperature Range Blank = Commerial I = Industrial Q = Automotive X6X7X8(3-letters): Package Code eg. ZH=Package ZH, ZLS =Package ZLS Y6: Silicon Revision Code Blank/0 = Default, 1 = Rev1, 2= Rev2 X5(1-letter): Product Feature Skews Blank/A = Default, B=Skew B Y1Y2Y4Y5(4-numbers) : Product Unique Code X2X3X4(3-letters): Product Family/Technology Code eg. HDX = HDMI, DPX = DisplayPort WVR=Wide Voltage Range USB = USB, DBS = Digital Broadband switch Y1(1-number): Supply IO Voltage 3: 3.3V, 2: 1.8V, 1: 1.0/1.2V PI(or P): Business Unit ID eg. Precision Timing and Connect Figure 7-1 Part marketing information 7.3 Tape & Reel Materials and Design Carrier Tape The Pocketed Carrier Tape is made of Conductive Polystyrene plus Carbon material (or equivalent). The surface resistivity is 106Ohm/sq. maximum. Pocket tapes are designed so that the component remains in position for automatic handling after cover tape is removed. Each pocket has a hole in the center for automated sensing if the pocket is occupied or not, thus facilitating device removal. Sprocket holes along the edge of the center tape enable direct feeding into automated board assembly equipment. See Figures 3 and 4 for carrier tape dimensions. Cover Tape Cover tape is made of Anti-static Transparent Polyester film.The surface resistivity is 107Ohm/Sq. Minimum to 1011Ohm sq. maximum. The cover tape is heat-sealed to the edges of the carrier tape to encase the devices in the pockets. The force to peel back the cover tape from the carrier tape shall be a MEAN value of 20 to 80gm (2N to 0.8N). Reel The device loading orientation is in compliance with EIA-481, current version (Figure 2). The loaded carrier tape is wound onto either a 13-inch reel, (Figure 4) or 7-inch reel. The reel is made of Antistatic High-Impact Polystyrene. The surface resistivity 107Ohm/ sq. minimum to 1011Ohm/sq. max. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 39 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 NOTE: LABELS TO BE PLACED ON THE REEL OPPOSITE PIN 1 BARCODE LABEL TOP COVER TAPE SPROCKET HOLE (ROUND) CARRIER TAPE EMBOSSED CAVITY Figure 7-2 Tape & Reel label information CARRIER TAPE Top Left PIN 1 ORIENTATION Top Right PIN 1 ORIENTATION COVER TAPE END START TRAILER COVER TAPE COMPONENTS LEADER Bottom Left PIN 1 ORIENTATION Figure 7-3 Tape leader and trailer pin 1 orientation T Cover Tape Round Sprocket Holes Po Do T1 E1 Ao P2 Bo B1 (10 pitches cumulative tolerance on tape 0.2mm Embossed Cavity Ko F So W D1 S1 T2 R (min) Center lines of Cavity P1 Direction of Unreeling Figure 7-4 Standard embossed carrier tape dimension XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 40 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Constant Dimensions Tape Size D0 8mm D1 (Min) E1 P0 P2 1.0 2.0 0.05 12mm 16mm 24mm 1.5 +0.1 -0.0 32mm 1.5 1.75 0.1 4.0 0.1 2.0 44mm R (See Note 2) S1 (Min) T1 (Max) 0.6 0.1 25 0.6 30 2.0 0.1 2.0 0.15 T (Max) N/A (See Note 3) 50 Variable Dimensions Tape Size 8mm 12mm 16mm 24mm 32mm P1 B1 (Max) Specific per package type. Refer to FR-0221 (Tape and Reel Packing Information) or visit www. pericom.com/pdf/gen/tapereel. pdf 44mm E2 (Min) F So 4.35 6.25 3.5 0.05 T2 (Max.) W (Max) 2.5 8.3 6.5 12.3 8.0 16.3 N/A (see note 4) 8.2 10.25 5.5 0.05 12.1 14.25 7.5 0.1 20.1 22.25 11.5 0.1 23.0 N/A 14.2 0.1 28.4 0.1 35.0 N/A 20.2 0.15 40.4 0.1 12.0 16.0 24.3 A0, B0, & K0 See Note 1 32.3 44.3 NOTES: (1) A0, B0, and K0 are determined by component size. The cavity must restrict lateral movement of component to 0.5mm maximum for 8mm and 12mm wide tape and to 1.0mm maximum for 16,24,32, and 44mm wide carrier. The maximum component rotation within the cavity must be limited to 20o maximum for 8 and 12 mm carrier tapes and 10o maximum for 16 through 44mm. (2) Tape and components will pass around reel with radius "R" without damage. (3) S1 does not apply to carrier width 32mm because carrier has sprocket holes on both sides of carrier where DoS1. (4) So does not exist for carrier 32mm because carrier does not have sprocket hole on both side of carrier. Access Hole at Slot Location (40 mm min Dia) B W3 W2(measured at hub) A D C W1(measured at hub) Width=2.5mm Min, Depth=10.0mm Min XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 41 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 Reel dimensions by tape size Tape Size A N (Min) (1) 8mm 1782.0mm or 3302.0mm 60 2.0mm or 1002.0mm W1 W2(Max) 8.4 +1.5/-0.0 mm 14.4 mm 12.4 +2.0/-0.0 mm 18.4 mm 16mm 16.4 +2.0/-0.0 mm 22.4 mm 24mm 24.4 +2.0/-0.0 mm 30.4 mm 32.4 +2.0/-0.0 mm 38.4 mm 44.4 +2.0/-0.0 mm 50.4 mm 12mm 32mm 3302.0mm 100 2.0mm 44mm W3 B (Min) C D (Min) Shall Accommodate Tape Width Without Interference 1.5mm 13.0 +0.5/-0.2 mm 20.2mm NOTE: (1) If reel diameter A=178 2.0mm, then the corresponding hub diameter (N(min) will by 60 2.0mm. If reel diameter A=3302.0mm, then the corresponding hub diameter (N(min)) will by 1002.0mm. XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 42 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 7.4 Products Information Part Number Product Description PI3DPX1203 DisplayPort 1.3 Linear ReDriver for Source/Sink/Cable Application PI3WVR12412 Wide Voltage Range 1:2 DP 1.2 & HDMI 2.0 Passive Switch PI3WVR31310 Wide Voltage Range 1:3 DP 1.2 & HDMI 2.0 Passive Switch PI3HDX414 HDMI 1.4b Splitter 1:4 with Signal Conditioning for 3.4Gbps Application PI3HDX412BD HDMI 1.4b Splitter 1:2 with Signal Conditioning for 3.4Gbps Application PI3HDX511D/E Ultra Low Power HDMI 1.4b ReDriver and DP++ Level Shifter PI3HDX511F High EQ HDMI 1.4b ReDriver and DP++ Level Shifter for Sink/Source Application PI3EQXDP1201 DisplayPort 1.2 ReDriver with built-in AUX Listener PI3HDX621 HDMI 1.4 2:1 Active Switch with built-in ARC and Fast Switching support PI3HDMI336 Active HDMI 3:1 Switch/Re-driver with I2C control and ARC Transmitter 7.5 Product Status Definition Datasheet Identification Advanced Information Preliminary Product Status Definition Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Diodes Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Obsolete Not In Production XXXXX Document number: DS PARTNUMBER Rev.XX Datasheet contains final specifications. Diodes Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Diodes Semiconductor. The datasheet is for reference information only. 16-0170 43 www.diodes.comSeptember 2016 A product Line of Diodes Incorporated PI3HDX1204B1 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright (c) 2016, Diodes Incorporated www.diodes.com XXXXX Document number: DS PARTNUMBER Rev.XX 16-0170 44 www.diodes.comSeptember 2016