1
POWER MANAGEMENT
Dual Channel 2.5MHz, 1.8A
Synchronous Step-Down Regulator
SC284
Features
VIN Range — 2.9 – 5.5V
VOUT Selectable — 0.8 - 3.3V
Up to 1.8A Output Current for Each Channel
Ultra-Small Footprint, <1mm Height Solution
Switching Frequency — 2.5MHz
Eciency Up to 94%
Excellent Light Load Eciency
Low Output Noise Across Load Range
Excellent Transient Response
Start Up into Pre-Bias Output
100% Duty-Cycle Low Dropout Operation
Shutdown Current — <1µA
Internal Soft Start
Input Under-Voltage Lockout
Output Over-Voltage, Current Limit Protection
Over-Temperature Protection
Adjustable Output Voltage
Package — 3 x 3 x 0.6(mm) UT20
Temperature Range — -40 to +85°C
Lead-free, halogen-free, and RoHS/WEEE compliant
Applications
Desktop Computing
Set-Top Box
LCD TV
Network Cards
Printer
Description
The SC284 is a dual channel 1.8A synchronous step-
down regulator designed to operate with an input
voltage range of 2.9 to 5.5 Volts. Each channel oers
fteen pre-determined output voltages via four control
pins programmable from 0.8 to 3.3 Volts. The control pins
allow for on-the-y voltage changes, enabling system
designers to implement dynamic power savings. The
SC284 is also capable of adjusting the output voltage via
an external resistor divider.
The device operates with a xed 2.5MHz oscillator
frequency, allowing the use of small surface mount
external components.
Connecting CTL0 — CTL3 to logic low forces the device
into shutdown mode reducing the supply current to less
than 1µA. Connecting any of the control pins to logic
high enables the converter and sets the output voltage
according to Table 1. Other features include under-
voltage lockout, soft-start to limit inrush current, and
over-temperature protection.
The SC284 is available in a 3 x 3 x 0.6 (mm) MLPQ-UT20
package and has a rated temperature range of -40 to
+85°C.
Typical Application Circuit
Revision 2.1
SC284
CTL0A
CTL1A
CTL2A
CTL3A
CTL0A
CTL1A
CTL2A
CTL3A
CTL0B
CTL1B
CTL2B
CTL3B
CTL0B
CTL1B
CTL2B
CTL3B
AVINA
VINA
CAVINA 10nF
RAVINA 1Ω
PVINA
AVINB
VINB
CAVINB 10nF
RAVINB 1Ω
PVINB
PGNDB
AGNDB
PGNDA
AGNDA
CINA
10µF
CINB
10µF
COUTA
22µF
LXA
VOUTA
VOUTA
LA2.2µH
LB2.2µH
COUTB
22µF
LXB
VOUTB
VOUTB
2
SC284
Pin Conguration Ordering Information
Device Package
SC284ULTRT(1)(2) 3 x 3 x 0.6(mm) MLPQ-UT20
SC284EVB(3) Evaluation Board
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is fully WEEE and RoHS
compliant and halogen-free.
(3) Please specify the default VOUTA & VOUTB when ordering.
Table 1 – Output Voltage Settings
CTL3_ CTL2_ CTL1_ CTL0_ Output Voltage
0 0 0 0 Shutdown
0 0 0 1 0.80
0 0 1 0 1.00
0 0 1 1 1.025
0 1 0 0 1.05
0 1 0 1 1.20
0 1 1 0 1.25
0 1 1 1 1.30
1 0 0 0 1.50
1 0 0 1 1.80
1 0 1 0 2.20
1 0 1 1 2.50
1 1 0 0 2.60
1 1 0 1 2.80
1 1 1 0 3.00
1 1 1 1 3.30
3 x 3 x 0.6(mm) MLPQ-UT20
θJA 40°C/W
Marking Information
yyww = Datecode
xxxx = Semtech Lot number
TOP VIEW
1
2
3
4
T
P V IN A
C T L0 A
A G N D A
A V IN A
5
6 7 8 9 10
P G N D B
P V IN B
C T L0 B
A G N D B
A V IN B
C T L1 B
15
14
13
12
11
1617181920
C T L1 A
LXB
V O U T B
C T L3A
C T L2A
C T L2B
P G N D A
L X A
C T L3 B
V O U T A
284
yyw w
xxxx
3
SC284
Electrical Characteristics
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the
parameters specied in the Electrical Characteristics section is not recommended.
Notes:
(1) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
(2) Tested according to JEDEC standard JESD22-A114-B.
Unless specied: VINA= VINB= 5.0V, VOUTA= VOUTB=1.50V, CINA=CINB=10µF, COA=COB= 22µF, L= 2.2µH, -40°C≤ TJ≤ +125 °C. Unless otherwise noted
typical values are TA= +25 °C.
Parameter Symbol Conditions Min Typ Max Units
Under-Voltage Lockout UVLO
Rising VINA, VINB 2.65 2.75 2.85 V
Hysteresis 240 300 mV
Output Voltage Tolerance(1) ΔVOUT Channel A & B; VIN= 2.9 – 5.5V; IOUT=0A -2.0 +2.0 %
Current Limit ILIMIT Channel A & B; Peak LX current 2.25 3.0 3.75 A
Supply Current IQChannel A & B; No load, Per channel 10 mA
Shutdown Current ISHDN CTL0-3= GND, Per channel 1 10 µA
High Side Switch Resistance(2) RDSON_P Channel A & B; ILX= 100mA, TJ= 25 °C 95
mΩ
Low Side Switch Resistance(2) RDSON_N Channel A & B; ILX= -100mA, TJ= 25 °C 65
LX Leakage Current(2) ILK(LX)
Channel A & B; VIN= 5.5V; LX= 0V; CTL0-3= GND 1 10
µA
Channel A & B; VIN= 5.5V; LX= 5.0V; CTL0-3= GND -10 -1
Load Regulation ΔVLOAD-REG Channel A & B; VIN= 5.0V; IOUT=1mA – 1.8A ±0.5 %
Oscillator Frequency fOSC Channel A & B 2.0 2.5 3.0 MHz
Soft-Start Time tSS Channel A & B; IOUT= 1.8A 850 µs
Absolute Maximum Ratings
VINA and VINB Supply (V) . . . . . . . . . . . . . . . . . . -0.3 to +6.0
LXA, LXB (V) . . . . . . . . . . . . . -1 to VIN+1, -3 (20ns Max), 6 Max
VOUTA, VOUTB (V) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN+0.3)
CTLxA/B pins (V) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
Peak IR Reflow Temperature (°C) ........................ 260
ESD Protection Level(2) (kV) ......................... 3KV
Recommended Operating Conditions
VINA and VINB Supply (V) . . . . . . . . . . . . . . . . . . . . 2.9 to 5.5
Maximum Output current each channel (A) . . . . . . . . . . 1.8
Temperature Range (°C) ......................... -40 to +85
Thermal Information
Thermal Resistance, Junction to Ambient (1) (°C/W) ........ 40
Maximum Junction Temperature (°C) ................. +150
Storage Temperature Range (°C) ................. -65 to +150
4
SC284
Parameter Symbol Conditions Min Typ Max Units
Foldback Holding Current ICL_HOLD
Average LX Current, VOUT=1.5V 240 mA
Average LX Current, VOUT=3.3V 130 mA
CTLx Input Current(2) ICTL_ Channel A & B; CTL0-3=VIN or GND -2.0 2.0 µA
CTLx Input High Threshold VCTLx_HI Channel A & B 1.2 V
CTLx Input Low Threshold VCTLx_LO Channel A & B 0.4 V
VOUT Over Voltage Protection VOVP Channel A & B 115 %
Thermal Shutdown Temperature TSD Channel A & B(3) 160 °C
Thermal Shutdown Hysteresis TSD_HYS Channel A & B(3) 10 °C
Electrical Characteristics (continued)
Notes:
(1) The “Output Voltage Tolerance” includes output voltage accuracy, voltage drift over temperature and the line regulation.
(2) The negative current means the current ows into the pin and the positive current means the current ows out from the pin.
(3) The thermal shutdown for both Channel A and B is independent from each other.
5
SC284
Typical Characteristics
Eciency vs. Load Current Total Loss (Per Channel) vs. Load Current
Load Regulation
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, Unless otherwise noted, L= 2.2uH (TOKO: 1127AS-2R2M).
Dropout Voltage in 100% Duty Cycle Operation
Dropout Voltage of 100% Duty Cycle Operation
0
50
100
150
200
250
300
350
400
450
500
0.0 0.3 0.6 0.9 1.2 1.5 1.8
Output Current (A)
Dropout Voltage (mV)
T
A
= 25°C
L= 1071AS-2R2M
(DCR= 60m_max)
L= 1127AS-2R2M
(DCR=48m_max)
UVLO Rising Threshold Variation
UVLO Rising Threshold Variation
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
-40 -15 10 35 60 85
Ambient Temperature (°C)
Variation
IOUT= 0A
UVLO Hysteresis Variation
-5%
-4%
-3%
-2%
-1%
0%
1%
2%
3%
4%
5%
-40 -15 10 35 60 85
Ambient Temperature (°C)
Variation
IOUT= 0A
UVLO Hysteresis Variation
Efficiency
60%
65%
70%
75%
80%
85%
90%
95%
100%
0.0 0.3 0.6 0.9 1.2 1.5 1.8
Output Current (A)
Efficiency (%)
V
IN
=5.0V;V
OUT
=3.3V
T
A
=25°C
V
IN
=5.0V;V
OUT
=1.5V
V
IN
=3.3V;V
OUT
=1.5V
IN
OUT
Load Regulation
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
0.0 0.3 0.6 0.9 1.2 1.5 1.8
Output Current (A)
Load Regulation
T
A
=25°C
V
IN
=5.0V;V
OUT
=3.3V
V
IN
=5.0V;V
OUT
=1.5V
V
IN
=3.3V;V
OUT
=1.5V
6
SC284
Line Regulation Line Regulation vs. Temperature
RDS(ON) Variation vs. Input Voltage RDS(ON) Variation vs. Temperature
Switching Frequency Variation vs. Input Voltage Switching Frequency Variation vs. Temperature
RDSON (P & N) Variation over Line
-10%
-5%
0%
5%
10%
15%
20%
25%
30%
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Variation
I
LX
= ±100mA
T
A
= 25°C
N-Channel
P-Channel
RDSON (P & N) Variation Over Temperature
-20%
-15%
-10%
-5%
0%
5%
10%
15%
20%
-40 -15 10 35 60 85
Ambient Temperature (°C)
Variation
V
IN
= 5.0V
I
LX
= ±100mA
N-Channel
P-Channel
Switching Frequency Variation over Line
-5%
-4%
-3%
-2%
-1%
0%
1%
2%
3%
4%
5%
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Variation
I
OUT
= 0A
T
A
= 25°C
V
OUT
= 3.3V
V
OUT
= 1.5V
Line Regulation ove Line
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Regulation
I
OUT
= 0A
T
A
= 25°C
V
OUT
= 3.3V
V
OUT
= 1.5V
Line Regulation over Temperature
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
-40 -15 10 35 60 85
Ambient Temperature (°C)
Regulation
V
OUT
= 1.5V
I
OUT
= 0A
Switching Frequency Variation
-1.0%
-0.8%
-0.6%
-0.4%
-0.2%
0.0%
0.2%
0.4%
0.6%
0.8%
1.0%
-40 -15 10 35 60 85
Ambient Temperature (°C)
Variation
V
IN
= 5.0V
I
OUT
= 0A
Typical Characteristics (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, Unless otherwise noted, L= 2.2uH (TOKO: 1127AS-2R2M).
7
SC284
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=3.3V)
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=3.3V)
Typical Waveforms
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
Transient Response (VOUT=1.5V; 0A to 1A to 0A) Transient Response (VOUT=3.3V; 0A to 1A to 0A)
8
SC284
V
OUT
0.5V/div
50µs/div
Start Up (V
OUT
=1.5V)
V
IN
=5.0V
R
OUT
=1k
V
CTLx
2V/div
V
IN
2V/div
Typical Waveforms (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
V
OUT
0.5V/div
200µs/div
Start Up (V
OUT
=1.5V)
V
IN
=5.0V
R
OUT
=0.83 (1.8A)
V
CTLx
2V/div
V
IN
2V/div
V
OUT
0.5V/div
200µs/div
Start Up (V
OUT
=1.5V), EN=VIN
V
IN
2V/div
V
IN
=5.0V
R
OUT
=1k
V
OUT
0.5V/div
200µs/div
Start Up (V
OUT
=1.5V), EN=VIN
V
IN
2V/div
V
IN
=5.0V
R
OUT
=0.83 (1.8A)
V
OUT
1V/div
100µs/div
Start Up (V
OUT
=3.3V)
V
IN
=5.0V
R
OUT
=1k
V
CTLx
2V/div
V
IN
2V/div
V
OUT
1V/div
200µs/div
Start Up (V
OUT
=3.3V)
V
IN
=5.0V
R
OUT
=1.83 (1.8A)
V
CTLx
2V/div
V
IN
2V/div
Start Up (Enable)(VOUT=1.5V)
Start Up (Power up VIN=VCTLx) (VOUT=1.5V)
Start Up (Enable)(VOUT=1.5V)
Start Up (Power up VIN=VCTLx) (VOUT=1.5V)
Start Up (Enable)(VOUT=3.3V) Start Up (Enable)(VOUT=3.3V)
9
SC284
Typical Waveforms (continued)
Circuit Conditions: CIN= 10uF/6.3V; COUT= 22uF/6.3V, L= 2.2uH (TOKO: 1127AS-2R2M).
Shutdown (Disable)(VOUT=1.5V) Shutdown (Disable)(VOUT=3.3V)
200µs/div
Shutdown-Disable (1.5V)
V
OUT
1V/div
V
CTLx
2V/div
V
IN
2V/div
V
IN
=5.0V
R
OUT
=1.5
200µs/div
Shutdown-Disable (3.3V)
V
OUT
1.5V/div
V
CTLx
2V/div
V
IN
2V/div
V
IN
=5.0V
R
OUT
=3.3
V
OUT
1.5V/div
200µs/div
Start Up (V
OUT
=3.3V), EN=VIN
V
IN
2V/div
V
IN
=5.0V
R
OUT
=1k
V
OUT
1.5V/div
200µs/div
Start Up (V
OUT
=3.3V), EN=VIN
V
IN
2V/div
V
IN
=5.0V
R
OUT
=1.83 (1.8A)
Start Up (Power up VIN=VCTLx) (VOUT=3.3V) Start Up (Power up VIN=VCTLx) (VOUT=3.3V)
10
SC284
Pin Descriptions
Pin # Pin Name Pin Function
1 PVINA Channel A — Input supply voltage for the converter power stage and internal circuitry.
2 AGNDA Ground connection for internal circuitry — connect directly to PGNDA.
3 AVINA Power supply for internal circuitry — Must be connected to PVINA using an R-C lter of 1Ω and 10nF.
4 CTL0A
Channel A — Control bit 0, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
5 CTL1A
Channel A — Control bit 1, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
6 CTL2A
Channel A — Control bit 2, see Table 1 for decoding. This pin has a 1 MΩ internal pulldown resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
7 CTL3A
Channel A — Control bit 3, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
8 VOUTB Output voltage sense pin of Channel B
9 PGNDB Channel B — Ground connection for converter power stage and internal circuitry.
10 LXB Switching node of Channel B — connect an inductor between this pin and the output capacitor.
11 PVINB Channel B — Input supply voltage for the converter power stage and internal circuitry.
12 AGNDB Ground connection for internal circuitry — connect directly to PGNDB.
13 AVINB Power supply for internal circuitry — Must be connected to PVINB using an R-C lter of 1Ω and 10nF.
14 CTL0B
Channel B — Control bit 0, see Table 1 for decoding. This pin has a 1 MΩ internal pulld-own resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
15 CTL1B
Channel B — Control bit 1 - see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This
resistor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is
in under-voltage lockout.
16 CTL2B
Channel B — Control bit 2, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
17 CTL3B
Channel B — Control bit 3, see Table 1 for decoding. This pin has a 1 MΩ internal pull-down resistor. This resis-
tor is switched in circuit whenever the pin voltage is below the input high threshold, or when the part is in
under-voltage lockout.
18 VOUTA Output voltage sense pin of Channel A
19 PGNDA Channel A — Ground connection for converter power stage and internal circuitry.
20 LXA Switching node of Channel A — connect an inductor between this pin and the output capacitor.
11
SC284
Block Diagram
C o ntro l
Logic
P lim it A m p
C u rre nt A m p
V olta g e
S e le c t
O sc illator an d
Slope Generator
C T L1 A 5
C T L2 A 6
C T L3 A 7
P W M
C o m p
E rro r A m p
50 0 m V
R e f
A V IN A 3
V O U T A 18
C T L0 A 4
A G N D A 2
P G N D A
19
L X A
20
P V IN A
1
C o ntro l
Logic
P lim it A m p
C u rre nt A m p
V olta g e
S e le c t
O sc illator an d
Slope Generator
C T L1 B 15
C T L2 B 1 6
C T L3 B 17
P W M
C o m p
E rro r A m p
50 0 m V
R e f
A V IN B 1 3
V O U T B 8
C T L0 B 14
A G N D B 12
P G N D B
9
L X B
10
P V IN B
11
12
SC284
Applications Information
Detailed Description
The SC284 is a two channel synchronous step-down
converter. Both channels on this device are designed to
operate in xed-frequency PWM mode at 2.5MHz and
provide the same current capacity of up to 1.8A. The
switching frequency is chosen to minimize the size of the
external inductor and capacitors while maintaining high
eciency. Both channels of SC284 are independent.
Operation
During normal operation, the PMOS MOSFET is activated
on each rising edge of the internal oscillator. The voltage
feedback loop uses an internal feedback resistor divider.
The period is set by the internal oscillator. The device
has an internal synchronous NMOS rectier and does
not require a Schottky diode on the LX pin. The device
operates as a buck converter in PWM mode with a xed
frequency of 2.5MHz.
Programmable Output Voltage
Both channels on SC284 have fteen pre-determined
output voltage values which can be individually selected
by programming the CTL input pins (see Table 1 — Output
Voltage Settings). Each CTL pin has an active 1 MΩ internal
pull-down resistor. The 1MΩ resistor is switched in circuit
whenever the CTL input voltage is below the input
threshold, or when the part is in under-voltage lockout. It is
recommended to tie all high CTL pins together and use an
external pull-up resistor to VIN if there is no enable signal, or
if the enable input is an open drain/collector signal. The CTL
pins may be driven by a microprocessor to allow dynamic
voltage adjustment for systems that reduce the supply
voltage when entering sleep states. Avoid all zeros being
present on the CTL pins when changing programmable
output voltages as this would disable the device.
SC284 is also capable of regulating a dierent (higher)
output voltage, which is not shown in the Table 1, via an
external resistor divider. There will be a typical 2µA cur-
rent owing into the VOUT pin. The typical schematic for
an adjustable output voltage option from the standard
1.0V with CTLx=[0010], is shown in Figure 1. RFB1A/B
and RFB2A/B are used to adjust the desired output volt-
age. If the RFB2A/B current is such that the 2µA VOUT
pin current can be ignored, then RFB1A/B can be found
by the next equation. RFB2A/B needs to be low enough
in value for the current through the resistor chain to be
at least 20µA in order to ignore the VOUT pin current.
where VOSTD is the pre-determined output voltage via the
CTL pins.
CFF is needed to maintain good transient response
performance. The correct value of CFF can be found using
the following Equation.
)
5.0V
V
(
VV]k[R
5.0V
5.2]nF[C
OSTD
OSTD
OSTDOUT1FB
2
OUT
FF
u
u:
u
To simplify the design, it is recommended to program the
desired output voltage from a standard 1.0V as shown in
Figure 1 with the correct CFF calculated from Equation 2.
For programming the output voltage from other standard
voltages, RFB1, RFB2 and CFF need to be adjusted to meet
Equations 1 and 2.
Figure 1 — Output Voltage Programming
13
SC284
Applications Information (continued)
Maximum Power Dissipation
Each channel of SC284 has its own ΘJA of 40°C/W when
only one channel is in operation. Since both channels are
within same package, there is about 50% heat which will be
transferred to the adjacent channel. The equivalent total
thermal impedance will be higher when the neighboring
channel is also in operation. To guarantee an operating
junction temperature of less than 125°C, Figure 2 shows
the maximum allowable power loss of each channel. The
curve is based upon the junction temperature of either
channel reaching a maximum of 125°C. Each channel of
SC284 can support up to 1.8A load current. Figures 3a
and 3b show the maximum allowable load current based
upon the limit of maximum loss for VIN=3.3V and VIN=5.0V,
respectively. The curves are drawn for high duty-cycle
operation. If the operating duty-cycle is lower, the loss is
lower allowing higher load current.
Figure 2 — Maximum allowable loss for each channel
for a maximum junction temperature of 125°C
Protection Features
The SC284 provides the following protection features:
Current Limit
Over-Voltage Protection
Soft-Start Operation
Thermal Shutdown
•
•
•
•
(a) VIN= 3.3V, VOUT=2.5V
(b) VIN= 5.0V, VOUT=3.3V
Figure 3 — Maximum allowable Load Current for each
channel for a maximum junction temperature of 125°C
Current Limit and Protection
The internal PMOS power device in the switching stage
is protected by a current limit feature. If the inductor
current is above the PMOS current limit for 16 consecutive
cycles, the part enters foldback current limit mode and
the output current is limited to the current limit holding
current (ICL_HOLD) of a few hundred milliampere. Under
this condition, the output voltage will be the product
of ICL_HOLD and the load resistance. The current limit
holding current will decrease when the output voltage
increases. The load presented must fall below the current
limit holding current for the part to exit foldback current
14
SC284
Applications Information (continued)
limit mode. Figure 4 shows how the typical current limit
holding current varies with output voltage. The SC284 is
capable of sustaining an indenite short circuit without
damage and will resume normal operation when the fault
is removed. The foldback current limit mode is disabled
during soft-start. Current limit functionality is shown in
Figure 5 at the end of this section.
Current Limit Holding Current over Vout
0
50
100
150
200
250
300
1.0 1.5 2.0 2.5 3.0 3.5
Output Voltage (V)
Current Limit Holding Current (mA)
T
A
= 25°C
V
IN
= 5.0V
V
IN
= 3.6V
V
IN
= 3.3V
Figure 4 — Typical Current Limit Holding Current
vs. Output Voltage
Over-Voltage Protection
In the event of a 15% over-voltage on the output, the
PWM drive is disabled leaving the LX pin oating.
Soft-Start
The soft-start mode is activated after VIN reaches its UVLO
and one or more CTL pins are set high to enable the part.
A thermal shutdown event will also activate the soft start
sequence. Soft-start mode controls the maximum current
during startup thus limiting inrush current. The PMOS
current limit is stepped through four soft start levels of
approximately 20%, 25%, 40%, & 100%. Each step is main-
tained for 200μs following an internal reference start up
duration of 50μs giving a total nominal startup period of
850μs. During startup, the chip operates by controlling
the inductor current swings between 0A and current limit.
If at any time VOUT reaches 86% of the target or at the end
of the soft-start period, the SC284 will switch to PWM
mode operation. Figure 6 at the end of this section shows
the typical diagram of soft start operation.
The SC284 is capable of starting up into a pre-biased
output. When the output is precharged by another supply
rail, the SC284 will not discharge the output during the
soft start interval.
Shut Down
When all CTL pins of each channel are low, the channel will
run in shutdown mode, drawing less than 1μA from the
input power supply. The internal switches and bandgap
voltage will be immediately turned o.
Thermal Shutdown
The device has a thermal shutdown feature to protect
the SC284 if the junction temperature exceeds 160°C.
During thermal shutdown, the on-chip power devices are
disabled, tri-stating the LX output. When the temperature
drops by 10°C, it will initiate a soft start cycle to resume
normal operation.
Inductor Selection
The SC284 converter has internal loop compensation.
The compensation is designed to work with an output
lter corner frequency of less than 40kHz for a VIN of 5V
and 50KHz for a VIN of 3.3V over any operating condition.
The corner frequency of the output lter is shown in the
following equation.
Values outside this range may lead to instability,
malfunction, or out-of-specication performance.
In general, the inductance is chosen by making the
inductor ripple current to be less than 30% of maximum
load current. When choosing an inductor, it is important
to consider the change in inductance with DC bias
current. The inductor saturation current is specied as
the current at which the inductance drops a specic
percentage from the nominal value. This is approximately
30%. Except for short-circuit or other fault conditions,
the peak current must always be less than the saturation
current specied by the manufacturer. The peak current is
the maximum load current plus one half of the inductor
ripple current at the maximum input voltage. Load and/or
line transients can cause the peak current to exceed this
level for short durations. Maintaining the peak current
15
SC284
Applications Information (continued)
below the inductor saturation specication keeps the
inductor ripple current and the output voltage ripple at
acceptable levels. Manufacturers often provide graphs of
actual inductance and saturation characteristics versus
applied inductor current. The saturation characteristics of
the inductor can vary signicantly with core temperature.
Core and ambient temperatures should be considered
when examining the core saturation characteristics.
When the inductance has been determined, the DC
resistance (DCR) must be examined. The eciency that
can be achieved is dependent on the DCR of the inductor.
The lower values give higher eciency. The RMS DC
current rating of the inductor is associated with losses in
the copper windings and the resulting temperature rise of
the inductor. This is usually specied as the current which
produces a 40˚C temperature rise. Most copper windings
are rated to accommodate this temperature rise above
maximum ambient.
Magnetic elds associated with the output inductor can
interfere with nearby circuitry. This can be minimized by
the use of low noise shielded inductors which use the
minimum gap possible to limit the distance that magnetic
elds can radiate from the inductor. However shielded
inductors typically have a higher DCR and are thus less
ecient than a similarly sized non-shielded inductor.
Final inductor selection depends on various design
considerations such as eciency, EMI, size, and cost.
Table 2 lists the manufacturers of recommended inductor
options. The saturation characteristics and DC current
ratings are also shown.
Manufacturer
Part Number
L
(μH)
DCR
Max
(Ω)
Rated
Current
(A)
L at
Rated
Current
(μH)
Dimen-
sions
LxWxH
(mm)
TOKO
1071AS-2R2M 2.20±20% 0.060 1.80 1.54 2.8x3.0x1.5
TOKO
1071AS-1R0N 1.00±30% 0.040 2.70 0.70 2.8x3.0x1.5
TOKO
1127AS-2R2M 2.20±20% 0.048 2.50 1.54 3.5x3.7x1.8
Panasonic
ELLVGG1R0N 1.00±23% 0.062 2.20 0.70 3.2x3.2x1.5
Table 2 – Recommended Inductors
COUT Selection
The internal voltage loop compensation in the SC284
limits the minimum output capacitor value to 22µF if
using a 2.2µH inductor or 44µF if using a 1µH inductor.
This is due to its inuence on the the loop crossover
frequency, phase margin, and gain margin. Increasing
the output capacitor above this minimum value will
reduce the crossover frequency and provide greater
phase margin. The total output capacitance should not
exceed 50µF to avoid any start-up problems. For most
typical applications it is recommended to use an output
capacitance of 22µF to 44µF. When choosing the output
capacitor’s capacitance, verify the voltage derating eect
from the capacitor vendor’s data sheet.
Capacitors with X7R or X5R ceramic dielectric are
recommended for their low ESR and superior temperature
and voltage characteristics. Y5V capacitors should not
be used as their temperature coecients make them
unsuitable for this application.
The output voltage droop due to a load transient is
determined by the capacitance of the ceramic output
capacitor. The ceramic capacitor supplies the load current
initially until the loop responds. Within a few switching
cycles the loop will respond and the inductor current will
increase to match the required load. The output voltage
droop during the period prior to the loop responding
can be related to the choice of output capacitor by the
relationship from the following equation.
The output capacitor RMS ripple current may be calculated
from the following equation.
16
SC284
Applications Information (continued)
Table 3 lists the manufacturers of recommended output
capacitor options.
Manufacturer
Part Nunber
Value
(μF) Type
Rated
Voltage
(VDC)
Value
at
3.3V
(μF)
Dimensions
LxWxH
(mm)
Murata
GRM21BR60J106K 10±10% X5R 6.3 4.74 2.0x1.25x1.25
(EIA:0805)
Murata
GRM219R60J106K 10±10% X5R 6.3 4.05 2.0x1.25x0.85
(EIA:0805)
Murata
GRM21BR60J226M 22±20% X5R 6.3 6.57 2.0x1.25x1.25
(EIA:0805)
Murata
GRM31CR60J476M 47±20% X5R 6.3 20.3 3.2x1.6x1.6
(EIA:1206)
Table 3 – Recommended Capacitors
CIN Selection
The SC284 source input current is a DC supply current
with a triangular ripple imposed on it. To prevent large
input voltage ripple, a low ESR ceramic capacitor is
required. A minimum value of 10μF should be used. It is
important to consider the DC voltage coecient charac-
teristics when determining the actual required value. It
should be noted a 10µF, 6.3V, X5R ceramic capacitor with
5V DC applied may exhibit a capacitance as low as 4.5µF.
To estimate the required input capacitor, determine the
acceptable input ripple voltage and calculate the
minimum value required for CIN as shown by the following
equation.
The input capacitor RMS ripple current varies with the
input and output voltage. The maximum input capacitor
RMS current is found from the next equation .
The input voltage ripple and RMS current ripple are at
a maximum when the input voltage is twice the output
voltage or 50% duty cycle.
The input capacitor provides a low impedance loop for
the edges of pulsed current drawn by the PMOS switch.
Low ESR/ESL X5R ceramic capacitors are recommended
for this function. To minimise stray inductance ,the
capacitor should be placed as closely as possible to the
VIN and GND pins of the SC284.
17
SC284
Applications Information (continued)
Figure 6 — Soft Start Operation
Figure 5 — Current Limit Protection
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18
SC284
PCB Layout Considerations
The layout diagram in Figure 7 shows a recommended
top-layer PCB for the SC284 and supporting components.
Figure 8 shows the bottom layer for this PCB. Fundamental
layout rules must be followed since the layout is critical
for achieving the performance specied in the Electrical
Characteristics table. Poor layout can degrade the
performance of the DC-DC converter and can contribute
to EMI problems, ground bounce, and resistive voltage
losses. Poor regulation and instability can result.
The following guidelines are recommended when
developing a PCB layout:
The input capacitor, CIN, should be placed as close to the
VIN and GND pins as possible. This capacitor provides
a low impedance loop for the pulsed currents present
at the buck converter’s input. Use short wide traces
to connect as closely to the IC as possible. This will
minimize EMI and input voltage ripple by localizing
the high frequency current pulses.
Keep the LX pin traces as short as possible to minimize
pickup of high frequency switching edges to other
parts of the circuit. COUT and L should be connected as
close as possible between the LX and GND pins, with
a direct return to the GND pin from COUT.
Route the output voltage feedback/sense path away
from the inductor and LX node to minimize noise and
magnetic interference.
Use a ground plane referenced to the SC284 GND pin.
Use several vias to connect to the component side
ground to further reduce noise and interference on
sensitive circuit nodes.
If possible, minimize the resistance from the output
and GND pin to the load. This will reduce the voltage
drop on the ground plane and improve the load
regulation. It will also improve the overall eciency
by reducing the copper losses on the output and
ground planes.
1.
2.
3.
4.
5.
Figure 7 — Recommended PCB Layout (Top Layer)
Figure 8 — Bottom Layer Detail
Applications Information (continued)
19
SC284
Outline Drawing – 3x3 MLPQ-UT20
Land Pattern – 3x3 MLPQ-UT20
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
Contact Information
20
SC284
© Semtech 2015
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