Agilent HSDL-3000 # 007/017
IrDA® Data Compliant 115.2 kbps
Infrared Transceiver
Data Sheet
Description
The HSDL-3000 is a small form
factor infrared (IR) transceiver
module that provides interface
between logic and IR signals for
through-air, serial, half-duplex IR
data link. The module is compliant
to IrDA Physical Layer Specifica-
tions 1.3 and is IEC 825-Class 1
eye safe.
The HSDL-3000 can be shut down
completely to achieve very low
power consumption. In the shut-
down mode, the PIN diode will be
inactive and thus producing very
little photocurrent even under very
bright ambient light. Such features
are ideal for battery-operated
handheld products.
The HSDL-3000 has two front
packaging type options (HSDL-
3000#007/017). Both options have
an integrated shield that helps to
ensure low EMI emission and high
immunity to EMI field, thus
enhancing reliable performance.
Features
• Fully compliant to IrDA 1.3
specifications:
– 2.4 kbps to 115.2 kbps
– Excellent nose-to-nose operation
– Typical link distance > 1.5 m
• Guaranteed temperature
performance, –20 to 70 °C
– Critical parameters are
guaranteed over temperature and
supply voltages
• Low power consumption
– Low shutdown current
(10 nA typical)
– Complete shutdown for
TXD, RXD, and PIN diode
• Small module size
– 2.70 x 9.10 x 3.65 mm (HxWxD)
• Withstands >100 mVp-p power supply
ripple typically
•V
CC supply 2.7 to 5.5 volts
• LED stuck-high protection
• IEC 825-Class 1 eye safe
• Designed to accommodate light loss
with cosmetic windows
Applications
• Data communication
– PDAs
– Notebooks
– Printers
• Mobile telecom
– Cellular phones
– Pagers
– Smart phones
• Digital imaging
– Digital cameras
– Photo-imaging printers
• Electronic wallet
• Medical and industry data
collection
Application Support Information
The Application Engineering
group is available to assist you
with the technical understanding
associated with HSDL-3000
infrared transceiver module. You
can contact them through your
local sales representatives for
additional details.
HSDL-3000 Ordering Information
Part Number Packaging Type Package Quantity
HSDL-3000#007 Tape/Reel Front View 2500
HSDL-3000#017 Strip Front View 10
2
Functional Block Diagram
I/O Pins Configuration Table
Pin Symbol Description Notes
1 LED A LED Anode Tied through external resistor, R1, to regulated V CC from 2.7 to 5.5 volts.
2 TXD Transmitter Data Input. Logic High turns on the LED. If held high longer than ~ 50 µs, the LED is turned
Active High. off. TXD must be either driven high or low. Do NOT float the pin.
3 RXD Receiver Data Output. Output is a low pulse response when a light pulse is seen.
Active Low.
4 SD Shutdown. Complete shutdown TXD, RXD, and PIN diode.
Active High.
5V
CC Supply Voltage Regulated, 2.7 to 5.5 volts.
6 GND Ground Connect to system ground.
– SHIELD EMI Shield Connect to system ground via a low inductance trace. For best performance,
do not connect to GND directly at the part.
Pinout
Recommended Application Circuit Components
Component Recommended Value
R1 2.2 Ω ± 5%, 0.25 Watt, for 2.7 ≤ VCC ≤ 3.3 V operation
2.7 Ω ± 5%, 0.25 Watt, for 3.0 ≤ VCC ≤ 3.6 V operation
6.8 Ω ± 5%, 0.25 Watt, for 4.5 ≤ VCC ≤ 5.5 V operation
CX1[1] 0.47 µF ± 20%, X7R Ceramic
CX2[2] 6.8 µF ± 20%, Tantalum
Caution: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage
from electrostatic discharge (ESD). It is advised that normal static precautions be taken during handling and
assembly of this component to prevent damage and/or degradation, which may be induced by ESD.
Notes:
1. CX1 must be placed within 0.7 cm of HSDL-3000 to obtain optimum noise immunity.
2. In environments with noisy power supplies, supply rejection can be enhanced by including
CX2 as shown in ”HSDL-3000 Functional Block Diagram“on page 2.
GND (6)
V
CC
(5)
LEDA (1)
R1
V
CC
TRANSMITTER
HSDL-3xxx
CX1
TXD (2)
SHIELD
SD (4)
RXD (3)
CX2
RECEIVER
654321
REAR VIEW
Marking Information
The HSDL-3000#007/017 is
marked “YYWW” on the shield
where ‘YY’ indicates the unit’s
manufacturing year, and ‘WW’
refers to the work week in which
the unit is tested.
3
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤ 50°C/W.
Parameter Symbol Min. Max. Units Conditions
Storage Temperature TS–40 100 °C
Operating Temperature TA–20 70 °C
LED Supply Voltage VLED 07 V
Supply Voltage VCC 07 V
Output Voltage: RXD VO–0.5 7 V
LED Current Pulse Amplitude ILED 500 mA ≤ 90 µs Pulse Width
≤ 20% Duty Cycle
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Conditions
Operating Temperature TA–20 70 °C
Supply Voltage VCC 2.7 5.5 V
Logic Input Logic High VIH 2/3 VCC VCC V
Logic Low VIL 0 1/3 VCC V
Receiver Input Logic High EIH0.0036 500 mW/cm2For in-band signals ≤ 115.2 kbps[1]
Irradiance
Logic Low EIL0.3 µW/cm2For in-band signals[1]
TXD Pulse Width (SIR) tTPW (SIR) 1.5 1.6 µst
PW (TXD) = 1.6 µs at 115.2 kbps
Receiver Data Rate 2.4 115.2 kbps
Ambient Light See Test Methods on page 16 for details.
Voltage for
TXD
4
Electrical & Optical Specifications
Specifications (Min. and Max. values) hold over the recommended operating conditions unless otherwise noted.
Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C with VCC
set to 3.0 V unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Receiver
Viewing Angle 2φ1/2 30 °
Peak Sensitivity λp875 nm
Wavelength
RXD Output Voltage
Logic High VOH VCC –0.2 VCC VI
OH = –200 µA, EI ≤ 0.3 µW/cm2
Logic Low VOL 0 0.4 V
RXD Pulse Width (SIR)[2] tRPW (SIR) 1 7.5 µsθ1/2 ≤ 15°, CL = 9 pF
RXD Rise and Fall Times tr, tf25 100 ns CL = 9 pF
Receiver Latency Time[3] tL25 50 µs
Receiver Wake Up Time[4] tRW 18 100 µs EI = 10 mW/cm2
Transmitter
Radiant Intensity IEH44 75 mW/sr ILEDA = 350 mA, θ1/2 ≤ 15°,
TXD ≥ VIH, TA = 25°C
Viewing Angle 2θ1/2 30 60 °
Peak Wavelength λp875 nm
TXD Logic Levels
High VIH 2/3 VCC VCC V
Low VIL 0 1/3 VCC V
TXD Input Current
High IH0.02 1 µAV
I
≥ VIH
Low IL–1 –0.02 1 µA0 ≤ VI ≤ VIL
LED Current
Shutdown IVLED 20 1000 NA VI (SD) ≥ VIH, TA = 25°C
Wakeup Time[5] tTW 30 100 ns
Maximum Optical tPW(Max) 25 50 µs
Pulse Width[6]
TXD Rise and tr, tf600 ns
Fall Time (Optical)
LED Anode on State VON (LEDA) 2.2 V ILEDA = 350 mA, VI (TXD) ≤ VIL
Voltage
5
Transceiver
Input Current
High IH0.01 1 µAV
I
≥ VIH
Low IL–1 -0.02 1 µA0 ≤ VI ≤ VIL
Supply Current
Shutdown ICC1 0.01 1 µAV
SD ≥ VCC – 0.5, TA = 25°C
Idle ICC2 290 450 µAV
I
(TXD) ≤ VIL, EI = 0
Active ICC3 28 mAV
I
(TXD) ≥ VIL
Notes:
1. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
2. For in-band signals 2.4 kbps to 115.2 kbps where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2.
3. Latency is defined as the time from the last TXD light output pulse until the receiver has recovered full sensitivity.
4. Receiver wake up time is measured from VCC power on to valid RXD output.
5. Transmitter wake up time is measured from VCC power on to valid light output in response to a TXD pulse.
6. Maximum optical pulse width is defined as the maximum time that the LED will remain on. This is to prevent the long turn on time for the LED.
Electrical & Optical Specifications (Continued)
Parameter Symbol Min. Typ. Max. Units Conditions
ILED (mA)
500
V
CC
(V)
3.9 4.8
290
320
470
2.4 5.7
410
2.7 4.2
380
3.3 3.6 4.5 5.4
350
440
3.0 5.1
2.2 Ω
6.8 Ω
2.7 Ω
ILED (mA)
500
V
ON
(LEDA)
1.95 2.05
290
320
470
1.80 2.20
410
1.85
380
1.90 2.00 2.15
350
440
2.10
IE
H
(mW/sr)
110
ILED (mA)
300 380
40
50
100
1.80 500
80
220
70
260 340 460
60
90
420
ILED vs. VCC.ILED vs. VON (LEDA). IEH vs. ILED.
6
HSDL-3000#007 and HSDL-3000#017 Package Outline
with Dimension and Recommended PC Board Pad Layout
RECOMMENDED LAND PATTERN
0.55 DIMENSIONS
HEIGHT:
WIDTH:
DEPTH:
8.60
1.20
0.60 (2 PLACES)
PITCH 1.55 (5X)
3.65
2.95
0.25
654321
1.55 0.85
3.05
1.10
9.10 ± 0.15
5.801.25 1.55
1.35
2.70 ± 0.15
UNLESS OTHERWISE STATED,
TOLERANCES ± 0.2 mm
2.70 ± 0.15 mm
9.10 ± 0.15 mm
3.65 ± 0.20 mm
123456
2.30
0.50
2.602.65
0.70
0.425
0.65
(4 PLACES)
3.13
7
16.40 + 2.00
0
BC
2.00 ± 0.50
3.46
8.00
± 0.10
4.00 ± 0.10
16.00 ± 0.30
1.75 ± 0.10
1.55 ± 0.05
0.40 ± 0.10
3.00 ± 0.10
POLARITY
EMPTY PARTS
MOUNTED LEADER
EMPTY
(40 mm MIN.)
(40 mm MIN.)
(40 mm MIN.)
1.13 ± 0.10
PROGRESSIVE DIRECTION
"B" "C" QUANTITY
PIN 6: GND
PIN 1: VLED
+0.10
0
3.30+0.10
0
7.50 ± 0.10
R 1.00
2.00 ± 0.50
DIA. 13.00 ± 0.50
21.00
± 0.80
LABEL
DETAIL A
DETAIL A
330 80 2500
9.50 ± 0.10
5.00° (MAX.)
123456
3.40 ± 0.20
4.20 ± 0.20
8.00° (MAX.)
MATERIAL OF CARRIER TAPE: CONDUCTIVE POLYSTYRENE
MATERIAL OF COVER TAPE: PVC
METHOD OF COVER: HEAT ACTIVATED ADHESIVE
UNIT: mm
+
HSDL-3000#007 and HSDL-3000#017 Tape and Reel Dimensions
8
Moisture Proof Packaging
The HSDL-3000 is shipped in
moisture proof packaging. Once
opened, moisture absorption
begins.
Recommended Storage Conditions
Storage Temperature 10°C to 30°C
Relative Humidity Below 60% RH
Time from Unsealing to Soldering
After removal from the bag, the
parts should be soldered within
two days if stored at the recom-
mended storage conditions. If the
parts have been removed from
the bag for more than two days,
the parts must be stored in a dry
box.
Baking
If the parts are not stored in a dry
environment, they must be baked
before reflow process to prevent
damage to parts. Baking should
be done only once.
Packaging Baking Temperature Baking Time
In Reel 60°C≥ 48 hours
In Bulk 100°C≥ 4 hours
125°C≥ 2 hours
150°C≥ 1 hour
9
Reflow Profile
The reflow profile is a straight
line representation of a nominal
temperature profile for a convec-
tive reflow solder process. The
temperature profile is divided into
four process zones, each with
different ∆T/∆time temperature
change rates. The ∆T/∆time rates
are detailed in the above table.
The temperatures are measured at
the component to printed-circuit
board connections.
In process zone P1, the PC
board and HSDL-3000
castellation I/O pins are heated to
a temperature of 125°C to
activate the flux in the solder
paste. The temperature ramp up
rate, R1, is limited to 4°C per
second to allow for even heating
of both the PC board and
HSDL-3000 castellation I/O pins.
Process Zone Symbol ∆T Maximum ∆T/∆time
Heat Up P1, R1 25°C to 125°C4°C/s
Solder Paste Dry P2, R2 125°C to 170°C 0.5°C/s
Solder Reflow P3, R3 170°C to 230°C (245°C max.) 4°C/s
P3, R4 230°C to 170°C–4°C/s
Cool Down P4, R5 170°C to 25°C–3°C/s
0
t-TIME (SECONDS)
T – TEMPERATURE – (°C)
200
170
125
100
50
50 150100 200 250 300
150
183
230
P1
HEAT
UP
P2
SOLDER PASTE DRY P3
SOLDER
REFLOW
P4
COOL
DOWN
25
R1
R2
R3 R4
R5
90 sec.
MAX.
ABOVE
183°C
MAX. 245°C
Process zone P2 should be of
sufficient time duration (> 60
seconds) to dry the solder paste.
The temperature is raised to a
level just below the liquidus point
of the solder, usually 170°C
(338°F).
Process zone P3 is the solder
reflow zone. In zone P3, the
temperature is quickly raised
above the liquidus point of solder
to 230°C (446°F) for optimum
results. The dwell time above the
liquidus point of solder should be
between 15 and 90 seconds. It
usually takes about 15 seconds to
assure proper coalescing of the
solder balls into liquid solder and
the formation of good solder
connections. Beyond a dwell time
of 90 seconds, the intermetallic
growth within the solder connec-
tions becomes excessive, result-
ing in the formation of weak and
unreliable connections. The
temperature is then rapidly
reduced to a point below the soli-
dus temperature of the solder,
usually 170°C (338°F), to allow
the solder within the connections
to freeze solid.
Process zone P4 is the cool
down after solder freeze. The
cool down rate, R5, from the
liquidus point of the solder to
25°C (77°F) should not exceed
–3°C per second maximum. This
limitation is necessary to allow
the PC board and HSDL-3000
castellation I/O pins to change
dimensions evenly, putting mini-
mal stresses on the HSDL-3000
transceiver.
10
Appendix A : HSDL-3000#007/#017 SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
Figure 1. Stencil and PCBA.
METAL STENCIL
FOR SOLDER PASTE
PRINTING
LAND
PATTERN
PCBA
STENCIL
APERTURE
SOLDER
MASK
1.1 Recommended Land Pattern for HSDL-3000
SHIELD SOLDER PAD
a
b
f
6x PAD
Y
d
e
g
Tx LENS
Rx LENS
FIDUCIAL
X
cFIDUCIAL
theta
DIM. mm INCHES
a
b
c (PITCH)
d
e
f
g
h
2.30
0.85
1.55
1.10
3.05
2.20
2.42
0.20
0.091
0.034
0.061
0.043
0.120
0.087
0.095
0.008
h
Figure 2. Top view of land pattern.
11
1.2 Adjacent Land Keep-out and Solder Mask Areas
Dim. mm Inches
h min. 0.40 min. 0.016
j 10.1 0.40
k 3.85 0.15
l 3.2 0.126
Figure 3. HSDL-3000#007/#017 PCBA – Adjacent land keep-out and solder mask.
• Adjacent land keep-out is the
maximum space occupied by
the unit relative to the land
pattern. There should be no
other SMD components within
this area.
• “h” is the minimum solder
resist strip width required to
avoid solder bridging adjacent
pads.
• It is recommended that 2
fiducial cross be placed at mid-
length of the pads for unit
alignment.
Note: Wet/Liquid Photo-
Imageable solder resist/mask is
recommended.
h
l
Tx LENSRx LENS
j
SOLDER
MASK
LAND
k
Y
X
2.0 Recommended Solder Paste/
Cream Volume for Castellation
Joints
The recommended printed solder
paste volume required per
castellation pad is 0.30 cubic mm
(based on either no-clean or
aqueous solder cream types with
typically 60 to 65% solid content
by volume).
12
2.1 Recommended Metal Solder
Stencil Aperture
It is recommended that only
0.152 mm (0.006 inches) or
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure ad-
equate printed solder paste vol-
ume and no shorting. The
following combination of metal
stencil aperture and metal stencil
thickness should be used:
See Fig. 4.
t, Nominal Stencil Thickness l, Length of Aperture
mm inches mm inches
0.152 0.006 2.3 ± 0.05 0.091 ± 0.002
0.127 0.005 2.75 ± 0.05 0.108 ± 0.002
w, the width of aperture, is fixed at 0.85 mm (0.034 inches).
Aperture opening for shield pad is 3.05 mm x 1.1 mm as per land dimension.
Figure 4. Solder paste stencil aperture.
APERTURES AS PER
LAND DIMENSIONS
lw
t (STENCIL THICKNESS)
SOLDER PASTE
13
Appendix B: HSDL-3000#007/#017 –
Recommended Optical Port Design
To insure IrDA compliance, some
constraints on the height and
width of the window exist. The
minimum dimensions ensure that
the IrDA cone angles are met
without vignetting. The maxi-
mum dimensions minimize the
effects of stray light. The mini-
mum size corresponds to a cone
angle of 30 degrees, the maxi-
mum, to a cone angle of 60
degrees.
X is the width of the window, Y is
the height of the window, and Z is
the distance from the HSDL-3000
to the back of the window.
The distance from the center of
the LED lens to the center of the
photodiode lens is 5.80 mm. The
equations for the size of the
window are as follows:
X = 5.80 +2(Z + D) tan θ
Y = 2(Z + D) tan θ
Where θ is the required half angle
for viewing. For the IrDA mini-
mum, it is 15 degrees, for the
IrDA maximum it is 30 degrees.
(D is the depth of the LED image
inside the part, 3.2 mm from the
Tx lens vertex). These equations
result in the following tables and
graphs:
Z
X
Y
14
Minimum and Maximum Window Sizes
Dimensions are in mm.
Depth (Z) mm X min. Y min. X max. Y max.
0 7.34 1.71 9.33 3.70
1 7.88 2.25 10.48 4.85
2 8.42 2.79 11.63 6.00
3 8.95 3.32 12.79 7.16
4 9.49 3.86 13.94 8.31
5 10.02 4.39 15.10 9.47
6 10.56 4.93 16.25 10.62
7 11.10 5.47 17.41 11.78
8 11.63 6.00 18.56 12.93
9 12.17 6.54 19.72 14.09
10 12.70 7.07 20.87 15.24
11 13.24 7.61 22.03 16.40
12 13.77 8.14 23.18 17.55
13 14.31 8.68 24.34 18.71
14 14.85 9.22 25.49 19.86
15 15.38 9.75 26.65 21.01
16 15.92 10.29 27.80 22.17
17 16.46 10.83 28.95 23.32
18 16.99 11.36 30.11 24.48
19 17.53 11.90 31.26 25.63
20 18.06 12.43 32.42 26.79
Window width X vs. module depth Z.Window height Y vs. module depth Z.
WINDOW WIDTH X – mm
25
MODULE DEPTH Z – mm
10
48
0
5
010
15
26
20 X MAX.
X MIN.
WINDOW HEIGHT Y – mm
18
MODULE DEPTH Z – mm
6
48
0
2
14
010
10
26
12
8
4
ACCEPTABLE
RANGE
16 Y MAX.
Y MIN.
15
Flat Window
(first choice)
Curved Front, Flat Back
(do not use)
Curved Front and Back
(second choice)
Shape of the Window
From an optics standpoint, the
window should be flat. This en-
sures that the window will not
alter either the radiation pattern
of the LED, or the receive pattern
of the photodiode.
If the window must be curved for
mechanical design reasons, place
a curve on the back side of the
window that has the same radius
as the front side. While this will
not completely eliminate the lens
effect of the front curved surface,
it will reduce the effects. The
amount of change in the radiation
pattern is dependent upon the
material chosen for the window,
the radius of the front and back
curves, and the distance from the
back surface to the transceiver.
Once these items are known, a
lens design can be made which
will eliminate the effect of the
front surface curve.
The following drawings show the
effects of a curved window on the
radiation pattern. In all cases,
the center thickness of the win-
dow is 1.5 mm, the window is
made of polycarbonate plastic,
and the distance from the trans-
ceiver to the back surface of the
window is 3 mm.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 2001 Agilent Technologies, Inc.
June 28, 2001
5988-3265EN
Test Methods
Background Light and Electro-
magnetic Field
There are four ambient interfer-
ence conditions in which the
receiver is to operate correctly.
The conditions are to be applied
separately:
1. Electromagnetic field:
3 V/m maximum (please refer
to IEC 61000-4-3 severity level
3 for details).
2. Sunlight:
10 kilolux maximum at the
optical port. This is simulated
with an IR source having a
peak wavelength within the
range of 850 nm to 900 nm
and a spectral width of less
than 50 nm biased to provide
490 µW/cm2 (with no modula-
tion) at the optical port. The
light source faces the optical
port.
This simulates sunlight within
the IrDA spectral range. The
effect of longer wavelength
radation is covered by the in-
candescent condition.
3. Incandescent Lighting:
1000 lux maximum. This is
produced with general service,
tungsten-filament, gas-filled,
inside frosted lamps in the 60
Watt to 100 Watt range to
generate 1000 lux over the
horizontal surface on which
the equipment under test rests.
The light sources are above the
test area. The source is
expected to have a filament
temperature in the 2700 to
3050 Kelvin range and a spec-
tral peak in the 850 to 1050
nm range.
4. Fluorescent Lighting:
1000 lux maximum. This is
simulated with an IR source
having a peak wavelength
within the range of 850 nm to
900 nm and a spectral width of
less than 50 nm biased and
modulated to provide an
optical square wave signal
(0 µW/cm2 minimum and
0.3 µW/cm2 peak amplitude
with 10% to 90% rise and fall
times less than or equal to
100 ns) over the horizontal
surface on which the equip-
ment under test rests. The
light sources are above the test
area. The frequency of the
optical signal is swept over the
frequency range from 20 kHz
to 200 kHz.
Due to the variety of fluores-
cent lamps and the range of IR
emissions, this condition is not
expected to cover all circum-
stances. It will provide a
common floor for IrDA
operation.
16
