HI-548/883 HI-549/883 Single 8/Differential 4 Channel CMOS Analog Multiplexers With Active Overvoltage Protection @ HARRIS January 1989 Features This Circult is Processed in Accordance to Mil-Std- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * No Channel Interaction During Overvoltage Guaranteed RON Matching 44V Maximum Power Supply Break-Before-Make Switch Analog Signal Range ........ saveseeesecnenans +15V Access Time (MaXx.) verse sa nenenenteeennene 1.0us Power Dissipation (Max.).......... seentaesenscaontes 45mW Applications * Data Acquisition Systems * Control Systems * Telemetry Description The HI-548/883 and HI-549/883 are analog multiplexers with Active Overvaitage Protection and guaranteed Ron matching. Analog input levels may greatly exceed either power supply without damaging the device or disturbing the signal path of otherchannels. Active protection circui- try assures that signal fidelity is maintained even under fault conditions that would destroy other multiplexers. Analog inputs can withstand constant 70 volt peak-to- peak levels with +15V supplies and digital inputs will sustain continuous faults up to 4 volts greater than either supply. In addition, signal sources are protected from short circuiting should multiplexer supply loss occur; each input presents 1kQ of resistance under this condition. These features make the Hi-548/883 and HI-549/883 ideal for use in systems where the analog inputs originate from external equipment or separately powered circuitry. Both devices are fabricated with 44 volt dielectrically isolated CMOS technology. The H1-548/883 is a 8 channel device and the HI-549/883 is a 4 channel differential version. If input overvoitage protection is not needed, the HI-508/883 and HI-509/883 multiplexers are recommended. For further information see Application Notes 520 and 521. Pinouts HI1-548/883 (CERAMIC DIP) TOP VIEW 1 Al 2 A2 3 GND 4 +VSUPPLY 5 INS 6 IN6 7 IN7 8 INB Hi4-548/883 (CERAMIC LCC) TOP VIEW w at gB@ea Zz ~Vsuppiy | 4 18 | GND 7 | *VsuPPLy i | ne wil we[ nz] 7 18] INS IN3 ING 3 r-5 gen S24 HI1-549/883 (CERAMIC DIP) TOP VIEW Al GND +VSUPPLY IN 1B IN 2B IN 38 IN 4B OUTB en norwnr TOP VIEW -Vsuepty [4 IntalS Nc IN2A IN3A 5-70HI-548/883 HI-549/883 Functional Diagrams HI-548/883 TRUTH TABLES 7 HI-548/883 IN1 O-4- WY # 04 out ' Lote ON tk ! Az | A1| Ao | EN | CHANNEL (N2O7WW oO" ( _| veconen/ e i \ 7 71 priver x x x L NONE . it cfuefeda 1 ; 1 Lye}; HtaH 2 mS! tyHi ola 3 iN BO} W494 0f+ clu] aH 4 sot --- H L L H 5 VEAV tr H{L] HI] H 6 OLTAGE CLAMP & LeveL H]THI OL H 7 SIGNAL ISOLATION H H H H 8 *DIGITAL INPUT PROTECTION | i i Ag A1 A2 EN on ox HI-549/883 HI-549/883 2 F TON <3 Ly gura CHANNEL 3a A;| Ag | EN| PAIR 53 x | x | L | NONE Lc} ulu 1 OUTB L H H 2 H| Ll H 3 DECODER/ DRIVE H H H 4 <> AMP & LEVEL SHIFT DIGITAL INPUT PROTECTION H i Ag AY EN 5-71Specifications HI-548/883 HI-549/883 Absolute Maximum Ratings Voltage Between Supply Pins... JUNCTION TAMPOratUre.... ec cece cect et enecetscseseetaeeceeteeeeeeeeceees +175C *VSUPPLY to Ground.. Thermal Resistance, Junction-to-Case (6c) -VsuPPLY to Ground .. 25V Ceramic DIP Package... ec sieieie se teteettesteeeeeeeeees 26C/W Analog input Voltage Ceramic LOC Package oo... cece ceeete ers ceeeenecneneneceeeeee 199C /W ING etree cteteeertensesesstsanranes we -VsuPPLY *20V Thermal Resistance, Junction-to-Ambient (6ja) NG et ete eee vocseetes ccetene nee saneteanteserensentenennitee -VSUPPLY -20V Ceramic DIP Package.. -80C/W Digital Input Voltage Ceramic LCC Package -769C/W PV EN AVA cece cee cee teases canaeseceieeneennicaiseneeesenianaees *VSUPPLY *4V. Power Dissipation (at 75C) Ceramic DIP Package.. Ceramic LCC Package Power Dissipation Derating Factor (Above +75C} Ceramic DIP Package.. -VSUPPLY ~4V or 20mA, whichever occurs first. Continuous Current, S or D. Peak Current, S or D 13.2mW/9C {Pulsed at Ims, 10% Duty Cycle Max.}....0 ee 40mA Ceramic LCC Package Storage Temperature Range ........ ESD Classification oo. ec ce cee ceeeec eeeeie cceneaneeceeeee =2000V Lead Temperature (Soldering 10 Seconds) . 275C Recommended Operating Conditions Operating Temperature Range .. -55C to +1259C Logic Low Level (Vai) OV to 0.8V Operating Supply Voltage (+ VsuPPLy) - see ETSY Logic High Level (Vay). -+4V to *VSUPPLY Analog Input Voltage (V's) ....... tVguppLy Max RMS Current, S or D. BMA TABLE 1. D.C. ELECTRICAL PERFORMANCE CHARACTERISTICS Devices Tested at *VsUPPLY =*15V, -VSUPPLY = -15V. VEN = 4.0V, Unless Otherwise Specified. GROUP A LIMITS D.C. PARAMETERS SYMBOL CONDITIONS SUBGROUPS TEMPERATURE MIN | MAX | UNITS Input Leakage Current 4H Measure inputs Sequentially, 1,2,3 +259C, +1259C, -55C -1.0 1.0 BA a Connect All Unused Inputs to GND 1, 2,3 +250C, +1250C, -559C | -1.0 1.0 vA Leakage Current into *IS(OFF) Vg = +10V, Vp = -10V. Ven = 0.8V 1 +25C -10 +10 nA the Source Terminal of All Unused Inputs = -10V 2,3 +1250C, -550C -50 +50 nA an"OFF Switch IS(OFF) | g=-10V, Vp = *10V. Ven = 0.8V 1 +250C -10 +10 | nA All Unused Inputs = +10V 2,3 +125C, -559C -50 +50 nA Leakage Current Into *ID(OFF) Vp = *10V, Ven = 0.8V 1 +250C -10 +10 nA the Drain Terminal of All Unused Inputs = -10V_ HI!-548/883 2,3 +1259C, -559C -200 +200 nA an OFF Switch H1-549/883 . +1250C, -559C -100 +100 nA ~peorr) | Yp=-19V, Ven =0.8v 1 +250C -10 +10 | nA Ali Unused Inputs = +10V HI-548/883 23 +1259C, -55C -200 +200 nA HI-549/883 2,3 +1259C, -559C -100 +100 nA Leakage Current From *ID(ION) Vg = Vp =t10V 1 +250C 710 +10 nA an ON Driver Into Ali Unused Inputs = -16V_ HI-548/883 2,3 *1259C, -55C -200 +200 | nA the Switch (Drain) HI-549/883 2,3 +1259C, -55C -100 +100 nA Ipiony | Vg= Vp =-10V 1 +250C -10 +10 | nA Ail Unused inputs = +10V HI-548/883 2,3 +1259C, -559C -200 +200 nA HI-549/883 2,3 +1259C, -559C -100 +100 nA Overvoltage Protected, Ip(OFF) | Vg=33V, Vp = OV, Ven = 0.8V 1,2,3 +250C, +1250C, -559C | -2.0 +2.0 | yA Leakage Current Into Overvoltage | Vs applied at =25% duty cycle the Drain Terminal of Vg = -33V, Vp = OV, Ven = 0.8V 1,2,3 +259C, +1259C, -559C -2.0 +20 an "OFF Switch Vs applied at <25% duty cycle Positive Supply Current I(+) Va= OV, Ven = 4.0V 1,2,3 +259C, +1259C, -559C 2.0 mA Negative Supply Current \(-) Va = OV, Ven = 4.0V 1,2,3 +250C, +1259C, -559C -1.0 mA Standby Positive +IsBy Va = OV, VEN = OV 1,2,3 +250C, +125C, -55C 2.0 | mA Supply Current Standby Negative -Igpy Va= OV, Ven = OV 1,2,3 +259C, +125C, -55C | -1.0 mA Supply Current Switch ON +*Rps1 Vg = 10V 1 +259C 1500 a Resistance Ip = 100pA 2,3 +1250C, -55C 1800 Q -Rpsi1 Vg = -10V 1 +259C 1500 | 0 ID = -100pA 2,3 +1259C, -55C 1800 a Logic Level Voltage VaL Note 1, 2 1,2,3 +259C, +1259C, -55C 0.8 v VAH Note 1, 2 1,2,3 +259C, +125C, -55C 4.0 v Difference in switch *ARDS1 (*Rps1MAX) - (*RpsiMIN) x 100 1 +250C 7 % ON Resistance ~+ApsiAVE. Between Channels -ARDS1 (-RpsiMAX) - (-Rps1MIN) x 100 1 +250C 7 % -Ros1AVE NOTES 1. Used for forcing conditions far all DC tests unless otherwise specified 2. Ta drive from DTL/TTL circuits, 1k{ pull-up resistors to +5.0V supply are recommended CAUTION: These devices are sensitive to electrostatic discharge. Proper !C handling procedures shauld be followed. 5-72HI-548/883 HI-549/883 TABLE 2. A.C. ELECTRICAL PERFORMANCE CHARACTERISTICS Devices Tested at *VSUPPLY = +15V. -VSUPPLY =-15V, VEN = 4.0V, Unless Otherwise Specified. LIMITS A.C. PARAMETERS | SYMBOL CONDITIONS SUBGROUP TEMP MIN MAX | UNITS Break-Before-Make to Re = 1kQ, CL = 12.5pF 9 +25C 25 ns Time Delay Propagation Delay ta Ri = 10M2, CL = 14pF 9 +250C 500 ns Times: Address Inputs to 40, 11 +1259C, -55C 1000 ns (/O Channel Times Enable to I/O tON(EN) RL = 1kQ, CL = 12.5pF 9 +259C 500 ns 10, 11 +1259C, -559C 1000 ns tOFF(EN) AL = 1kO, CL = 12.5pF 9 +259C 500 ns 10,11 +1259C, -59C 1000 ns TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Characterized at *VSUPPLY = *15V, -VSUPPLY = -15V, VEN = 4.0V, Uniess Otherwise Specified. LIMITS PARAMETER SYMBOL CONDITIONS NOTE TEMP MIN MAX | UNITS Capacitance: Ca V+ = V- =0V 3 +259C 10 pF 8 2 Address Input t = 1MHz 2 % ga Capacitance: Cos V+=V-=0V HI-548/883 3 +250C 45 pF a Output Switch f = 1MHz HI-549/883 3 +250C 25 pF 33 of Capacitance Cis V+=V-=0V 3 *259C 15 pF Input Switch f = 1MHz Charge Transfer VOTE Vs = GND 3 +259C 10 mV Error VGEN = OV to SV, f = 200kHz Off Isolation Viso VEN = 0.8V, Ay = 1kO 3,4 +*250C -50 dB Cy. = 15pF, Vg = 7VRMS f = 100kHz NOTES: 3. The parameters listed in this table are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 4. Worst case isolation occurs on channel 4 due to proximity of the output pins. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLES 1, 2 & 3) Interim Electrical Parameters (Pre Burn-in) 1 Final Electrical Test Parameters 1, 2, 3, 9, 10, 11 Group A Test Requirements 1, 2, 3, 9, 10, 11 Groups C & D Endpoints 4 *PDA applies to Subgroup 1 only. No other subgroups are included in PDA. CAUTION: These devices are sensitive to electrostatic discharge. Proper IC handling procedures should be followed. 5-73HI-548/855 rn-549/883 Test Circuits INPUT LEAKAGE CURRENT VAL = 0.8V; VaH = 4.0V UNUSED INPUTS TO GROUND \p(OFF) ve eNO V- Ig{QFF) VA = VEN = 0.8V Ig(OFF) GND CH1 CH2 cH . 2 'g(OFF) tHn Vs TRUTH TABLE VaL=0.8V Van = 4.0V Ip(ON) (pon TRUTH TABLE VaL=0.8V Van = 4.0 Ip(OFF) OVERVOLTAGE {p (OFF) ov AD eas AN EN Va> VEN = 0.8V Ros Ym vw) Ron 1b TRUTH TABLE VAL = O.8V Van = 4.0V SUPPLY CURRENTS ve GND v- CHARGE TRANSFER ERROR OFF CHANNEL ISOLATION Our wQ 1SpF (1) (1) INCLUDES ALL FACTORS ANO SCOPE OR VOLTMETER CAPACITANCE 5-74HI-848/883 HI-549/883 Switching Waveforms 40v ADDRESS ov DRIVE (Va) ouTPUT 50% 50% Vl 1OPEN 40V ADDRESS DRIVE (Va) 50% ov a ourpur Wx =v ENABLE DRIVE ov BREAK-BEFORE-MAKE DELAY (topEN) BREAK-BEFORE-MAKE DELAY (topen) +15V +5V wi o Va INPUT IN2 PO . At nisag/ THRU. ae ap = aN? - cH1ON na Vout 12.5pF 1K -15V * SIMILAR CONNECTION FOR HI-549 = 100ns/DIV. ACCESS TIME ACCESS TIME +18V + v IN 1 -Q #t0V Va INPUT A2 2 THRU. . vA ; IN UL IN? or + Wi548/ = san |" 8 POFOV PROBE + Sor] E av ENABLE DELAY tON(EN): 'OFF(EN) OuTPUT CHa ON ENABLE DELAY tON(EN): tOFF(EN) +15 IN 1E +10 ENABLE DRIVE A2 tN2 . AY THRU, o = Wes / NB = = an = EN out Gwo ve y 12.5pF l 1K CH! OFF OUTPUT -15 * SIMILAR CONNECTION FDR HI-549 5-75 CMOS ANALOG MULTIPLEXERSHI-548/883 HI-549/883 Burn-in Circuits HI-548/883 CERAMIC DIP HI-548/883 CERAMIC LCC BV r Osv = Lb L: li A le al FN AD WC AT Az -15 O t v &No >, "Ey eHins +yPL= t O+15v = Ane wc HS " +15V - 02 Dina ins PS = + lin wey IN4 QUT _NC_ IN IN7 gf} ioh tat 12 ay J > on =m NOTES: NOTES: Rl = 10k22 + 5% 1/2 or 1/4W (per socket) Rl = 10kQ + 5% 1/2 or 1/4W (per socket) C1, C2 = 0.014F (per socket) or 0.1uF (per row) Ct, C2 = .01pF (per socket) or 0.1uF (per row) 01, 02 = IN4002 (or equivalent) (per board) D1, D2 = IN4002 (or equivalent) (per board) HI-549/883 CERAMIC DIP HI-549/883 CERAMIC LCC ow nv <= | Lk: [_}20 |i9 ~ EN AD NC AD GND |. 1VO-F7- w wi On 2 BV i pinta woh ez T = {nc weHS t u IN 2A, iN 2B 18 a 14 INJA DUT ouT iN 38- IN 48 NC IN 4B | wl af 12] 13 18k S2 S tons: D 10K Bar SR + NOTES: NOTES: Ail, R2 = 10k2 + 5% 1/2 or 1/4W (per socket) R1, R2 = 10k + 5% 1/2 or 1/4W (per socket) C1, C2 = 0.01uF (per socket) or 0.1uF {per row) Ct, C2 = 0.014 (per socket) or 0.14F (per row) D1, 02 = IN4002 (or equivalent) (per board) D1, D2 = IN4002 {or equivalent) (per board) 5-76HI-548/883 HI-549/883 Schematic Diagrams ADDRESS INPUT BUFFER AND LEVER SHIFTER TVL REFERENCE CIRCUIT eee oe LEVEL SHIFTER wT) | He LEVEL b> Bit OVERVOLTAGE TO DECODE TO DECODE Tat SWATCH PAIR A2 GRAZ ' e P TO P-CHANNEL BE es et zr, F HE Brean Ag oR ME i re +4 A1 OR Aj " ta YO N-CHANNEL ENABLE Delete Ag or Ap input for Hi-549/883 MULTIPLEX SWITCH FROM DECDDE OVERVOLTAGE PROTECTION | i 7 CMOS ANALOG MULTIPLEXERSHI-548/883 HI-549/883 Die Characteristics DIE DIMENSIONS: 83 x 108 x 19 mils TRANSISTOR COUNT: METALLIZATION HI-548/883 253 Type: Al HI-549/883 253 Thickness: 16kA + 2kA PROCESS: CMOS-D! GLASSIVATION DIE ATTACH Type: Nitride Material: Gold Silicon Eutectic Alloy Thickness: 7kA + 0.7kA Temperature: Ceramic DIP 460C (Max) WORST CASE CURRENT DENSITY: 1.4 x 105 A/cm2 Ceramic LCC 420C (Max) Metallization Mask Layout HI-548/883 HI-549/883 ING INT INS auT ina ING er IN3B IN4B OUTB OUTA IN4A_ IN3A Cat) foo) Cs] semis fe] (7? Lee = a lene ee & qUS il wwsfia 4V 13 |e Guo [ eh aa is | Else) A2 Al AO EN NOTE: Pad Numbers Correspond to DIP Pin Numbers Only 5-78HI-548/883 HI-549/883 Packagingt 16 PIN CERAMIC DIP 753. 785 140. 265 005 MIN =| 170 | as) [ | 200 MAX . 1, F018 150 MIN 2290 { .060 | 4 310 Oo 125 _| im - 080 MAX 008 * iS 180 100 015 LEAD MATERIAL: Type B LEAD FINISH: Type A PACKAGE SEAL Material: Giass Frit Temperature: 450C + 100C Method: Furnace Seal PACKAGE MATERIAL: Ceramic, 90% Alumina Bsc * INCREASE MAX LIMIT BY .003 INCHES MEASURED AT CENTER OF FLAT FOR SOLDER FINISH INTERNAL LEAD WIRE Material: Aluminum Diameter: 1.25 Mil Bonding Method: Ultrasonic COMPLIANT OUTLINE: 38510 D-2 PAD MATERIAL: Type C PAD FINISH: Type A FINISH DIMENSION: Type A PACKAGE MATERIAL: Multilayer Ceram PACKAGE SEAL Material: Gold/Tin (80/20) Temperature: 320C + 109C Method: Furnace Braze 20 PAD CERAMIC LCC OS] cos .. (UU UU 022 | py c4 Pp] 4 L022 bo] eat 32 .028 015 MIN -358 .045 5 aT 050 05s | PO cy esc CLE) Y 342. 358 4 poor [aint os | -089 INTERNAL LEAD WIRE Material: Aluminum Diameter: 1.25 Mil Bonding Method: Ultrasonic COMPLIANT OUTLINE: 38510 C-2 ic, 90% Alumina Min NOTE: All Dimensions are Max . Dimensions are in inches. jax + MIL-M-3851G Compliant Materials, Finishes & Dimensions. 5-79 CMOS ANALOG MULTIPLEXERSGq HARRIS DESIGN INFORMATION HI-548 HI-549 Single 8/Differential 4 Channel CMOS Analog Multiplexers With Active Overvoltage Protection ON RESISTANCE vs. ANALOG INPUT VOLTAGE 13 Ta = +1250C Ta = +259C TaA= On Resistance (k2) oc = en -10 48 a 4 -2 o 2 4 6 B 10 VIN - Analog Input (Volts) ANALOG INPUT OVERVOLTAGE CHARACTERISTICS _ oo = on ANALOG INPUT CURRENT (Un) > o DM OUTPUT OFF LEAKAGE CURRENT Ip{OFF) (HN) Analog Input Current(mA) w 115 418 421 424 +27 +30 439300436 Vin -Analog input Overvoltage (Valts) VSUPPLY {1+ -Supply Current (mA) 1K 10K t- Switch Current (mA) = H18 Vsuepy = +10 100K Toggle Frequency (Hz) LEAKAGE CURRENT vs. TEMPERATURE ON CHANNEL CURRENT vs. VOLTAGE The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design data only. No guarantee is implied. Typical Performance Characteristics Unless Otherwise Specified: Ta = 25C, VguPPLy = 15V, 100A Leakage Current 10pm b SUPPLY CURRENT vs. TOGGLE FREQUENCY VAH = +4V, VAL = 0.8V LEAKAGE OFF INPUT LEAKAGE CURRENT aa S00 750 1080 Temperature {SC} #1250C +6 #8 210 H1200O+14 Vin-Valtage Across Switch 10M 5-80