IPB010N06N
OptiMOSTM Power-Transistor
Features
• Optimized for synchronous rectification
• 100% avalanche tested
• Superior thermal resistance
• N-channel, normal level
• Qualified according to JEDEC1) for target applications
• Pb-free lead plating; RoHS compliant
• Halogen-free according to IEC61249-2-21
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous drain current
IDVGS=10 V, TC=25 °C 180 A
VGS=10 V, TC=100 °C 180
VGS=10 V, TC=25 °C,
RthJA =40 K/W2)
45
Pulsed drain current3) ID,pulse TC=25 °C 720
Avalanche energy, single pulse4) EAS ID=100 A, RGS=25 W1600 mJ
Gate source voltage
VGS ±20 V
4) See figure 13 for more detailed information
Value
1) J-STD20 and JESD22
3) See figure 3 for more detailed information
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Type
IPB010N06N
Package
TO263-7
010N06N
VDS
60
V
RDS(on),max
1.0
mW
ID
180
A
Qoss
228
nC
QG(0V..10V)
208
nC
Product Summary
Rev. 2.1 page 1 2012-12-07
IPB010N06N
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Power dissipation
Ptot TC=25 °C 300 W
Operating and storage temperature
Tj, Tstg -55 ... 175 °C
IEC climatic category; DIN IEC 68-1 55/175/56
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
RthJC - - 0.5 K/W
Device on PCB
RthJA minimal footprint - - 62
6 cm² cooling area2) - - 40
Electrical characteristics, at Tj=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V(BR)DSS VGS=0 V, ID=1 mA 60 - - V
Gate threshold voltage
VGS(th) VDS=VGS, ID=280 µA 2.1 2.8 3.3
Zero gate voltage drain current
IDSS
VDS=60 V, VGS=0 V,
Tj=25 °C
-0.5 1µA
VDS=60 V, VGS=0 V,
Tj=125 °C
-10 100
Gate-source leakage current
IGSS VGS=20 V, VDS=0 V -10 100 nA
RDS(on) VGS=10 V, ID=100 A -0.8 1.0 mW
VGS=6 V, ID=25 A -1.0 1.5
Gate resistance
RG-1.8 2.7 W
Transconductance
gfs
|VDS|>2|ID|RDS(on)max,
ID=100 A
160 310 - S
Value
Values
Drain-source on-state resistance
Rev. 2.1 page 2 2012-12-07
IPB010N06N
Parameter Symbol Conditions Unit
min. typ. max.
Dynamic characteristics
Input capacitance
Ciss -15000 18750 pF
Output capacitance
Coss -3400 4250
Reverse transfer capacitance
Crss -130 260
Turn-on delay time
td(on) -37 -ns
Rise time
tr-36 -
Turn-off delay time
td(off) -74 -
Fall time
tf-23 -
Gate Charge Characteristics5)
Gate to source charge
Qgs -65 -nC
Gate charge at threshold
Qg(th) -46 -
Gate to drain charge
Qgd -37 49
Switching charge
Qsw -56 -
Gate charge total
Qg-208 243
Gate plateau voltage
Vplateau -4.2 - V
Gate charge total, sync. FET
Qg(sync)
VDS=0.1 V,
VGS=0 to 10 V
-184 -nC
Output charge
Qoss VDD=30 V, VGS=0 V -228 -
Reverse Diode
Diode continuous forward current IS- - 180 A
Diode pulse current
IS,pulse - - 720
Diode forward voltage
VSD
VGS=0 V, IF=100 A,
Tj=25 °C
-0.9 1.2 V
Reverse recovery time
trr -87 139 ns
Reverse recovery charge
Qrr -144 -nC
5) See figure 16 for gate charge parameter definition
VR=30 V, IF=100A,
diF/dt=100 A/µs
TC=25 °C
Values
VGS=0 V, VDS=30 V,
f=1 MHz
VDD=30 V, VGS=10 V,
ID=100 A, RG,ext=3 W
VDD=30 V, ID=100 A,
VGS=0 to 10 V
Rev. 2.1 page 3 2012-12-07
IPB010N06N
1 Power dissipation 2 Drain current
Ptot=f(TC)ID=f(TC); VGS10 V
3 Safe operating area 4 Max. transient thermal impedance
ID=f(VDS); TC=25 °C; D=0 ZthJC=f(tp)
parameter: tpparameter: D=tp/T
1 µs
10 µs
100 µs
1 ms
10 ms
DC
10-1 100 101 102
10-1
100
101
102
103
ID [A]
VDS [V]
limited by on-state
resistance
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
10-6 10-5 10-4 10-3 10-2 10-1 100
10-3
10-2
10-1
100
ZthJC [K/W]
tp [s]
0
40
80
120
160
200
240
280
320
025 50 75 100 125 150 175
Ptot [W]
TC [°C]
0
40
80
120
160
200
025 50 75 100 125 150 175 200
ID [A]
TC [°C]
Rev. 2.1 page 4 2012-12-07
IPB010N06N
5 Typ. output characteristics 6 Typ. drain-source on resistance
ID=f(VDS); Tj=25 °C RDS(on)=f(ID); Tj=25 °C
parameter: VGS parameter: VGS
7 Typ. transfer characteristics 8 Typ. forward transconductance
ID=f(VGS); |VDS|>2|ID|RDS(on)max gfs=f(ID); Tj=25 °C
parameter: Tj
5 V
5.5 V
6 V
7 V
10 V
0
0.5
1
1.5
2
2.5
3
0100 200 300 400 500 600 700
RDS(on) [mW]
ID [A]
25 °C
175 °C
0
100
200
300
400
500
600
700
0 2 4 6 8
ID [A]
VGS [V]
0
50
100
150
200
250
300
350
400
030 60 90 120 150 180
gfs [S]
ID [A]
5 V
5.5 V
6 V
7 V
10 V
0
100
200
300
400
500
600
700
0.0 0.5 1.0 1.5 2.0 2.5 3.0
ID [A]
VDS [V]
Rev. 2.1 page 5 2012-12-07
IPB010N06N
9 Drain-source on-state resistance 10 Typ. gate threshold voltage
RDS(on)=f(Tj); ID=100 A; VGS=10 V VGS(th)=f(Tj); VGS=VDS
11 Typ. capacitances 12 Forward characteristics of reverse diode
C=f(VDS); VGS=0 V; f=1 MHz IF=f(VSD)
parameter: Tj
typ
max
0
0.5
1
1.5
2
2.5
-60 -20 20 60 100 140 180
RDS(on) [mW]
Tj [°C]
280 µA
2800 µA
0
1
2
3
4
-60 -20 20 60 100 140 180
VGS(th) [V]
Tj [°C]
Ciss
Coss
Crss
101
102
103
104
105
020 40 60
C [pF]
VDS [V]
25 °C
175 °C
100
101
102
103
0 0.5 1 1.5
IF [A]
VSD [V]
Rev. 2.1 page 6 2012-12-07
IPB010N06N
13 Avalanche characteristics 14 Typ. gate charge
IAS=f(tAV); RGS=25 WVGS=f(Qgate); ID=100 A pulsed
parameter: Tj(start) parameter: VDD
15 Drain-source breakdown voltage 16 Gate charge waveforms
VBR(DSS)=f(Tj); ID=1 mA
52
54
56
58
60
62
64
66
68
-60 -20 20 60 100 140 180
VBR(DSS) [V]
Tj [°C]
VGS
Qgate
Vgs(th)
Qg(th)
Qgs
Qgd
Qsw
Qg
12 V
30 V
48 V
0
2
4
6
8
10
12
050 100 150 200 250
VGS [V]
Qgate [nC]
25 °C
100 °C
125 °C
1
10
100
1000
110 100 1000
IAV [A]
tAV [µs]
Rev. 2.1 page 7 2012-12-07
IPB010N06N
Package Outline TO 263-7
Rev. 2.1 page 8 2012-12-07
IPB010N06N
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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on the types in question, please contact the nearest Infineon Technologies Office.
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the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
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or other persons may be endangered.
Rev. 2.1 page 9 2012-12-07
Mouser Electronics
Authorized Distributor
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