NC7SZ19 TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Features Description Ultra-High Speed: tPD 2.7ns Typical at 5V VCC Broad VCC Operating Range: 1.65V to 5.55V Proprietary Noise/EMI Reduction Circuitry The NC7SZ19 is a 1-of-2 decoder with a common output enable. The device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC range. The inputs and outputs are high impedance when VCC is 0V. Inputs tolerate voltages up to 5.5V independent of VCC operating voltage. Power Down High Impedance Inputs/Outputs Over-Voltage Tolerance Inputs Facilitate 5V to 3V Translation Ultra-Small MicroPakTM Packages Ordering Information Part Number Top Mark Package Packing Method NC7SZ19P6X Z19 6-Lead SC70, EIAJ SC88 1.25mm Wide 3000 Units on Tape & Reel NC7SZ19L6X B4 6-Lead MicroPakTM, 1.00mm Wide 5000 Units on Tape & Reel NC7SZ19FHX B4 6-Lead, MicroPak2TM, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel (R) TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPakTM is a trademark of Fairchild Semiconductor Corporation. (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 www.fairchildsemi.com NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer February 2011 Figure 1. SC70 (Top View) Figure 2. MicroPakTM (Top Through View) Figure 3. Pin 1 Orientation NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Pin Configurations Notes: 1. AAA represents product code top mark (see Ordering Information). 2. Orientation of top mark determines pin one location. 3. Reading the top mark left to right, pin one is the lower left pin. Pin Definitions Pin # SC70 Pin # MicroPakTM Name 1 1 A Description 2 2 GND 3 3 /E Decoder Output Enable / Demultiplexer Data 4 4 Y1 Output 5 5 VCC Supply Voltage 6 6 Y0 Output Decoder Address / Demultiplexer Select Ground Function Table Inputs Output A /E Y0 = A + /E Y1 = /A + /E L L L H H L H L X H H H H = HIGH Logic Level L = LOW Logic Level X = Don't Care (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 7.0 V VIN DC Input Voltage -0.5 7.0 V VOUT 7.0 V IIK DC Input Diode Current VIN < -0.5V -50 mA IOK DC Output Diode Current VIN < -0.5V -50 mA IOUT DC Output Current 50 mA DC VCC or Ground Current 100 mA +150 C +150 C +260 C ICC or IGND TSTG DC Output Voltage -0.5 Storage Temperature Range -65 TJ Junction Temperature Under Bias TL Junction Lead Temperature (Soldering, 10 Seconds) PD Power Dissipation at +85C SC70-6 180 MicroPakTM-6 130 MicroPak2TM-6 ESD mW 120 Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 V NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Absolute Maximum Ratings Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VIN VOUT Parameter Min. Max. Supply Voltage Operating 1.65 5.50 Supply Voltage Data Retention 1.5 5.5 Input Voltage 0 5.5 V Output Voltage 0 VCC V VCC at 1.8V, 0.15V, 2.5V 0.2V 0 20 VCC at 3.3V 0.3V 0 10 tr, tf Input Rise and Fall Times TA Operating Temperature Conditions VCC at 5.0V 0.5V JA Thermal Resistance (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 0 5 -40 +85 SC70-6 425 MicroPakTM-6 500 MicroPak2TM-6 560 Unit V ns/V C C/W www.fairchildsemi.com 3 Symbol Parameter VCC Condition Min. VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.75VCC 0.70VCC 0.70VCC 2.30 to 5.50 0.30VCC 0.30VCC 1.55 1.65 1.55 VIN=VIH, or VOL, IOH=-100A 2.20 2.30 2.20 2.90 3.00 2.90 4.40 4.50 4.40 1.65 IOH=-4mA 1.29 1.52 1.29 2.30 IOH=-8mA 1.90 2.15 1.90 3.00 IOH=-16mA 2.40 2.80 2.40 3.00 IOH=-24mA 2.30 3.68 2.30 4.50 IOH=-32mA 3.80 4.20 3.80 3.00 VIN=VIL ,or, VIH, IOL=100A 4.50 IOFF Power Off Leakage Current ICC Quiescent Supply Current (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 V 0.25VCC 2.30 IIN Max. 0.25VCC 1.65 Input Leakage Current Unit 1.65 4.50 VOL Min. 0.75VCC 3.00 LOW Level Output Voltage Max. 1.65 2.30 HIGH Level Output Voltage Typ. 2.30 to 5.50 1.65 VOH TA=-40 to +85C TA=+25C V V 0.00 0.10 0.10 0.00 0.10 0.10 0.00 0.10 0.10 0.00 0.10 0.10 1.65 IOL=4mA 0.08 0.24 0.24 2.30 IOL=8mA 0.10 0.30 0.30 3.00 IOL=16mA 0.15 0.40 0.40 3.00 IOL=24mA 0.22 0.55 0.55 4.50 IOL=32mA 0.22 0.55 0.55 0.1 1.0 A 1 10 A 1 10 A 0 to 5.5 0 VIN=5.5V, GND VIN or VOUT=5.5V 1.65 to 5.50 VIN=5.5V, GND V NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer DC Electrical Characteristics www.fairchildsemi.com 4 Symbol Parameter VCC Condition Min. 1.80 0.15 tPLH, tPHL TA=-40 to +85C TA=+25C 2.50 0.20 CL=15pF, Propagation Delay 3.30 0.30 RL=1M A or /E to Output 5.00 0.50 3.30 0.30 CL=50pF, 5.00 0.50 RL=500 Typ. Max. Min. Max. 2.5 5.9 10.5 2.5 11.0 1.2 3.5 6.0 1.2 6.4 0.8 2.7 4.1 0.8 4.5 0.5 2.1 3.2 0.5 3.5 1.2 3.2 5.1 1.2 5.4 0.8 2.7 4.0 0.8 4.3 CIN Input Capacitance 0 2.3 CPD Power Dissipation (4) Capacitance 3.30 10.5 5.00 12.8 Unit Figure ns Figure 5 Figure 6 pF pF Figure 5 Note: 4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic). NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer AC Electrical Characteristics Notes: 5. CL includes load and stray capacitance. 6. Input PRR = 1.0MHz, tW = 500ns. Figure 4. AC Test Circuit Figure 5. ICCD Test Circuit Figure 6. AC Waveforms Note: 7. Input=AC Waveform; tr=tf=1.8ns. 8. PRR=10MHz; Duty Cycle=50%. 9. /E Input=GND. (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 www.fairchildsemi.com 5 NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Physical Dimensions SYMM C L 2.000.20 0.65 A 0.50 MIN 6 4 B PIN ONE 1.250.10 1 1.90 3 0.30 0.15 (0.25) 0.40 MIN 0.10 0.65 A B 1.30 LAND PATTERN RECOMMENDATION 1.30 1.00 0.80 SEE DETAIL A 1.10 0.80 0.10 C 0.10 0.00 C 2.100.30 SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE (R0.10) 0.25 0.10 0.20 A) THIS PACKAGE CONFORMS TO EIAJ SC-88, 1996. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. D) DRAWING FILENAME: MKT-MAA06AREV6 30 0 0.46 0.26 DETAIL A SCALE: 60X Figure 7. 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor's online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf. Package Designator P6X (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 6 NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X 0.25 0.15 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X BOTTOM VIEW DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER (0.13) 4X Notes: 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REVISION: MAC06AREV4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 8. 6-Lead, MicroPakTM, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor's online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 7 NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer Physical Dimensions 0.89 0.35 0.05 C 1.00 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.55MAX C 5X 0.52 SIDE VIEW 0.73 (0.08) 4X 1 DETAIL A 2 1X 0.57 0.09 0.19 6X 3 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 6 5 4 0.35 0.60 (0.08) 4X 0.10 .05 C C B A 0.40 0.30 BOTTOM VIEW NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REVISION: MGF06AREV3 Figure 9. 0.075X45 CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X 6-Lead, MicroPak2TM, 1x1mm Body, .35mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor's online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf. Package Designator FHX (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 8 NC7SZ19 -- TinyLogic(R) UHS 1-of-2 Decoder / Demultiplexer (c) 1999 Fairchild Semiconductor Corporation NC7SZ19 * Rev. 1.0.2 www.fairchildsemi.com 9