2017 Microchip Technology Inc. DS20005870A-page 1
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Features
Low RMS Phase Jitter: <1 ps (typ.)
High Stability: ±10 ppm, ±20 ppm, ±25 ppm,
±50 ppm
Wide Temperature Range
- Industrial: –40°C to +85°C
- Ext. Commercial: –20°C to +70°C
- Ext. Industrial: –40°C to +105°C
High Supply Noise Rejection: –50 dBc
Wide Frequency Range: 2.3 MHz to 460 MHz
Small Industry Standard Footprints:
- 2.5 mm x 2.0 mm, 3.2 mm x 2.5 mm,
5.0 mm x 3.2 mm, and 7.0 mm x 5.0 mm
Excellent Shock and Vibration Immunity
- Qualified to MIL-STD-883
High Reliability
- 20x Better MTF than Quartz Oscillators
Low Current Consumption
Supply Range of 2.25V to 3.6V
Standby and Output Enable Function
Lead Free and RoHS Compliant
Applications
Storage Area Networks
- SATA, SAS, Fibre Channel
Passive Optical Networks
- EPON, 10G-EPON, GPON, 10G-PON
Ethernet
- 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video and Surveillance
PCI Express: Gen 1 to Gen 4
Display Port
General Description
The DSC1104 and DSC1124 series of high
performance oscillators utilizes a proven silicon MEMS
technology to provide excellent jitter and stability over
a wide range of supply voltages and temperatures. By
eliminating the need for quartz or SAW technology,
MEMS oscillators significantly enhance reliability and
accelerate product development, while meeting
stringent clock performance criteria for a variety of
communications, storage, and networking applications.
DSC1104 has a standby feature allowing it to
completely power down when EN pin is pulled low;
whereas for DSC1124, only the outputs are disabled
when EN is low. Both oscillators are available in
industry standard packages, including the small
2.5 mm x 2.0 mm, and are drop-in replacements for
standard 6-pin HCSL quartz crystal oscillators.
Block Diagram
TABLE 1: OUTPUT ENABLE MODES
EN Pin DSC1104 DSC1124
High Outputs Active Outputs Active
NC Outputs Active Outputs Active
Low Standby Outputs Disabled
TEMP SENSOR &
COMPENSATION
CIRCUITRY
MEMS
OSCILLATOR PLL DIVIDER
DRIVER
Pin 1
ENABLE
Pin 2
NC
Pin 3
GND
Pin 6
VDD
Pin 5
OUTPUT
Pin 4
OUTPUT
Low Jitter Precision HCSL Oscillator
DSC1104/24
DS20005870A-page 2 2017 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
Input Voltage .....................................................................................................................................–0.3V to VDD + 0.3V
ESD Protection (HBM) ...............................................................................................................................................4 kV
ESD Protection (MM) ................................................................................................................................................400V
ESD Protection (CDM) ............................................................................................................................................1.5 kV
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified.
Parameters Sym. Min. Typ. Max. Units Conditions
Supply Voltage (Note 1)V
DD 2.25 3.6 V
Supply Current IDD
0.095
mA
DSC1104, EN pin low,
Output is disabled
—2022 DSC1124, EN pin low,
Output is disabled
Frequency Stability Δf
——±10
ppm
Includes frequency variation
due to initial tolerance,
temp., and power supply
voltage
——±20
——±25
——±50
Aging ΔfY1 ±5 ppm One year at +25°C
Start-up Time (Note 2)t
SU 5 ms T = +25°C
Input Logic Levels VIH 0.75 x VDD —— VInput logic high
VIL 0.25 x VDD Input logic low
Output Disable Time (Note 3)t
DA ——5 ns
Output Enable Time tEN
5 ms DSC1104
20 ns DSC1124
Enable Pull-Up Resistor
(Note 4)RPU 40 kΩ Pull-up resistor exists
HCSL Outputs
Supply Current IDD 40 42 mA Output Enabled, RL = 50Ω
Output Logic Levels VOH 0.725 VOutput logic high, RL = 50Ω
VOL 0.1 Output logic low
Peak-to-Peak Output Swing 750 mV Single-Ended
Output Transition Time
(Note 3)
tr200 400
ps
Rise time, 20% to 80%,RL =
50Ω, CL = 2 pF
tf200 Fall time, 20% to 80%,RL =
50Ω, CL = 2 pF
Frequency f02.3 460 MHz Single frequency
Output Duty Cycle SYM 48 52 % Differential
2017 Microchip Technology Inc. DS20005870A-page 3
DSC1104/24
Period Jitter JPER —2.5ps
RMS
Integrated Phase Noise JPH
—0.25
psRMS
200 kHz to 20 MHz @
156.25 MHz
—0.38 100 kHz to 20 MHz @
156.25 MHz
—1.72 12 kHz to 20 MHz @
156.25 MHz
Note 1: Pin 6 VDD should be filtered with a 0.1 µF capacitor.
2: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.
3: Output Waveform and Test Circuit figures below define the parameters.
4: Output is enabled if pad is floated or not connected.
ELECTRICAL CHARACTERISTICS (CONTINUED)
Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified.
Parameters Sym. Min. Typ. Max. Units Conditions
DSC1104/24
DS20005870A-page 4 2017 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Operating Temperature Range TA
–20 +70 °C Ordering Option E
–40 +85 °C Ordering Option I
–40 +105 °C Ordering Option L
Junction Temperature TJ +150 °C
Storage Temperature Range TS–55 +150 °C
Soldering Temperature +260 °C 40 sec. max.
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature, and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
2017 Microchip Technology Inc. DS20005870A-page 5
DSC1104/24
2.0 PIN DESCRIPTIONS
FIGURE 2-1: Pin Configuration, 6-Lead QFN.
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
1 EN Enable.
2 NC Leave unconnected.
3 GND Ground.
4 OUT Output.
5OUT
Complementary output.
6 VDD Input.
1EN
NC
GND
6VDD
OUT
OUT
5
4
2
3
DSC1104/24
DS20005870A-page 6 2017 Microchip Technology Inc.
3.0 NOMINAL PERFORMANCE PARAMETERS
Unless specified otherwise, T = +25°C, VDD = 3.3V.
FIGURE 3-1: Power Supply Rejection
Ratio. FIGURE 3-2: Phase Jitter (Integrated
Phase Noise).
-80
-70
-60
-50
-40
-30
-20
-10
0
0.1 1 10 100 1000 10000
Rejection (dBc)
Supply Noise Frequency (kHz)
50-mV
100-mV
0.0
0.5
1.0
1.5
2.0
2.5
0 200 400 600 800 1000
Phase Jitter (ps RMS)
Low-end of integration BW: x kHz to 20 MHz
50MHz-HCSL
106MHz-HCSL
156MHz-HCSL
212MHz-HCSL
2017 Microchip Technology Inc. DS20005870A-page 7
DSC1104/24
4.0 OUTPUT WAVEFORM
FIGURE 4-1: Output Waveform.
V
IL
1/
f
o
Output
Enable
t
DA
t
EN
tF
tR
V
IH
80%
20%
50%
Output
830 mv
DSC1104/24
DS20005870A-page 8 2017 Microchip Technology Inc.
5.0 TYPICAL TERMINATION SCHEME
FIGURE 5-1: Typical Termination Scheme.
6.0 TEST CIRCUIT
FIGURE 6-1: Test Circuit.
V
DD
0.1uF
50 Ω50 Ω
2
34
5
6
Rs = 0 Ωfor test
Rs
Rs
Rs serves to match the trace
impedances. Depending on
bo ard l ayo ut, th e v a l ue may
range from0to 30 ohms.
100 Ω
2017 Microchip Technology Inc. DS20005870A-page 9
DSC1104/24
7.0 SOLDER REFLOW PROFILE
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/sec. max.
Preheat Time 150°C to 200°C 60-180 sec.
Time Maintained above 217°C 60-150 sec.
Peak Temperature 255°C to 260°C
Time within 5°C of Actual Peak 20-40 sec.
Ramp-Down Rate 6°C/sec. max.
Time 25°C to Peak Temperature 8 minutes max.
DSC1104/24
DS20005870A-page 10 2017 Microchip Technology Inc.
8.0 PACKAGE MARKING INFORMATION
8.1 Package Marking Information
Example
6-Pin CDFN/VDFN*
XXXXXXX
0SSS
DCPYYWW
0750000
0421
DCP1723
Legend: XX...X Product code, customer-specific information, or frequency in MHz
without printed decimal point
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
SSS Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
3
e
3
e
2017 Microchip Technology Inc. DS20005870A-page 11
DSC1104/24
6-Lead VDFN 2.5 mm x 2.0 mm Package Outline and Recommended Land Pattern
B
A
0.05 C
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
1
N
2X TOP VIEW
SIDE VIEW
NOTE 1
0.10 C
0.08 C
Microchip Technology Drawing C04-1005A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
D
E
A
A1
0.10 C A B
0.05 C
BOTTOM VIEW
12
N
2X b2
4X b1
5X L1
L2
e
2
DSC1104/24
DS20005870A-page 12 2017 Microchip Technology Inc.
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Microchip Technology Drawing C04-1005A Sheet 2 of 2
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Pitch
Standoff
Units
Dimension Limits
A1
A
b1
e
L2
E
N
0.825 BSC
0.665
0.60
0.80
0.00
0.65
0.765
0.85
0.02
2.00 BSC
MILLIMETERS
MIN NOM
6
0.865
0.70
0.90
0.05
MAX
Overall Length D 2.50 BSC
Terminal Length L1 0.60 0.70 0.80
Terminal Width b2 0.20 0.25 0.30
2017 Microchip Technology Inc. DS20005870A-page 13
DSC1104/24
DSC1104/24
DS20005870A-page 14 2017 Microchip Technology Inc.
6-Lead VDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern
B
A
0.05 C
0.05 C
0.07 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1007A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
D
E
e
2X b2
4X b1
L
L1
A
A1
2017 Microchip Technology Inc. DS20005870A-page 15
DSC1104/24
Microchip Technology Drawing C04-1007A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Terminal Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b2
b1
e
L
E
N
1.05 BSC
0.85
0.65
0.45
0.80
0.00
0.50
0.70
0.90
0.85
0.02
2.50 BSC
MILLIMETERS
MIN NOM
6
0.95
0.75
0.55
0.90
0.05
MAX
L1 0.10 REFTerminal Pullback
Overall Length D 3.20 BSC
DSC1104/24
DS20005870A-page 16 2017 Microchip Technology Inc.
RECOMMENDED LAND PATTERN
Dimension Limits
Units
X1Contact Pad Width (X4)
Contact Pitch
MILLIMETERS
1.05 BSC
MIN
E
MAX
1.00
Contact Pad Length (X6)
Contact Pad Width (X2)
Y
X2
0.85
Microchip Technology Drawing C04-3007A
NOM
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
SILK SCREEN
12
6
CContact Pad Spacing 1.60
Space Between Contacts (X4) G1 0.25
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
Y
X2
G
0.60
2017 Microchip Technology Inc. DS20005870A-page 17
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6-Lead CDFN 5.0 mm x 3.2 mm Package Outline and Recommended Land Pattern
DSC1104/24
DS20005870A-page 18 2017 Microchip Technology Inc.
6-Lead VDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
RECOMMENDED LAND PATTERN
Dimension Limits
Units
Optional Center Pad Width
Optional Center Pad Length
Contact Pitch
Y2
X2
1.90
2.90
MILLIMETERS
2.54 BSC
MIN
E
MAX
Contact Pad Length (X6)
Contact Pad Width (X6)
Y1
X1
1.35
1.50
Microchip Technology Drawing C04-3010A
NOM
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
12
6
CContact Pad Spacing 3.70
Contact Pad to Center Pad (X2) G 0.20
Thermal Via Diameter (X6) V
Thermal Via Pitch EV
0.33
1.20
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
With 2.8x1.8 mm Exposed Pad
C
E
X1
Y1
X2
Y2
EV
EV ØV G
SILK SCREEN
2017 Microchip Technology Inc. DS20005870A-page 19
DSC1104/24
B
A
0.20 C
0.20 C
0.10 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C A B
0.10 C A B
0.10 C
Microchip Technology Drawing C04-1010A Sheet 1 of 2
2X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
D
E
e
6X b
D2
E2
6X L (K)
A
A1
0.08 C
6X
DSC1104/24
DS20005870A-page 20 2017 Microchip Technology Inc.
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Exposed Pad Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b
E2
e
L
E
N
2.54
1.70
1.00
1.35
0.80
0.00
1.40
1.10
1.80
0.85
0.02
5.00 BSC
MILLIMETERS
MIN NOM
6
1.90
1.20
1.45
0.90
0.05
MAX
K0.20 REF
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
Terminal-to-Exposed-Pad
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Overall Length
Exposed Pad Length
D
D2 2.70
7.00 BSC
2.80 2.90
Microchip Technology Drawing C04-1010A Sheet 2 of 2
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
2017 Microchip Technology Inc. DS20005870A-page 21
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6-Lead CDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
DSC1104/24
DS20005870A-page 22 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005870A-page 23
DSC1104/24
APPENDIX A: REVISION HISTORY
Revision A (December 2017)
Initial conversion of Micrel document DSC1104/24
to Microchip data sheet template DS20005870A.
Minor text changes throughout.
DSC1104/24
DS20005870A-page 24 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005870A-page 25
DSC1104/24
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
X
X
Packaging
Stability
Device
Device: DSC1104: Low-Jitter Precision HCSL Oscillator with
Standby
DSC1124: Low-Jitter Precision HCSL Oscillator
Package: A = 6-Lead 7.0 mm x 5.0 mm CDFN
B = 6-Lead 5.0 mm x 3.2 mm CDFN
C = 6-Lead 3.2 mm x 2.5 mm CDFN
D = 6-Lead 2.5 mm x 2.0 mm CDFN
N = 6-Lead 7.0 mm x 5.0 mm CDFN w/o center
pad
Temperature
Range:
E= 20C to +70C (Extended Commercial)
I= 40C to +85C (Industrial)
L= 40C to +105C (Extended Industrial)
Stability: 1=±50ppm
2=±25ppm
3=±20ppm
5=±10ppm
Frequency: xxx.xxxx = 2.3 MHz to 460 MHz (User Defined)
Packing Option: <blank>= Tube
T = 1000/Reel
X
Package
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
X
Temperature
Range
-XXX.XXXX
Frequency
Option
Examples:
a) DSC1104AE1-
053.5000:
Low Jitter Precision HCSL Oscillator
with Standby, 6-Lead 7x5 CDFN, Ext.
Commercial Temp. Range, ±50 ppm
Stability, 53.5 MHz Frequency, Tube
b) DSC1124BI2-
246.8100T:
Low Jitter Precision HCSL Oscillator, 6-
Lead 5x3.2 VDFN, Industrial Temp.
Range, ±25 ppm Stability, 246.81 MHz
Frequency, 1000/Reel
c) DSC1104CL5-
156.2500:
Low Jitter Precision HCSL Oscillator
with Standby, 6-Lead 3.2x2.5 VDFN,
Ext. Industrial Temp. Range, ±10 ppm
Standby, 156.25 MHz Frequency, Tube
d) DSC1124DE3-
094.5500T:
Low Jitter Precision HCSL Oscillator, 6-
Lead 2.5x2.0 CDFN, Ext. commercial
Temp. Range, ±20 ppm Stability,
94.55 MHz Frequency, 1000/Reel
DSC1104/24
DS20005870A-page 26 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005870A-page 27
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2440-6
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certif ication for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and proced ures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, micro perip hera ls, n onvolat ile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS20005870A-page 28 2017 Microchip Technology Inc.
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10/25/17