ACPL-M43T
Wide Operating Temperature Automotive Digital Optocoupler
with R2Coupler™ Isolation and 5-Pin SMT Package
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The ACPL-M43T is a single channel, high temperature, high
CMR, high speed digital optocoupler in a ve lead minia-
ture footprint speci cally used in the automotive applica-
tions. The SO-5 JEDEC registered (MO-155) package outline
does not require “through holes” in a PCB. This package oc-
cupies approximately one-fourth the footprint area of the
standard dual-in-line package. The lead pro le is designed
to be compatible with standard surface mount processes.
This digital optocoupler uses an insulating layer between
the light emitting diode and an integrated photon detec-
tor to provide electrical insulation between input and
output. Separate connections for the photodiode bias
and output transistor collector increase the speed up to a
hundred times over that of a conventional photo-transistor
coupler by reducing the base-collector capacitance.
The ACPL-M43T has an increased common mode transient
immunity of 30kV/s minimum at VCM = 1500V over ex-
tended temperature range.
Avago R2Coupler isolation products provide the reinforced
insulation and reliability needed for critical in automotive
and high temperature industrial applications.
Functional Diagram
Features
High Temperature and Reliability IPM Driver for
Automotive Application.
30 kV/s High Common-Mode Rejection
at VCM = 1500 V (typ)
Compact, Auto-Insertable SO5 Packages
Wide Temperature Range: -40C ~ 125C
High Speed: 1MBd (Typ)
Low LED Drive Current: 10mA (typ)
Low Propagation Delay: 300ns (typ)
Quali ed to AEC-Q100 Test Guidelines
Worldwide Safety Approval:
UL1577 recognized, 4000Vrms/1min
CSA Approved
IEC/EN/DIN EN 60747-5-2 Approved
Applications
Automotive IPM Driver for DC-DC converters
and motor inverters
CANBus Communications Interface
High Temperature Digital/Analog Signal Isolation
Power Transistor Isolation
Pin Connections
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Note: The connection of a 0.1 F bypass capacitor
between pins 4 and 6 is recommended.
IF
SHIELD 6
5
4
GND
VCC
1
3
VO
ICC
VF
IO
ANODE
CATHODE
+
−
Truth Table
LED
ON
OFF
Vo
LOW
HIGH
6
5
43
1VCC
VOUT
GNDCATHODE
ANODE
M43T
YWW
EE
2
Package Outline Drawings
ACPL-M43T Small Outline SO-5 Package (JEDEC MO-155)
Ordering Information
Part
number
Option
Package
Surface
Mount
Tape &
Reel
IEC/EN/DIN
EN 60747-5-2 Quantity
RoHS
Compliant
ACPL-M43T -000E SO-5 X 100 per tube
-060E X X 100 per tube
-500E X X 1500 per reel
-560E X X X 1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
ACPL-M43T-500E to order product of Mini- at Surface Mount 5-pin package in Tape and Reel packaging with RoHS
compliant.
Example 2:
ACPL-M43T to order product of Mini- at Surface Mount 5-pin package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
7.0 ± 0.2
(0.276 ± 0.008)
2.5 ± 0.1
(0.098 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
4.4 ± 0.1
(0.173 ± 0.004)
1.27
(0.050) BSC 0.71
(0.028) MIN.
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
7o
MAX.
MAX. LEAD COPLANARITY
= 0.102 (0.004)
0.20 ± 0.025
(0.008 ± 0.001)
M43T
YWW
EE
Extended Datecode for lot tracking
DIMENSIONS IN MILLIMETERS AND (INCHES)
8.27
(0.325)
2.0
(0.080)
2.5
(0.10)
1.3
(0.05)
0.64
(0.025)
4.4
(0.17)
LAND PATTERN RECOMMENDATION
3
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics*
Description Symbol Characteristic Unit
Installation classi cation per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 Vrms
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
I – IV
I – III
I – II
Climatic Classi cation 55/125/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 567 Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875=VPR, 100% Production Test with tm=1 sec, Partial discharge < 5 pC
VPR 1063 Vpeak
Input to Output Test Voltage, Method a*
VIORM x 1.6=VPR, Type and Sample Test, tm=10 sec, Partial discharge < 5 pC
VPR 907 Vpeak
Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 Vpeak
Safety-limiting values – maximum values allowed in the event of a failure.
Case Temperature
Input Current
Output Power
TS
IS, INPUT
PS, OUTPUT
175
230
600
°C
mA
mW
Insulation Resistance at TS, VIO = 500 V RS>109
* Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/
DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test pro les.
Insulation and Safety Related Speci cations
Parameter Symbol ACPL-M43T Units Conditions
Minimum External
Air Gap (Clearance)
L(101) 5 mm Measured from input terminals to output
terminals, shortest distance through air.
Minimum External
Tracking (Creepage)
L(102) 5 mm Measured from input terminals to output
terminals, shortest distance path along body.
Minimum Internal
Plastic Gap
(Internal Clearance)
0.08 mm Through insulation distance conductor to
conductor, usually the straight line distance
thickness between the emitter and detector.
Tracking Resistance
(Comparative
Tracking Index)
CTI 175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group
(DIN VDE0109)
IIIa Material Group (DIN VDE 0109)
Recommended re ow condition as per JEDEC Standard, J-STD-020 (latest revision).
Note: Non-halide ux should be used.
Regulatory Information
The ACPL-M43T is approved by the following organizations:
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-5:2007
EN 60747-5-2:2001 + A1
DIN EN 60747-5-2 (VDE 0884 Teil 2)
UL
Approved under UL 1577, component recognition pro-
gram up to VISO = 4000 VRMS
CSA
Approved under CSA Component Acceptance Notice #5.
4
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units Note
Storage Temperature TS-55 150 °C
Operating Temperature TA-40 125 °C
Lead Soldering Cycle Temperature 260 °C
Time 10 s
Average Forward Input Current IF(avg) 20 mA
Peak Forward Input Current
(50% duty cycle, 1ms pulse width)
IF(peak) 40 mA
Peak Transient Input Current
(<= 1us pulse width, 300ps)
IF(trans) 100 mA
Reversed Input Voltage VR5 V Pin 3 - 1
Input Power Dissipation PIN 30 mW
Output Power Dissipation PO100 mW
Average Output Current IO8mA
Peak Output Current Io(pk) 16 mA
Supply Voltage (Pins 6-4) VCC -0.5 30 V
Output Voltage (Pins 5-4) VO-0.5 20 V
Solder Re ow Temperature Pro le See Re ow Temperature Pro le
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Note
Supply Voltage VCC 3.0 20.0 V
Operating Temperature TA-40 125 °C
5
Electrical Speci cations (DC)
Over recommended operating TA = -40°C to 125°C, unless otherwise speci ed.
Parameter Sym. Min. Typ. Max. Units Conditions Fig. Note
Current Transfer
Ratio
CTR 32 45 80 % TA=25°C Vo=0.4V Vcc=4.5V
IF=10mA
1,2,4 1
20 45 % Vo=0.5V
Logic Low
Output Voltage
VOL 0.1 0.4 V TA=25°C Io=3mA
0.5 V Io=2.4mA
Logic High
Output Current
IOH 0.5 ATA=25°C Vo=Vcc=5.5V IF=0mA 11, 12
1ATA=25°C Vo=Vcc=20V
5A
Logic Low
Supply Current
ICCL 50 200 AIF=10mA,
Vo=open,
Vcc=20V
7
Logic High
Supply Current
ICCH 0.02 1 ATA=25°C IF=0mA,
Vo=open,
Vcc=20V
7
2.5 A
Input Forward
Voltage
VF1.45 1.5 1.75 V TA=25°C IF=10mA 3
1.25 1.5 1.85 V IF=10mA
Input Reversed
Breakdown Voltage
BVR5V IR=10A
Temperature
Coe cient of
Forward Voltage
V/
TA
-1.5 mV/°C IF=10mA
Input Capacitance CIN 90 pF F=1MHz, VF=0
6
Switching Speci cations (AC)
Over recommended operating (TA = -40°C to 125°C), IF = 10mA, VCC = 5.0 V unless otherwise speci ed.
Parameter Symbol Min Typ Max Units Test Conditions Fig. Note
Propagation Delay
Time to Logic Low
at Output
TPHL 0.08 0.2 0.8 µs TA=25°C Pulse: f=10kHz, Duty cycle =50%,
IF = 10mA, VCC = 5.0 V, RL = 1.9k
CL = 15pF VTHHL=1.5V
5,6,7,
8,9,
10,13
5
0.06 1.0 µs
Propagation Delay
Time to Logic High
at Output
TPLH 0.15 0.3 0.8 µs TA=25°C Pulse: f=10kHz, Duty cycle =50%,
IF = 10mA, VCC = 5.0 V, RL = 1.9k
CL = 15pF VTHLH=2.0V
5,6,7,
8,9,
10,13
5
0.03 1.0 µs
Pulse Width
Distortion
PWD 0 0.4 0. 45 µs TA=25°C Pulse: f=10kHz, Duty cycle =50%,
IF=10mA, VCC=5.0V, RL=1.9k,
CL=15pF, VTHHL=1.5V, VTHLH=2.0V
8
0 0.85 µs
Propagation Delay
Di erence Between
Any 2 Parts
tPLH-tPHL 0 0.4 0.5 µs TA=25°C Pulse: f=10kHz, Duty cycle =50%,
IF=10mA, VCC=5.0V, RL=1.9k,
CL=15pF, VTHHL=1.5V, VTHLH=2.0V
9
0 0.9 µs
Common Mode
Transient Immunity
at Logic High Output
|CMH| 15 30 kV/s VCM=1500Vp-p, IF=0mA, TA=25°C,
RL=1.9k
14 4, 5
Common Mode
Transient Immunity
at Logic Low Output
|CML| 15 30 kV/s VCM=1500Vp-p, IF=10mA,
TA=25°C, RL=1.9k
14
Package Characteristics
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an
input-output continuous voltage rating.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary
Withstand Voltage*
VISO 4000 VRMS RH 50%, t = 1 min;
TA = 25°C
2, 3
Input-Output Resistance RI-O 1014 VI-O = 500 Vdc 2
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz; VI-O = 0 Vdc 2
Notes:
1. CURRENT TRANSFER RATIO in percent is de ned as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
2. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
3. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4800 VRMS for 1 second.
4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM,
to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum
tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state
(i.e., VO < 0.8 V).
5. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor.
6. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
7. Use of a 0.1 µF bypass capacitor connected between pins 4 and 6 is recommended.
8. Pulse Width Distortion (PWD) is de ned as |tPHL - tPLH| for any given device.
9. The di erence between tPLH and tPHL between any two parts under the same test condition.
7
Figure 1. DC and Pulsed Transfer Characteristics. Figure 2. Current Transfer Ratio vs Input Current
Figure 3. Input Current vs Forward Voltage Figure 4. Current Transfer Ratio vs Temperature
Figure 5. Propagation Delay vs Temperature
0
5
10
15
20
25
30
01020
VO - OUTPUT VOLTAGE - V
IO - OUTPUT CURRENT - mA
20mA
TA = 25°C
VCC = 5.0V 40mA
35mA
30mA
25mA
15mA
10mA
IF=5mA
0.6
0.7
0.8
0.9
1.0
1.1
-60 -20 20 60 100 140
NORMALIZED CURRENT TRANSFER RATIO
Normalized
I
F
= 10mA,
V
O
= 0.4V
V
CC
= 5.0V
T
A
= 25°C
T
A
- TEMPERATURE - °C
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0.1 1 10 100
IF - INPUT CURRENT - mA
NORMALIZED CURRENT TRANSFER RATIO
Normalized
IF= 10mA
VO= 0.4V
VCC = 5V
TA= 25°C
Figure 6. Propagation Delay vs Temperature
0.01
0.10
1.00
10.00
100.00
1.2 1.3 1.4 1.5 1.6
VF - FORWARD VOLTAGE - V
IF - FORWARD CURRENT - mA
TA = 25°C
IF
VF
+
−
0
0.2
0.4
0.6
0.8
1.0
1.2
-60 -40 -20 0 20 40 60 80 100 120 140
TA - TEMPERATURE - °C
TPHL
TPLH
Vcc=3V
Vcc=5V
IF=10mA, R L=1.9k
CL=15pF
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
-60 -40 -20 0 20 40 60 80 100 120 140
TA - TEMPERATURE - °C
TPLH
TPHL
Vcc=15V
Vcc=20V
IF=10mA, R L=20k
CL=100pF
TP - PROPOGATION DELAY - μs
TP - PROPOGATION DELAY - μs
8
Figure 7. Propagation Delay Time vs Load Resistance Figure 8. Propagation Delay Time vs Load Resistance
Figure 11. Logic High Output Current vs Supply Voltage
Figure 9. Propagation Delay Time vs Input Current Figure 10. Propagation Delay Time vs Input Current
Tp - PROPOGATION DELAY - μs
0
0.5
1.0
1.5
2.0
2.5
12345678910
Vcc=3V
Vcc=5V
IF=10mA, T A=25°C
CL=15pF
TPLH
TPHL
0
0.5
1.0
1.5
2.0
5 101520253035404550
Vcc=15V
Vcc=20V
IF=10mA, T A=25 °C
CL=100pF
TPLH
TPHL
RL - LOAD RESISTANCE - kΩ
RL - LOAD RESISTANCE - kΩ
Tp - PROPOGATION DELAY - μs
0
0.2
0.4
0.6
0.8
1.0
10 11 12 13 14 15 16
TPLH
TPHL
RL=1.9K, CL=15pF, T A=25°C
VCC = 3V
VCC = 5V
IF - INPUT CURRENT - mA
TP - PROPAGATION DELAY - μS
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
10 11 12 13 14 15 16
TPLH
RL=20K, C L=100pF, T A=25°C
VCC = 15V
VCC = 20V
IF - INPUT CURRENT - mA
TP - PROPAGATION DELAY - μS
TPHL
0.0001
0.001
0.01
0.1
1
10
100
1000
2 4 6 8 10 12 14 16 18 20
TA = -40°C
TA = 25°C
TA = 125°C
IOH - LOGIC HIGH OUTPUT - nA
VCC - SUPPLY VOLTAGE - V
IF = 0mA
VCC =VO
Figure 12. Logic High Output Current vs Temperature
TA - TEMPERATURE - °C
IOH - LOGIC HIGH OUTPUT CURRENT - nA
0.0001
0.001
0.01
0.1
1
10
100
1000
-50 0 50 100 150
IF=0mA
VCC =VO=5V
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, the A logo and R2Coupler™ are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved. Obsoletes AV01-0458EN
AV02-0565EN - December 1, 2011
VO
PULSE
GEN.
ZO = 50Ω
tr = 5 ns
IF MONITOR
IF
0.1μF
RL
CL = 15 p
100 Ω
0
tPHL tPLH
VO
IF
VOL
1.5 V 1.5 V
5 V
+5 V
1
3
6
5
4
10% DUTY CYCLE
1/f 100 μs
VO
IF
0.1μF
RL
A
B
PULSE GEN.
VCM
+
VFF
VO
VOL
VO
0 V 10%
90% 90%
10%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 10 mA
F
VCM
trtf
5 V
VC
-
1500 V
tr, tf = 80 ns
1
3
6
5
4
Figure 13. Switching Test Circuit
Figure 14. Test Circuit for Transient Immunity and Typical Waveforms.
