Freescale Semiconductor Technical Data MPXV4006G Rev 6, 01/2007 Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated MPXV4006G INTEGRATED PRESSURE SENSOR 0 to 6 kPa (0 to 0.87 psi) 0.2 to 4.7 V OUTPUT The MPXV4006G series piezoresistive transducer is a state-of-the-art monolithic silicon pressure sensor designed for a wide range of applications, but particularly those employing a microcontroller or microprocessor with A/D inputs. This sensor combines a highly sensitive implanted strain gauge with advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure. SMALL OUTLINE PACKAGE THROUGH-HOLE Features * * * * Temperature Compensated over 10 to 60C Ideally Suited for Microprocessor or Microcontroller-Based Systems Available in Gauge Surface Mount (SMT) or Through-hole (DIP) Configurations Durable Thermoplastic (PPS) Package J MPXV4006G7U CASE 482B-03 MPXV4006G series pressure sensors are available in the basic element package or with pressure ports. Two packing options are offered for the 482 and 482A case configurations. MPXV4006GC7U CASE 482C-03 SMALL OUTLINE PACKAGE SURFACE MOUNT ORDERING INFORMATION Device Type Basic Element Ported Element Options Case MPX Series Order No. No. Element Only 482 MPXV4006G6U Element Only 482 MPXV4006G6T1 Packing Options Rails Marking MPXV4006G Tape & Reel MPXV4006G Element Only 482B MPXV4006G7U Rails MPXV4006G Axial Port 482A MPXV4006GC6U Rails MPXV4006G Axial Port 482A MPXV4006GC6T1 Tape & Reel MPXV4006G Axial Port 482C MPXV4006GC7U Rails MPXV4006G Side Port 1369 MPXV4006GP Trays MPXV4006G Dual Port 1351 MPXV4006DP Trays MPXV4006G MPXV4006G6U/6T1 MPXV4006GC6U/C6T1 CASE 482-01 CASE 482A-01 MPXV4006DP CASE 1351-01 MPXV4006GP CASE 1369-01 PIN NUMBERS(1) 1 N/C 5 N/C 2 VS 6 N/C 3 Gnd 7 N/C 4 Vout 8 N/C 1. Pins 1, 5, 6, 7, and 8 are internal device connections. Do not connect to external circuitry or ground. Pin 1 is noted by the notch i n the lead. (c) Freescale Semiconductor, Inc., 2007. All rights reserved. VS Gain Stage #2 and Ground Reference Shift Circuitry Thin Film Temperature Compensation and Gain Stage #1 Sensing Element GND Vout Pins 1, 5, 6, 7, and 8 are NO CONNECTS for small outline package device Figure 1. Fully Integrated Pressure Sensor Schematic Table 1. Maximum Ratings(1) Parametrics Symbol Value Units Maximum Pressure (P1 >P2) Pmax 24 kPa Storage Temperature Tstg -30 to +100 C Operating Temperature TA -10 to +60 C 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. Table 2. Operating Characteristics Characteristic Symbol Min Typ Max Unit Pressure Range POP 0 -- 6.0 kPa Supply Voltage(1) VS 4.75 5.0 5.25 Vdc Supply Current IS -- -- 10 mAdc Full Scale Output(2) (RF = 51k) VFSS -- 4.6 -- V Offset(3)(5) (RF = 51k) Voff 0.100 0.225 0.430 V V/P -- 766 -- mV/kPa -- -- -- 5.0 %VFSS Sensitivity Accuracy (4)(5) (10 to 60C) 1. Device is ratiometric within this specified excitation range. 2. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 3. Offset (Voff) is defined as the output voltage at the minimum rated pressure. 4. Accuracy (error budget) consists of the following: * Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range. * Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and from the minimum or maximum operating temperature points, with zero differential pressure applied. * Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from minimum or maximum rated pressure, at 25C. * Offset Stability: Output deviation, after 1000 temperature cycles, -30 to 100C, and 1.5 million pressure cycles, with minimum rated pressure applied. * TcSpan: Output deviation over the temperature range of 10 to 60C, relative to 25C. * TcOffset: Output deviation with minimum pressure applied, over the temperature range of 10 to 60C, relative to 25C. 5. Auto Zero at Factory Installation: Due to the sensitivity of the MPXV4006G, external mechanical stresses and mounting position can affect the zero pressure output reading. To obtain the 5% FSS accuracy, the device output must be "autozeroed'' after installation. Autozeroing is defined as storing the zero pressure output reading and subtracting this from the device's output during normal operations. MPXV4006G 2 Sensors Freescale Semiconductor ON-CHIP TEMPERATURE COMPENSATION, CALIBRATION, AND SIGNAL CONDITIONING The performance over temperature is achieved by integrating the shear-stress strain gauge, temperature compensation, calibration and signal conditioning circuitry onto a single monolithic chip. Figure 2 illustrates the gauge configuration in the basic chip carrier (Case 482). A fluorosilicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the silicon diaphragm. The MPXV4006G series sensor operating characteristics are based on use of dry air as pressure media. Media, other than dry air, may have adverse effects on sensor performance and long-term reliability. Internal reliability and qualification test for dry air, and other media, are available Fluorosilicone Gel Die Coat from the factory. Contact the factory for information regarding media tolerance in your application. Figure 3 shows the recommended decoupling circuit for interfacing the output of the integrated sensor to the A/D input of a microprocessor or microcontroller. Proper decoupling of the power supply is recommended. Figure 4 shows the sensor output signal relative to pressure input. Typical, minimum and maximum output curves are shown for operation over a temperature range of 10C to 60C using the decoupling circuit shown in Figure 3. The output will saturate outside of the specified pressure range. Stainless Steel Cap Die +5 V P1 Wire Bond Thermoplastic Case Vout OUTPUT Vs IPS Lead Frame 1.0 F 0.01 F GND 470 pF P2 Die Bond Differential Sensing Element Figure 3. Recommended Power Supply Decoupling and Output Filtering Recommendations (For additional output filtering, please refer to Application Note AN1646.) Figure 2. Cross Sectional Diagram SOP (Not to Scale) 5 Output (V) Transfer Function: 4.5 Vout = VS*[(0.1533*P) + 0.045] 5% VFSS 4 VS = 5.0 V 0.25 Vdc TEMP = 10 to 60 C 3.5 3 Typical 2.5 2 Max 1.5 Min 1 0.5 0 0 3 6 Differential Pressure (kPa) See Note 5 in Operating Characteristics Figure 4. Output versus Pressure Differential MPXV4006G Sensors Freescale Semiconductor 3 PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE Freescale designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The Pressure (P1) side is the side containing silicone gel which isolates the die from the environment. The pressure sensor is designed to operate with positive differential pressure applied, P1 > P2. The Pressure (P1) side may be identified by using the table below: Table 3. Pressure (P1)/Vacuum (P2) Side Identification Table Part Number Case Type MPXV4006G6U/T1 Pressure (P1) Side Identifier 482 Stainless Steel Cap MPXV4006GC6U/T1 482A Side with Port Attached MPXV4006G7U 482B Stainless Steel Cap MPXV4006GC7U 482C Side with Port Attached MPXV4006GP 1369 Side with Port Attached MPXV4006DP 1351 Side with Part Marking MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct footprint, the packages will self align when subjected to a solder reflow process. It is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads. 0.100 TYP 2.54 0.660 16.76 0.060 TYP 8X 1.52 0.300 7.62 0.100 TYP 8X 2.54 inch mm Figure 5. SOP Footprint (Case 482) MPXV4006G 4 Sensors Freescale Semiconductor PACKAGE DIMENSIONS -A- D 8 PL 0.25 (0.010) 4 5 M T B S A S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. -BG 8 1 S N H C J -TSEATING PLANE PIN 1 IDENTIFIER K M DIM A B C D G H J K M N S INCHES MIN MAX 0.415 0.425 0.415 0.425 0.212 0.230 0.038 0.042 0.100 BSC 0.002 0.010 0.009 0.011 0.061 0.071 0 7 0.405 0.415 0.709 0.725 MILLIMETERS MIN MAX 10.54 10.79 10.54 10.79 5.38 5.84 0.96 1.07 2.54 BSC 0.05 0.25 0.23 0.28 1.55 1.80 0 7 10.29 10.54 18.01 18.41 CASE 482-01 ISSUE O SMALL OUTLINE PACKAGE SURFACE MOUNT -A- D 4 0.25 (0.010) 5 N 8 PL M T B S A S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. -BG 8 1 S W V C H J -TK M PIN 1 IDENTIFIER DIM A B C D G H J K M N S V W INCHES MIN MAX 0.415 0.425 0.415 0.425 0.500 0.520 0.038 0.042 0.100 BSC 0.002 0.010 0.009 0.011 0.061 0.071 0 7 0.444 0.448 0.709 0.725 0.245 0.255 0.115 0.125 MILLIMETERS MIN MAX 10.54 10.79 10.54 10.79 12.70 13.21 0.96 1.07 2.54 BSC 0.05 0.25 0.23 0.28 1.55 1.80 0 7 11.28 11.38 18.01 18.41 6.22 6.48 2.92 3.17 SEATING PLANE CASE 482A-01 ISSUE A SMALL OUTLINE PACKAGE SURFACE MOUNT MPXV4006G Sensors Freescale Semiconductor 5 PACKAGE DIMENSIONS -ANOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. 6. DIMENSION S TO CENTER OF LEAD WHEN FORMED PARALLEL. 4 5 -BG 8 1 0.25 (0.010) M T B D 8 PL S A S DETAIL X S PIN 1 IDENTIFIER N C -T- SEATING PLANE DIM A B C D G J K M N S INCHES MILLIMETERS MIN MAX MIN MAX 0.415 0.425 10.54 10.79 0.415 0.425 10.54 10.79 0.210 0.220 5.33 5.59 0.026 0.034 0.66 0.864 0.100 BSC 2.54 BSC 0.009 0.011 0.23 0.28 0.100 0.120 2.54 3.05 0 15 0 15 0.405 0.415 10.29 10.54 0.540 0.560 13.72 14.22 K M J DETAIL X CASE 482B-03 ISSUE B SMALL OUTLINE PACKAGE THROUGH-HOLE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. 6. DIMENSION S TO CENTER OF LEAD WHEN FORMED PARALLEL. -A4 5 N -BG 0.25 (0.010) 8 1 M T B D 8 PL S A S DIM A B C D G J K M N S V W DETAIL X S W V PIN 1 IDENTIFIER C -T- INCHES MILLIMETERS MAX MAX MIN MIN 10.79 0.425 10.54 0.415 10.79 0.425 10.54 0.415 13.21 0.520 12.70 0.500 0.864 0.66 0.034 0.026 0.100 BSC 2.54 BSC 0.28 0.23 0.011 0.009 3.05 2.54 0.120 0.100 15 0 15 0 11.38 0.448 11.28 0.444 14.22 0.560 13.72 0.540 6.48 6.22 0.255 0.245 3.17 2.92 0.125 0.115 SEATING PLANE K M J DETAIL X CASE 482C-03 ISSUE B SMALL OUTLINE PACKAGE THROUGH-HOLE MPXV4006G 6 Sensors Freescale Semiconductor PACKAGE DIMENSIONS PAGE 1 OF 2 CASE 1351-01 ISSUE A SMALL OUTLINE PACKAGE SURFACE MOUNT MPXV4006G Sensors Freescale Semiconductor 7 PACKAGE DIMENSIONS PAGE 2 OF 2 CASE 1351-01 ISSUE A SMALL OUTLINE PACKAGE SURFACE MOUNT MPXV4006G 8 Sensors Freescale Semiconductor PACKAGE DIMENSIONS CASE 1369-01 ISSUE B SMALL OUTLINE PACKAGE SURFACE MOUNT PAGE 1 OF 2 MPXV4006G Sensors Freescale Semiconductor 9 PACKAGE DIMENSIONS CASE 1369-01 ISSUE B SMALL OUTLINE PACKAGE SURFACE MOUNT PAGE 2 OF 2 MPXV4006G 10 Sensors Freescale Semiconductor How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MPXV4006G Rev. 6 01/2007 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. FreescaleTM and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc. 2007. All rights reserved.