19-2765; Rev 2; 2/93 SA MAL/VI Industry Standard Complete General Description The MAX174 and the MX574A/MX674A are complete 12-bit analog-to-digital converters (ADCs) that combine high speed, low-power consumption, and on-chip clock and voltage reference. The maximum conversion times are 8us (MAX174), 15us (MX674A) and 25us (MX574<A). Maxim's BICMOS construction reduces power dissipa- tion 3 times (150mW) over comparable devices. The internal buried zener reference provides low-drift and low-noise performance. External component require- ments are limited to only decoupling capacitors and fixed resistors. The versatile analog input structure allows for OV to +10V or OV to +20V unipolar or +5V or +10V bipolar input ranges with pin strapping. The MAX174/MX574A/MX674A use standard micropro- cessor interface architectures and can be interfaced to 8-, 12- and 16-bit wide buses. Three-state data outputs are controlled by CS, CE and R/C logic inputs. Applications Digital Signal Processing High-Accuracy Process Control High-Speed Data Acquisition Electro-Mechanical Systems Pin Configurations \/ | ula]? 128] sts | 128 [2| 27| p11 & 126] p10 | 40 [4 | 125] pg RIC [5| PAAAA 24 D8 | le] OE fee | veo[7] jwxe74a [ea] ds REFOUT [ g | 21 D5 | AGND [9 | [20] D4 | REFIN [10] +9] 03 vee [141] 18] 02 | BIPOFF [12 | 7] 01 1ovin [13] 16) D0 | 200N [14] 15] OGND | DIP/SO | Pin Configurations continued on page 15. oo TOP VIEW | 12-Bit A/D Converters Features # Complete ADC with Reference and Clock @ 12-Bit Resolution and Linearity @ No Missing Codes Over Temperature # 150mW Power Dissipation @ 8s (MAX174), 15s (MX674A) and 25us (MX574A) Max Conversion Times @ Precision Low TC Reference: 10ppm/C @ Monolithic BiCMOS Construction @ 150ns Maximum Data Access Time Ordering Information PIN-PACKAGE LINEARITY TEMPCO (LSBs) (ppm/"C) 8s Maximum Conversion Time TEMP. RANGE: 0C to +70C PART MAX174ACPI 28 Plastic DIP 1/2 10 MAXI74BCPI 28Plastic DIP. (is/2s=<i*i: MAX174CCPI 28 Plastic DIP 1 50 MAX174ACWl 28WideSO-~=*21/2 40 MAXI74BCWI _-28WideSO 1/227 MAXI74CCWI 28 Wide SO 1 50, MAXi74BC/D Dice" 1/2 *Consult factory for dice specifications. Ordering information continued Functional Diagram _ + VL DGND Vcc VEE BIPOFF 10VIN 20VIN | 7 W 12 13 14 MIDDLE NIBBLE STS CE RIC | Do D3. 04 07 D8 du Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. VP LOXW/VPZLSXW/PZEXVNMAX 174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters ABSOLUTE MAXIMUM RATINGS VectoDGND ..... ee OV to +16.5V VEEtODGND ............0..0..0..0.00005. OV to -16.5V VLtoDGND ....0. 00. OV to +7V DGNDtoAGND 220. een H1V Control Inputs toDGND .... 2... -0.3V to Vcc +0.3V (CE, CS, AO, 12/8, R/C) Digital Output Voltage toDGND ............ -0.3V, VL +0.3V (DB11-DB0, STS) Analog Inputs to AGND ................ (REFIN, BIPOFF, 10ViN) +16.5V 20VIN to AGND . +24V REFOUT ......... Indefinite short to Vcc or AGND Power Dissipation (any package) to+75C ....... . 1000mWw Derates Above +75'C by ....0. 2.002.020, 10mWw/'C Operating Ternperature Ranges: MAX174_C, MX_74AU/K/L 2 oe OC to +70C MAX174_E, MX_74AJE/KE/LE ........ .. 40C to +85C MAX174_M, MX_74AS/T/U 200 -55'C to +125"C Storage Ternperature Range _.. 65C to +160 C Lead Temperature (Soldering, 10sec.) ....... . +300'C Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS MAX174 (Vu = +5V, Veco = +15V or +12V, Ver = -15V or -12V, Ta = +25C, unless otherwise noted.) PARAMETER | SYMBOL | CONDITIONS MIN TYP MAX UNITS ACCURACY ; - Resolution / RES 12 Bits _ . MAX174A/B +1/2 Ta= +25 | maxi7ac +1 Integral Nonlinearity INL MAX174AC/BC +1/2 LSB TAS TMIN | MAX174AE/BE/AM/BM 43/4 0 TMAX MAX174C _ + Differential Nonlinearity DNL 12 bits. no missing codes over temp +1 LSB Unipolar Offset Error MAX174A/B +1 LSB (Note 1) MAX174C 2 | Bipolar Offset Error MAX174A +2 LSB (Notes 2, 3) __ | MAX174B/C _ _ +4 | Full-Scale Calibration Error 9 (Note 3) +0.25 Yo TEMPERATURE COEFFICIENTS (Using Internal Reference, Notes 2, 3, 4) Unipolar Offset Change Maxed mae - LSB MAX174AC/BC +1 MAX174CC +2 Bipolar Offset Change MAX174AE/AM +4 LSB MAX174BE/BM +2 MAX174CE/CM +4 _| Note 1: Adjustable to zero. Note 2: With 50Q fixed resistor from REFOUT to BIPOFF. Adjustable to zero. Note 3: With 502 fixed resistor from REFOUT to REFIN. Adjustable to zero. Note 4: Maximum change in specification from Ta = +25C to TMIN or TA = +25C to TMAX Note 5: External load current should not change during a conversion. For +12V supply operation, REFOUT need not be buffered except when external load in addition to REFIN and BIPOFF inputs have to be driven. MAXAISVIIndustry Standard Complete 12-Bit A/D Converters ELECTRICAL CHARACTERISTICS MAX174 (continued) (VL = +5V, Voc = +15V or +12V, Vee = -15V or -12V; Ta = +25C, unless otherwise noted.) [ PARAMETER SYMBOL CONDITIONS MIN TYP Max | UNITS | +2 . MAX174AC (10) +5 MAX174BC (27) +9 MAX174CC (50) 45 MAX174AE (19) . . +10 LSB Full-Scale Calibration Change MAX174BE (38) (por/'C) +20 MAX174CE (75) | 45 MAX174AM (12) +10 MAX174BM (25) +20 MAX174CM (50) INTERNAL REFERENCE _ - | MAX174A 9.98 410.00 10.02 Output Voltage Notoad | MAX174B/C 997 10.00 10.08 y | Output Current (Note 5) Beene for externa loads, in addition to 2 mA ELECTRICAL CHARACTERISTICS MX574A, MX674A (VL = +5V, Veco = +15V or +12V, Vee = -15V or -12V; Ta = +25C, unless otherwise noted.) | PARAMETER | SYMBOL | CONDITIONS 1 MIN TYP MAX | UNITS ACCURACY | Resolution ; RES _f 12 Bits Tae MX574AK/L/T/U, SEC MX674AK/L/T/U 41/2 i MX574Ad/S, MX674AN/S +4 Integral Nonlinearity INL MX574AK/L/KE/LE +1/2 LSB TA = TMIN | MX674AK/L/KE/LE +1/2 to TMAX MX574AT/U, MX674AT/U 43/4 MX574AJ/S, MX674AJU/S +1 Differential Nonlinearity _| 12 bits, no missing codes over temp i +1 LSB MAXI 3 VPLOXW/VPZLSXW/PZ LXVMAX174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters ELECTRICAL CHARACTERISTICS MX574A, MX674A (continued) (VL = +5V, Voc = +15V or +12V, Vee = -15V or -12V: Ta = +25C. unless otherwise noted ) PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS Unipolar Offset Error MX874AK/L/T/U, MX674AK/L/T/U +1 LSB (Note 1) . MX574AJ/S, MX674Ad/S #2 Bipolar Offset Error MX574AL/U, MX674AL/U +2 LSB {Notes 2, 3) MX574AJ/K/S/T, MX674AJ/K/S/T ; +4 | Full-Scale Calibration Error MX574AL/U +0.125 9%, (Note 3) a MX574AJ/K/S/T, MX674A 40.25 | _ TEMPERATURE COEFFICIENTS (Using Internal Reference, Notes 2, 3, 4) MX574AK/L/T/U, MX674AK/L/T/U +1 Unipolar Offset Change MX574AU/S, MX674AJ/S +2 LSB MX574AK/L, MX674AK/L +1 MX574AJ, MX674AJ +2 Bipolar Offset Change MX574AU/LE, MX674AU/LE H LSB MX574AT/KE, MX674AT/KE +2 . MX574AS/JE. MX674AS/JE +4 MX574AL. MX674AL +2 (10) +5 MX574AK, MX674AK (27) +9 MXS74AJ, MX674AJ (50) MX574ALE, MX674ALE (ta) : . +10 LSB Full-Scale Calibration Change MX574AKE, MX674AKE (38) (ppm/ C) +20 MX574AJE, MX674AJE (75) MX574AU, MX674AU a +10 MX574AT, MX674AT (25) +20 MX574AS, MX674AS (50) INTERNAL REFERENCE MX574AL/U 9.99 10.00 10.01 Output Voltage No Load | MX574AJ/K/S/T. MX674AL/U 9.98 10.00 10.02 Vv __ MX674AJ/K/S/T 9.97 10.00 10.03 Output Current (Note 5) pee aoe for external loads. in addition to 2 mA Note 1: Adjustable to zero. Note 2: Note 3: Note 4: Note 5: With 50Q fixed resistor from REFOUT to BIPOFF. Adjustable to zero. With 50Q fixed resistor from REFOUT to REFIN. Adjustable to zero. Maximum change in specification from Ta = +25'C to TMIN or TA = +25C to TMAX. External load current should not change during a conversion. For +12V supply operation, REFOUT need not be buffered except when external load in addition to REFIN and BIPOFF inputs have to be driven. MAXKI/VIIndustry Standard Complete 12-Bit A/D Converters ELECTRICAL CHARACTERISTICS MAX174/MX574A/MX674A (VL = +5V. Voo = +15V or +12V, Ver = -15V or -12V; Ta = +25C, unless otherwise noted.) be PARAMETER _| SYMBOL ____ CONDITIONS ; MIN TYP MAX | UNITS a VPULOXW/VPLSXW/PZLEXVIN ANALOG INPUT | Bipolar Input Range | | | 7 al Unipolar Inout Range 20V Input Input Impedance POWER-SUPPLY REJECTION (Max change in Fu Full-Scale Calibration) 10V Input a Vv Using 20V Input 0 +20 L | H8V41 8V | MAX174A/B, MX_74AK/LITU | +1/8 + Vec Onl - conn 1ev40.6v | MAX174C. MX_74ag/S +1/8 42 7 [vzOny oo awe poe a HB 2 Se VLOny eVEOSBV FB 1/2 LOGIC INPUTS Input Low Voltage ow Ts ERIC. AO. 1 WB 08 ry Input High Voltage Input Current CS. CE, R/C. AO, 12/8. Vin = +6 pA Input Capacitance CS, CE, RIC, AO, 12/8 7 I pF LOGIC OUTPUTS ______ Output Low Voltage ore 1-DBO, ISInK = 1.6mMA 0.4 Vv | DB1i-DBO, STS DB11-DBoO. | | a Se Ms | | | | Output High Voltage ISOURCE = 500nA Floating State Leakage Vout = 0 to VL Current STS Geaing.sae uous 811-080 CONVERSIONTIME | peo OT _MXS74A, 15 2 226 | | 12BACycle | {CONV 9 12 15 | us | 6 7 8 ___MX574A 18 MX674A 6 8 11 SSS BY MAX174 4 5 6 wre fs | 8-Bit Cycle | tconv st POWER REQUIREMENTS VCC Operating Range VL Operating Range vo VEE Operating Range _ et ee [" | VCC Supply Current (Note 5) mA | VL Supply Current (Note 5) VEE Supply Current (Note 5) / 6 __10 mA | Power Dissipation (Note 5) Veco = +15V and Veg = -15V 150 _ 26s | mw : MAXISVI 5MAX174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters TIMING CHARACTERISTICS MAX174/MX574A/MX674A (Note 6) (VL = +5V, Voc = = +15V HISV or 12V, Vee = -15V or -12V) fe rr . Ta =-40'C to 485C | Ta= 425C PARAMETER SYMBOL jSonPmONs aet Ta = 0'C to +70C Ta =-55C to +125C OT ~~ UNITS | [MIN TYP= MAX | MIN MAX | MIN: MAX | CONVERT START TIMING FULL Ce MODE STS Delay from CE tose. | CL = 50pF 100 200 | 250 320 ns CEPulse Width || stHEC fs 6 | ws 50 | ns [esiee toCESetup se [| so ttizES CCC~SS tw ts | CS Low During CE Hit High tHsC 50 50 50 ns | RIC to CE Setup tsrc S50 50. ns RIC Low During CEHigh | tac | 5s t~dLC = ns AQ to CE Setup tac | | Oo ns AO Valid During CE High | tHac 50 50 ns | READ TIMING - FULL CONTROL MODE Access Time (from CE) | too | CL=100pF _ 120 150 200 | ns Data Valid after CE Low a 2 40 2 15 sons | Output Float Delay B 490 29] ong CS to CE Setup ea 50 50 "50 | ns_| RIC to CE Setup So 0 0 [ins 4 AO to CE Setup SAR a 50 50 | ns CS Valid After CE Low tHSR To a foo a Oo _ hs RIC High After CE Low tHRR 0 | 0 oO y ns AO Valid After CELow | thar fo ts STAND-ALONE MOE i <sSCSCS _ _ | [cow RIC Pulse Width 50 ns STS Delay from R/C 320-| ons | Data Valid After R/C Low So ns _| MX574A tooo | |sigpeeyaterdee | wis [iyxeraa | 30920 600 | 30 aod | 50 go | ns | So _ Fuse 30 140 300 | 30 300 | 30 400 _ High R/C Pulse Width tHRH 200 ns | Data Access Time 00s Note 6: Timing specifications guaranteed by design. All inout contro! signals specified with tr = tf = 5ns (10% to 90% of +5V) and timed from a voltage level of +1.6V See loading circuits in Figures 1 and 2 MAKI sviIndustry Standard Complete 12-Bit A/D Converters +5V Su 100pF DN ON IK 3k 100pF I-49 i { HIGH-2Z TOLOGIC 1 HIGH-Z TO LOGIC 0 +5V $ 3k DN T DN _{- 4k 10pF 7 LOpF | 2 LOGIC 1 TO HIGH-Z LOGIC 0 TO HIGH-Z Figure 1. Load Circuit for Access Time Test Pin Description PIN # NAME FUNCTION 1 VL Logic Supply, +5V 2 12/8 Data Mode Select Input 3 cs Chip-Select Input. Must be low to se- lect device. 4 AO Byte Address/Short Cycle Input. When starting a conversion, controls number of bits converted (low = 12 bits. high = 8 bits). When reading data, if 12/8 = low. enables low byte (AO = high) or - high byte (AO = low). 5 RIC Read/Convert Input. When high, the device will be in the data-read mode. When low, the device will be in the conversion start mode. 6 CE Chip-Enable Input. Must be high to select device 7 Voc +12V or +15V Supply 8 REFOUT | +10V Reference Output 9 AGND_ | Analog Ground 10 REFIN Reference Input 11 VEE -12V or -15V Supply 12 BIPOFF | Bipolar Offset Input. Connect to REFOUT for bipolar input range. 13 1OVIN 10V Span Input 14 20VIN 20V Span Input 15 DGND_ | Digital Ground 16-27 | DO-D11 | Three-State Data Outputs 28 STS Status Output MAALSVI Figure 2. Load Circuit for Output Float Delay Test Converter Operation The MAX174/MX574A/MX674A use a successive approximation technique to convert an unknown analog input to a 12-bit digital output code. The control logic provides easy interface to most mi- croprocessors. Most applications require only a few external passive components to perform the analog-to-digital (A/D) function. The internal voltage output DAC is controlled by a Suc- cessive Approximation Register (SAR) and has an output impedance of 2.5kQ2. The analog input is connected to the DAC output with a 5kQ resistor for the 10V input and 10kQ resistor for the 20V input. The comparator is es- sentially a zero crossing detector, and its output is fed back to the SAR input. The SARis set to half scale as soon as a conversion starts. The analog input is compared to 1/2 of the full-scale voltage. The bit is kept if the analog input is greater than half scale or dropped if smaller. The next bit, bit 10, is then set with the DAC output either at 1/4 scale, if the Most Significant Bit (MSB) is dropped, or 3/4 scale if the MSB is kept. The conversion continues in this manner until the Least Significant Bit (LSB) is tried. At the end of the conversion, the SAR output is latched into the output buffers. Digital interface CE, CS, and R/C control the operation of the MAX174/MX574A/MX674A. While both CE and CS are asserted, the state of R/C selects whether a conversion (R/C = 0) ora data read (R/C = 1) isin progress. The register control inputs, 12/8 and AO, select the data format and conversion length. AO is usually tied to the LSB of the address bus. To perform a full 12-bit conver- sion, set AO low during a convert start. For a shorter 8-bit conversion, AO must be high during a convert start. VPLOXW/VPLSXW/PZ XVMAX 174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters REFIN BIPOFF 20VIN 10VIN | | < Ss 2R* -5082 5kQ2 DAC __| bo _ | omen . : REFIN [ nm 5kQQ 2.5K nn > Py (7) R 5kQ FOR MAX174, 10k&2 FOR MXS74A/MX674A ss, Figure 3. Analog Equivalent Circuit ! Table 1. Truth Table priate number of No OPeration (NOP) instructions be- . ___ tween the conversion-start and data-read commands. CE cs 12/8 Ao | ) OPERATION | oo, pots Tet - After the conversion is completed, data can be obtained aa | | None by the microprocessor. The ADCs have the required xX, &x | x | None logic for 8-, 12- and 16-bit bus interfacing, which is Initiate 12-bit determined by the 12/8 input. If 12/8 is high, the ADCs conversion are configured for a 16-bit bus. Data lines DO-D11 may Initiate 8-bit be connected to the bus as either the 12MSBs or the conversion | 12LSBs. The other 4 bits must be masked out in software. | Enable 12-bit * Oo pox | a 1 + 1 xX For 8-bit bus operation, 12/8 is set low. The format is left I paralleloutput__; justified, and the even address, AO low, contains the 1 0) 0 Enable 8MSBs 8MSBs. The odd address, AO high, contains the 4LSBs, . Enable 4LSBs which is followed by 4 trailing Os. There is no need to use be ' + 4 trailing Os a software mask when the ADCs are connected to an 8-bit bus. ~ output Data Format ote thatthe output cannot be forced to a right-justified During a data read, AO also selects whether the three- format by rearranging the data lines on the 8-bit bus state buffers contain the BMSBs (AO = 0) or the 4LSBs interface. (AO = 1) of the digital result. The 4LSBs are followed by 4 trailing Os. Output data is formatted according to the 12/8 pin. If this input is low, the output will be a word broken into two 8-bit bytes. This allows direct interface to 8-bit buses without the need for external three-state buffers. If 12/8 is high, the output will be one 12-bit word. AO can change state while a data-read operation is in effect. To begin a conversion, the microprocessor must write to the ADC address. Then, since a conversion usually takes longer than asingle clock cycle, the microprocessor must wait for the ADC to complete the conversion. Valid data will be made available only at the end of the conversion, which is indicated by STS. STS can be either polled or used to generate an interrupt upon completion. Or, the microprocessor can be kept idle by inserting the appro- 8 MAXAILSVIIndustry Standard Complete Table 2. MAX174/MX574A/MX674A Data Format for 8-Bit Bus D7 06 0S D4 D3 D2 DI DO High Byte (Ao=0) MSB 010 D9 D8 D7 DE DS p4 Low Byte (ao=1) O38 02 D1 DO 0 60 7 4 27 (MSB) D7 26 (D10) D6 MAXIM 25(09) 5 MAX174 24,08) tr MXS74A 307) D3 MX674A (06) be 21 (D5) ot 20 (D4) D0 19(03) 18 (D2) 17 (01) 3 16 (LSB) < s HARDWIRING FOR 8-BIT DATA BUSES SU CE AO DO-D11 Iss tsac a tHEC y fe THRE he re THAC, be wf ob t ISAC RIC tose Tr an STS - HIGH IMPEDANCE. - 12-Bit A/D Converters Timing and Control Convert Start Timing - Full Control Mode R/C must be low before asserting both CE and CS. It it is high, a brief read operation occurs possibly resulting in system bus contention. To initiate a conversion, use either CE or CS. CE is recommended since it is shorter by one propagation delay than CS and is the faster input of the two. CE is used to begin the conversion in Figure 4. The STS output is high during the conversion indicating the ADC is busy. During this period additional convert start commands will be ignored, so that the conversion cannot be prematurely terminated or re-started. However, if the state of AO is changed after the beginning of the conversion, any additional start conversion transitions will latch the new state of AO, possibly resulting in an incorrect conversion length (8 bits vs 12 bits) for that conversion. Read Timing - Full Control Mode Figure 5 illustrates the read-cycle timing. While reading data, access time is measured from when CE and R/C are both high. Access time is extended 10ns if CS is used to initiate a read. KL << THSR (HRA | RIC xo | wo (SAR CE J ISSR cs \ we (SRR {HAR . AO x - - 1 STS bO-D11 ~ tpn tHD. tHL - HIGHIMPEDANCE - Figure 4. Convert Start Timing MAAXI/VI Figure 5. Read Timing VVLOXW/VPLSXW/PLEXVINMAX 174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters r {HRL ~ ] RIC tos tc _* SN STS | tHOR _. {HS DO-14 HIGH IMPEDANCE Figure 6. Low Pulse for R/C in Stand-Alone Mode tHRH RIC ~\ HIGH IMPEDANCE STS tHDR 00-11 Figure 7. High Pulse for R/C in Stand-Alone Mode Stand-Alone Operation For systems which do not use or require full bus interfac- ing, the MAX174/MX574A/MX674A can be operated in a stand-alone mode directly linked through dedicated input ports. When configured in the stand-alone mode, conversion is controlled by R/C. In addition, CS and AO are wired low; CE and 12/8 are wired high. To enable the three-state buffers, set R/C low. A conversion starts when R/C is set high. This allows either a high- or a low-pulse control signal. Shown in Figure 6 is the operation with a low pulse. In this mode, the outputs, in response to the falling edge of R/C, are forced into the high impedance state and return to valid logic levels after the conversion is complete. The STS output goes high following R/C falling edge and returns low when the conversion is complete. A high-pulse conversion initiation is illustrated in Figure 7. When R/C is high, the data lines are enabled. The next conversion starts with the falling edge of R/C. The data lines return and remain "high impedance state" until another R/C high pulse. 10 ANALOG SUPPLY DIGITAL SUPPLY | -15V GND o+16V +5V GND a | l fos, fo. / / mS Z 6 RTF, 4G Aheas rite il 4 tHe 4 i @ | VEE GND Voc Vee AGND Veco VL OGND +5V DGND MAXIAA S/H AND MAX174 DIGITAL ANALOG CIRCUITRY CIRCUITRY MX574A MXO74A | Figure 8, Power-Supply Grounding Practice Analog Considerations Application Hints Physical Layout For best system performance, printed circuit boards should be used for the MAX174/MX574A/MX674A. Wire- wrap boards are not recommended. The layout of the board should ensure that digital and analog signal lines are kept separated from each other as much as possible. Care should be taken not to run analog and digital lines parallel to each other or digital lines underneath the MAX174/MX574A/MX674A. Grounding The recommended power-supply grounding practice is shown in Figure 8. The ground reference point for the on-chip reference is AGND. It should be connected directly to the analog reference point of the system. The analog and digital grounds should be connected to- gether at the package in order to gain all of the accuracy possible from the MAX174/MX574A/MX674<A in high dig- ital noise environments. In situations permitting, they can be connected to the most accesssible ground reference point. The preference is analog power return. Power-Supply Bypassing The MAX174/MX574A/MX674A power supplies must be filtered, well regulated, and free from high-frequency noise, or unstable output codes will result. Unless great care is taken in filtering any switching spikes present in the output, switching power supplies is not suggested for applications requiring 12-bit resolution. Take note that a few millivolts of noise converts to several error counts in a 12-bit ADC. MVIAXKIS/VIIndustry Standard Complete VL +5V . DIGITAL TJ] DGND GROUND AMI RECOMMENDED MAXI74 +12V/15V | ] vee. MXS74A MX674A Csi, Co ANALOG L 1. AGND GROUND C |, C3 C1. Cz. C2 - 0. 1pF CERAMIC C4, C5. C6 - 4.7 uF 12/15V Figure 9. Power-Supply Bypassing All power-supply pins should use supply decoupling capacitors connected with short lead length to the pins, as shown in Figure 9. The Vcc and VEE pins should be decoupled directly to AGND. A 4.7pF tantalum type in parallel with a O.1pF disc ceramic type is a suitable decoupling. Internal Reference The MAX174/MX574A/MX674A have an internal buried zener reference that provides a 10V, low-noise and low- temperature drift output. An external reference voltage can also be used for the ADC. When using +15V sup- plies, the internal reference can source up to 2mA in 12-Bit A/D Converters addition to the BIPOFF and REFIN inputs over the entire operating temperature range. With +12V supplies, the reference can drive the BIPOFF and REFIN inputs over temperature, but it CANNOT drive an additional load. Driving the Analog Input The input leads to AGND and 10V\N or 20VIN should be as short as possible to minimize noise pick up. If long leads are needed, use shielded cables. When using the 20VIN as the analog input, load capaci- tance on the 10VIN pin must be minimized. Especially on the faster MAX174, leave the 10VIN pin open to minimize capacitance and to prevent linearity errors caused by inadequate settling time. The amplifier driving the analog input must have low enough DC output impedance for low full-scale error. Furthermore, low AC output impedance is also required since the analog input current is modulated at the clock rate during the conversion. The output impedance of an amplifier is the open-loop output impedance divided by the loop gain at the frequency of interest. MX574A and MX674A - The approximate internal clock rate is 6(OOkKHz and 1MHz respectively, and amplifiers like the MAX400 can be used to drive the input. MAX174 - The internal clock rate is 2MHz and faster amplifiers like the OP-27, AD711 or OP-42 are required. Track-and-Hold Interface The analog input to the ADC must be stable to within 1/2LSB during the entire conversion for specified 12-bit accuracy. This limits the input signal bandwicth to a O.1pF +15V to +VS = HOLD ue T | apses- wy tne , LREF Fy : tT Th Vs HOLD L__ * ADDITIONAL PINS OMITTED FOR CLARITY 1 wk, T CC 20VIN Vec rl. 2 +15V VOUT --#0-- o._ - 10VIN |; Lf Ont WIN VIN = --o4 BIPOFF veep 1S ANALOG 5002 ToT REFOUT 47uF INPUT GND OU Aa 50g CONTROL SS STs N INPUTS MAXIM K MX574A* Spo MX674A Vv REFIN wep BY AGND _OGND Figure 10. MX574A/MX674A to AD585 Sample-and-Hold Interface MAAI/VI 11 VVLOXW/VPZLSXW/PLEXVWMAX174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters * ADDITIONAL PINS OMMITTED FOR CLARITY Our +{15V . TT +VS / CONTROL + S/H STS \ INPUTS ame Ly MNAXLAA S r HA5320 en SS oo qu Y -15V -Vs O41 pF os 5 20VIN Voc + I +15V 47uF + H TT = VOUT o--o] 10Vin yl, 2A 7uF | O41 ~ Lt Our +Vin -VIN o& BIPOFF VEE TT -15V ANALOG 7 INPUT REFOUT LAr quF ENO 5082 O1 r Ll! . REFIN VL rt 7% +5V AGNO END 1 4quF Figure 11. MAX174 to HA5320 Sample-and-Hold Interface couple of hertz for sinusoidal inputs even with the faster MAX174. For higher bandwidth signals, a track-and-hold amplifier should be used. The STS output may be used to provide the Hold signal to the track-and-hold amplifier. However, since the A/Ds DAC is switched at approximately the same time as the conversion is initiated, the switching transients at the output of the T/H caused by the DAC switching may result in code dependent errors. It is recommended that the Hold signal to the T/H amplifier precede a conversion or be coincident with the conversion start. The first bit decision by the A/D is made approximately 1.5 clock cycles after the start of the conversion. This is 2.5us, 1.5us and 0.8us for the MX574A, MX674A, and MAX174 respectively. The T/H hold settling time must be less than this time. For the MX574A and MxX674A, the AD585 sample-and-hold is recommended (Figure 10). For the MAX174, a faster T/H amplifier, like the HAS320 or HA5330, should be used (Figure 11). Input Configurations The MAX174/MX574A/MX674A input range can be set using pin strapping. Table 3 shows the possible input ranges and ideal transition voitages. End-point errors can be adjusted in all ranges. 12 Table 3. Input Ranges and Ideal Digital Output Codes ANALOG INPUT VOLTAGE (Volts) plait aL Joto+10V |Oto+20v| +5v | +10v | MsB LSB +10.0000 | +20.0000 | +5.0000 | + 10.0000 | 11111114 1111 | +9.9963 | +19.9927 , +4.9963 | +9.9927 ]1111 1111 1110" +5.0012 | +10.0024 | +0.0012] +0.0024 1000 0000 0000" +4.9988 | +9.9976 | -0.0012 | -0.0024 Jo1ti 1111 1111" +4.9963 | +9.9927 | -0.0037 | -0.0073 [0111 1111 1110" +0.0012 | +0.0024 | -4.9988 | -9.9976 |0000 0000 0000" 0.0000 | 0.0000 | -.0000 | -10.0000 | 0000 0000 a000 Note 1. For unipolar input ranges, outoutcoding is straight binary Note 2: For bipolar input ranges, output coding is offset binary. Note 3: For OV to +10V or 5V ranges, 1LSB = 2.44mV Note 4: For OV to +20V or t10V ranges, 1LSB = 4.88mV. * The digital outputs will be flickering between the indicated code and the indicated code plus one. Unipolar input Operation The unipolar transfer function and input connections are shown in Figures 12 and 13. Because all internal resistors of the MAX174/MX574A/ MX674A are trimmed for absolute calibration, additional trimming is not necessary for most applications. The absolute accuracy for each grade is given in the specifi- cation tables. If the offset trim is not needed, BIPOFF can be tied directly to AGND. The two resistors and trimmer for BIPOFF can then be discarded. A50Q +1% metal film resistor should be attached between REFOUT and REFIN. MAXIIndustry Standard Complete For a OV to +10V input range, the analog input is con- nected between AGND and 10VIN. For a OV to +20V input range, the analog input is connected between AGND and 20Vin. These ADCs can easily handle an input signal beyond the supplies. If full-scale trim is not needed, the gain trimmer, R2, should be swapped with a 50Q resistor. Should a 10.24V input range be selected, a 200Q trimmer should be inserted in series with 10VIN. For a full-scale input range of 20.48V, use a 500Q trimmer in series with 20VIN. The nominal input impedance into TOVIN is 5kQ and 10kQ for 20VIN. 12-Bit A/D Converters Offset and Full-Scale Adjustment In applications where the offset and full-scale range have to be adjusted, use the circuit shown in Figure 12. The offset should be adjusted first. Apply 1/2LSB at the analog input and adjust R1 until the digital output code flickers between 0000 0000 0000 and 0000 0000 0001. To adjust the full-scale range, apply FS - 3/2LSB at the analog input and adjust R2 until the output code changes between 1111 11111110 and 11111111 1111. OUTPUT CODE W111 FS - 4096 LSBs 441111111110 | 1114-1111 1101 | 1 a OUTPUT CODE FS = 4069 LSBs t 1000 0900 0001 - vd attd ttt 1000 0900 0000 . 4141 1141 1110 FULL-SCALE oat TRANSITION 4444 1141 1101 011111111410 - a 0000 0000 0011 0000 0000 0011 J 0000 0000 votD | ; 0000 0000 0010 000 dono 0001 | ;- 0000 6000 0901 0000 coca o000 | | I 0000 0000 G00 whe FL OR Wg 0 1 2 8 FS FS _fS 8,5 2 1 0 16, FS 87 sy! ANALOG INPUT VOLTAGE IN LSBs ANALOGINPUTVOLTAGEIN LSBs * Figure 12. Ideal Unipolar Transfer Function Figure 14. Ideal Bipolar Transfer Function MAAXIAA MAAXIAA MAX174* Gan MAX174* GAIN MX574A Rs MX574A Ro MX674A MX674A REFOUT REFIN 1002 10082 neetont REFIN REFOUT 100ks2 { OFFSET -H aiorr BIPOFF 100k82 tno Rt = 10062 Ri | FESET 12V 10 -15V i ___ tov anacog | OY S000 anatos [ YP " INPUTS INPUTS || gy . 1 20 LOV to +20V 20ViN + IN - tT AGND ADDITIONAL PINS OMITTED FOR CLARITY ADDITIONAL PINS OMITTED FOR CLARITY Figure 13. Unipolar Input Connections MIAXAKIS/VI Figure 15. Bipolar input Connections 13 VVLOXW/VPLSXW/PLIXVWMAX174/MX574A/MX674A Industry Standard Complete 12-Bit A/D Converters Bipolar Input Operation The Bipolar transfer function is shown in Figure 14, and input connections are shown in Figure 15. One or both of the trimmers can be exchanged with a 50Q +1% fixed resistor if the offset and gain specifications suffice. Offset and Full-Scale Adjustment To begin bipolar calibration, a signal 1/2LSB above nega- tive full-scale is applied. R1 is trimmed until the digital output flickers between 0000 0000 0000 and 0000 0000 0001. Next, a signal 3/2LSB below positive full scale is applied. Then, R2 is trimmed until the output flickers between 1111 1111 1110 and 1111 1111 1111. Ordering Information (continued) PART PIN-PACKAGE SBS Y enc) PART PIN-PACKAGE SBS) Y rane | 8us Maximum Conversion Time 15s Maximum Conversion Time TEMP. RANGE: -40C to +85C TEMP. RANGE: -55C to +125C MAXI74AEPI 28 Plastic DIP 1/2 19 MX674ASD 28 Ceramic SB 1 50 MAXI74BEP] 28 Plastic DIP 1/2 38 MX674ATD 28 Ceramic SB 34405 MAX174CEPI 28 Plastic DIP 1 75 MX674AUD 28 Ceramic SB 3/4 12 MAX174AEWI 28 Wide SO 1/2 19 25s Maximum Conversion Time _ MAXI74BEWI 28 Wide SO 1/2 38 TEMP. RANGE: 0C to +70C a MAXI74CEW! 28 Wide SO 1 75 MX574AJN 28 Plastic DIP 1 50 TEMP. RANGE: -55C to +125C MX574AKN 28 Plastic DIP 1/2 7 MAXI74AMJl 28 CERDIP 3/4 12 MX574ALN 28 Plastic DIP 12 10 MAX174BMJI 28 CERDIP 3/4 25 MXS74ACWL = 28WideSOtisdT:*Ci*s 50 MAXI74CMJ| 28 CERDIP 1 50 MX574AKCW! 28 Wide SO 172 27 15us Maximum Conversion Time MX574ALCWI - 28 Wide SO 1/2 10 TEMP. RANGE: 0C to +70C MX574AJP 28 PLCC 1 50 MX674AJN 28 Plastic DIP 1 50 MX574AKP 28 PLCC 1/2 27 | MX674AKN _28 Plastic DIP 1/2 27 MX574ALP 28PLCC 1/2 10 MX674ALN 28 Plastic DIP 1/2 10 MX574AK/D Dice** 12 _ MX674AJCWI 28 Wide SO 1 50 TEMP. RANGE: -40C to +85C MX674AKCWI 28 Wide SO 1/2 27 MX574AJEPI 28 Plastic DIP 1 75 MX674ALCWI 28 Wide SO 1/2 10 | MXS74AKEPI 28 Plastic DIP 1/2 38 MX674AK/D Dice 1/2 - MXS74ALEP| _-28 Plastic DIP 1/2 19 TEMP. RANGE: -40C to +85C MX574AJEWl 28 Wide SO 1 rn MX674AJEPI 28 Plastic DIP 1 75 MX574AKEWI 28 Wide SO 1/2 38 MX674AKEPI 28 Plastic DIP 1/2 38 MX574ALEW! 28 Wide SO 1/2 19 MX674ALEP] 28 Plastic DIP 1/2 19 | TEMP. RANGE: -55C to +125C MX674AJEWI 28 Wide SO 1 75 MX5744SQ__ 28 CERDIP 1 an) MX674AKEWI 28 Wide SO 1/2 38 MX574ATQ 28 CERDIP* 3/4 25 MX674ALEW] 28 Wide SO 1/2 19 MX574AUQ 28 CERDIP* 3/4 12 TEMP. RANGE: -55C to +125C MX574ASD 28 Ceramic SB 1 60 MX674ASQ 28 CERDIP* 1 50 MX574ATD 28 Ceramic SB 3/4 25 MX674ATQ 28 CERDIP* 3/4 25 MX574AUD 28 Ceramic SB 3/4 12 MX674AUQ 28 CERDIP* 3/4 12 Maxim reserves the right to ship Ceramic SB in lieu of CERDIP . packages. * Consult factory for dice specifications. 14 MAKIVIPin Configurations (continued) TOP VIEW 2B 9 23 5 ae [a|3 2||a} fe 28 26 e ric |_ 125 | D9 CEL 6 24 | 08 vee [7 MAXIMA 23] 07 74 MAX174 23 REFOUT! 8 | MX5740 2 | 06 AGND [9 | MX6744 /21 | 05 REFIN | 10 | 20 | p4 Ver (11 | 19 | 03 aE PLCC MAXIMA Industry Standard Complete 12-Bit A/D Converters Chip Topography A0|12/8VL STS D11D10 el ESD one a 0.159" (4.039mm) AGND BIPOFF 10VIN | DGNDDO D1 0.144" (3.658mm) 15 VPLOXW/VPLSXW/bZiIXVN