1. General description
74AHC1G14 and 74AHCT1G14 are high-speed Si-gate CMOS devices. They provide an
inverting buffer function with Schmitt trigger action. These devices are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features
nSymmetrical output impedance
nHigh noise immunity
nESD protection:
uHBM JESD22-A114E: exceeds 2000 V
uMM JESD22-A115-A: exceeds 200 V
uCDM JESD22-C101C: exceeds 1000 V
nLow power dissipation
nBalanced propagation delays
nSOT353-1 and SOT753 package options
nSpecified from 40 °C to +125 °C
3. Applications
nWave and pulse shapers
nAstable multivibrators
nMonostable multivibrators
4. Ordering information
74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
Rev. 06 — 18 May 2009 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC1G14GW 40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm SOT353-1
74AHCT1G14GW
74AHC1G14GV 40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
74AHCT1G14GV
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 2 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
5. Marking
6. Functional diagram
7. Pinning information
7.1 Pinning
7.2 Pin description
Table 2. Marking codes
Type number Marking code
74AHC1G14GW AF
74AHCT1G14GW CF
74AHC1G14GV A14
74AHCT1G14GV C14
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna023
AY
2424
mna024 mna025
AY
Fig 4. Pin configuration
74AHC1G14
74AHCT1G14
n.c. VCC
A
GND Y
001aaf087
1
2
3
5
4
Table 3. Pin description
Symbol Pin Description
n.c. 1 not connected
A 2 data input
GND 3 ground (0 V)
Y 4 data output
VCC 5 supply voltage
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 3 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
8. Functional description
9. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For both TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
10. Recommended operating conditions
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level
Input Output
A Y
LH
HL
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V 20 - mA
IOK output clamping current VO < 0.5 V or VO>V
CC + 0.5 V [1] -±20 mA
IOoutput current 0.5 V < VO <V
CC + 0.5 V - ±25 mA
ICC supply current - 75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 °C
Ptot total power dissipation Tamb = 40 °C to +125 °C[2] - 250 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 74AHC1G14 74AHCT1G14 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
VIinput voltage 0 - 5.5 0 - 5.5 V
VOoutput voltage 0 - VCC 0-V
CC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 °C
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 4 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
11. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
For type 74AHC1G14
VOH HIGH-level
output voltage VI= VT+ or VT
IO=50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
IO=50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V
IO=8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage VI= VT+ or VT
IO= 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC = 5.5 V - - 1.0 - 10 - 40 µA
CIinput
capacitance - 1.5 10 - 10 - 10 pF
For type 74AHCT1G14
VOH HIGH-level
output voltage VI= VT+ or VT; VCC = 4.5 V
IO=50 µA 4.4 4.5 - 4.4 - 4.4 - V
IO=8.0 mA 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage VI= VT+ or VT; VCC = 4.5 V
IO= 50 µA - 0 0.1 - 0.1 - 0.1 V
IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC = 5.5 V - - 1.0 - 10 - 40 µA
ICC additional
supply current per input pin; VI= 3.4 V;
other inputs at VCC or GND;
IO= 0 A; VCC = 5.5 V
- - 1.35 - 1.5 - 1.5 mA
CIinput
capacitance - 1.5 10 - 10 - 10 pF
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 5 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
11.1 Transfer characteristics
Table 8. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). See Figure 7 and Figure 8.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
For type 74AHC1G14
VT+ positive-going
threshold
voltage
VCC = 3.0 V - - 2.2 - 2.2 - 2.2 V
VCC = 4.5 V - - 3.15 - 3.15 - 3.15 V
VCC = 5.5 V - - 3.85 - 3.85 - 3.85 V
VTnegative-going
threshold
voltage
VCC = 3.0 V 0.9 - - 0.9 - 0.9 - V
VCC = 4.5 V 1.35 - - 1.35 - 1.35 - V
VCC = 5.5 V 1.65 - - 1.65 - 1.65 - V
VHhysteresis
voltage VCC = 3.0 V 0.3 - 1.2 0.3 1.2 0.25 1.2 V
VCC = 4.5 V 0.4 - 1.4 0.4 1.4 0.35 1.4 V
VCC = 5.5 V 0.5 - 1.6 0.5 1.6 0.45 1.6 V
For type 74AHCT1G14
VT+ positive-going
threshold
voltage
VCC = 4.5 V - - 2.0 - 2.0 - 2.0 V
VCC = 5.5 V - - 2.0 - 2.0 - 2.0 V
VTnegative-going
threshold
voltage
VCC = 4.5 V 0.5 - - 0.5 - 0.5 - V
VCC = 5.5 V 0.6 - - 0.6 - 0.6 - V
VHhysteresis
voltage VCC = 4.5 V 0.4 - 1.4 0.4 1.4 0.35 1.4 V
VCC = 5.5 V 0.4 - 1.6 0.4 1.6 0.35 1.6 V
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 6 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
12. Dynamic characteristics
[1] tpd is the same as tPLH and tPHL.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD(µW).
PD=C
PD ×VCC2×fi+(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts.
Table 9. Dynamic characteristics
GND = 0 V; t
r
= t
f
3.0 ns. For waveform see Figure 5. For test circuit see Figure 6.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
For type 74AHC1G14
tpd propagation
delay A to Y; [1]
VCC = 3.0 V to 3.6 V [2]
CL= 15 pF - 4.2 12.8 1.0 15.0 1.0 16.5 ns
CL= 50 pF - 6.0 16.3 1.0 18.5 1.0 20.5 ns
VCC = 4.5 V to 5.5 V [3]
CL= 15 pF - 3.2 8.6 1.0 10.0 1.0 11.0 ns
CL= 50 pF - 4.6 10.6 1.0 12.0 1.0 13.5 ns
CPD power
dissipation
capacitance
per buffer;
CL=50pF;f=1 MHz;
VI= GND to VCC
[4] -12- - - - - pF
For type 74AHCT1G14
tpd propagation
delay A to Y;
VCC = 4.5 V to 5.5 V [1]
[3]
CL= 15 pF - 4.1 7.0 1.0 8.0 1.0 9.0 ns
CL= 50 pF - 5.9 8.5 1.0 10.0 1.0 11.0 ns
CPD power
dissipation
capacitance
per buffer;
VI= GND to VCC
[4] -13- - - - - pF
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 7 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
13. Waveforms
13.1 Transfer characteristic waveforms
The test data is given in Table 10 Test data is given in Table 9.
Definitions for test circuit:
CL = Load capacitance.
RT = Termination resistance should be equal to output
impedance Zo of the pulse generator.
Fig 5. The input (A) to output (Y) propagation delays Fig 6. Load circuitry for switching times
mna033
A input
Y output
tPHL tPLH
VM
VM
mna101
VCC
VIVO
RTCL
PULSE
GENERATOR DUT
Table 10. Test data
Type number Input Output
VIVMVM
74AHC1G14 GND to VCC 0.5 ×VCC 0.5 ×VCC
74AHCT1G14 GND to 3.0 V 1.5 V 0.5 ×VCC
Fig 7. Transfer characteristic Fig 8. The definitions of VT+, VT and VH
mna026
VO
VHVI
VTVT+
mna027
VO
VIVH
VT+
VT
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 8 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
Fig 9. Typical 74AHC1G14 transfer characteristics;
VCC = 3.0 V Fig 10. Typical 74AHC1G14 transfer characteristics;
VCC = 4.5 V
001 3
1.5
0.5
1
mna401
2VI (V)
ICC
(mA)
05
VI (V)
ICC
(mA)
5
0
1
mna402
2
3
4
1234
Fig 11. Typical 74AHC1G14 transfer characteristics; VCC = 5.5 V
02 6
8
0
2
4
6
mna403
4VI (V)
ICC
(mA)
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 9 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
14. Application information
The slow input rise and fall times cause additional power dissipation, which can be
calculated using the following formula:
Padd =f
i×(tr×∆ICC(AV) +t
f×∆ICC(AV))×VCC where:
Padd = additional power dissipation (µW);
fi= input frequency (MHz);
tr= input rise time (ns); 10 % to 90 %;
tf= input fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (µA).
Average additional ICC differs with positive or negative input transitions, as shown in
Figure 14 and Figure 15.
For 74AHC1G14 and 74AHCT1G14 used in relaxation oscillator circuit, see Figure 16.
Note to the application information:
1. All values given are typical unless otherwise specified.
Fig 12. Typical 74AHCT1G14 transfer characteristics;
VCC = 4.5 V Fig 13. Typical 74AHCT1G14 transfer characteristics;
VCC = 5.5 V
05
VI (V)
ICC
(mA)
5
0
1
mna404
2
3
4
1234 02 6
8
0
2
4
6
mna405
4VI (V)
ICC
(mA)
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 10 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
Fig 14. Average additional ICC for 74AHC1G14 Schmitt
trigger devices; linear change of VI between
0.1VCC to 0.9VCC
Fig 15. Average additional ICC for 74AHCT1G14
Schmitt trigger devices; linear change of VI
between 0.1VCC to 0.9VCC
mna036
0 2.0 4.0 6.0
VCC (V)
200
150
50
0
100
ICC(AV)
(µA)
positive-going
edge
negative-going
edge
mna058
0462VCC (V)
200
100
50
150
0
ICC(AV)
(µA)
positive-going
edge
negative-going
edge
For 74AHC1G14:
For 74AHCT1G14:
Fig 16. Relaxation oscillator using the 74AHC1G14 and 74AHCT1G14
mna035
R
C
f1
T
--- 1
0.55 RC×
-------------------------
=
f1
T
--- 1
0.60 RC×
-------------------------
=
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 11 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
15. Package outline
Fig 17. Package outline SOT353-1 (TSSOP5)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(1) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.1
01.0
0.8 0.30
0.15 0.25
0.08 2.25
1.85 1.35
1.15 0.65
e1
1.3 2.25
2.0 0.60
0.15 7°
0°
0.1 0.10.30.425
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.46
0.21
SOT353-1 MO-203 SC-88A 00-09-01
03-02-19
wM
bp
D
Z
e
e1
0.15
13
54
θ
A
A2
A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
1.5 3 mm0
scale
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1
1.1
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 12 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
Fig 18. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT753
UNIT A1bpcDEHELpQywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 13 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
16. Abbreviations
17. Revision history
Table 11. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AHC_AHCT1G14_6 20090518 Product data sheet - 74AHC_AHCT1G14_5
Modifications: Table 7: the conditions for HIGH-level output voltage and LOW-level output voltage have
been changed.
74AHC_AHCT1G14_5 20070629 Product data sheet - 74AHC_AHCT1G14_4
74AHC_AHCT1G14_4 20020528 Product specification - 74AHC_AHCT1G14_3
74AHC_AHCT1G14_3 20020218 Product specification - 74AHC_AHCT1G14_2
74AHC_AHCT1G14_2 20010222 Product specification - 74AHC_AHCT1G14_1
74AHC_AHCT1G14_1 19990805 Product specification - -
74AHC_AHCT1G14_6 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 06 — 18 May 2009 14 of 15
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
18.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74AHC1G14; 74AHCT1G14
Inverting Schmitt trigger
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 May 2009
Document identifier: 74AHC_AHCT1G14_6
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
5 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
7 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
8 Functional description . . . . . . . . . . . . . . . . . . . 3
9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
10 Recommended operating conditions. . . . . . . . 3
11 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
11.1 Transfer characteristics. . . . . . . . . . . . . . . . . . . 5
12 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
13.1 Transfer characteristic waveforms. . . . . . . . . . . 7
14 Application information. . . . . . . . . . . . . . . . . . . 9
15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
18.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
18.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
18.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
19 Contact information. . . . . . . . . . . . . . . . . . . . . 14
20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15