AS1353, AS1356
Linear Low-Dropout 150mA Voltage Regulators
www.austriamicrosystems.com Revision 1.03 1 - 13
Data Sheet
1 General Description
The AS1353/AS1356 are hig h-performance, fixed-volt-
age linear LDOs designed for use with capacitors of 1 to
10µF. The devices can deliver superior performance
even under low dropout conditions when the power tran-
sistor operates in linear mode.
The integrated P-channel MOSFET output allows the
devices to maintain a low supply-current at loads of up
to150mA. A shutdown mode includes logic-control led
circuitry which reduces shutdown current to less than
1µA (max).
Integrated over-temperature and over-current protec-
tion circuitry switches the devices off in case of thermal
overload or output short-circuit conditions.
The AS1353/AS1356 are optimize d for low equivalent-
series resistance (ESR) output capacitors. Additionally,
all devices contain reversed battery protection which dis-
connects the internal circuitry and parasitic diodes if the
battery is connected incorrectly.
The AS1356 also features power-OK circuitry which can
be used to monitor output regulation.
All devices also feature an integrated error amplifier and
built-in 1.25V reference, and ou tput current is limited
(380mA typ) via the on-chip current limiting circuitry.
Multiple output voltages are available as standard prod-
ucts: 3.6, 3.3, 3.0, 2.7, 2.5, or 1.5V. All devices are avail-
able in a 5-pin SOT23 package.
Figure 1. Pinout and Application Diagrams
2 Key Features
! Ultra-Low Dropout Voltage: 40mV @ 100mA load
! Output Voltage Range: +1.5 to +3.6V (100mV steps)
! Max Output Current: 150mA
! Output Voltage Accuracy: ±1%
! Low Shutdown Current: 1µA
! High PSRR: 60dB at 100Hz
! Integrated Overtemper ature/Overcurrent Protection
! Reverse-Battery Protection (AS1353/AS1356)
! Power-OK Output (AS1356)
! Minimal External Components Required
! Operating Tempera ture Range: -40 to +85°C
! 5-pin SOT23 Package
3 Applications
The devices are ideal for powering cordless and mobile
phones, MP3 players, CD and DVD players, PDAs,
handheld computers, digital cameras, and any other
hand-held and/or battery-powered device.
AS1356
SHDNM
IN OUT
POK
CIN
1µF
+2.5 to
+5.5V COUT
1µF
100kΩ
On
Off
Preset Output
1.5 to 3.6V,
150mA
To Micro-
processor
AS1353
BP
CBP
0.01µF
SHDNM
IN OUT
CIN
1µF
+2.5 to
+5.5V COUT
1µF
On
Off
Preset Output
1.5 to 3.6V,
150mA
GND
AS1353
3BP
2
15
4
OUT
GND
SHDNM
IN
GND
AS1356
3POK
2
15
4
OUT
GND
SHDNM
IN
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AS1353/AS1356
Data Sheet - Pinout
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
Pin Descriptions
Table 1. AS1353 Pin Descriptions
Pin Number Pin Name Description
1IN
LDO Input. Supp ly voltage can range from 2.5 to 5.5V. Bypass with a 1µF
capacitor to GND (see Capacitor Selection and Regulator Stability on page 10).
2 GND Ground. This pin also functions as a heat sink. Solder to a large pad or the
circuit-board ground plane to maximize power dissipation.
3 SHDNM Active-Low Shutdown Input. A logic low reduces the supply current to < 1µA.
Note: Connect to IN for normal ope ration.
4 BP Reference-Noise Bypass. Bypass with a low-leakage, 0.01µF ceramic
capacitor for reduced noise at the output.
5 OUT LDO Output. Fixed 1.5, 2.5, 2.7, 3.0, 3.3, and 3.6V output. Sourc es up to
150mA.
Table 2. AS1356 Pin Descriptions
Pin Number Pin Name Description
1IN
LDO Input. Input voltage can range from 2.5 to 5.5V. Bypass with 1µF to GND
(see Capacitor Selection and Regulator Stability on page 10).
2GND
Ground. This pin also functions as a heat sink. Solder to a large pad or the
circuit-board ground plane to maximize power dissipation.
3 SHDNM Active-Low Shutdown Input. A logic low reduces the supply current to < 1µA.
Note: Connect to pin IN for normal operation.
4POK
Power-OK Output. Active-low , open-drain output indicates an out-of-regulation
condition. Connect a 100kΩ pull-up resist or to pi n OUT for logic levels.
Note: Leave this pin unconnected if the power-OK feature is not used.
5OUT
LDO Output. Fixed 1.5, 2.5, 2.7, 3.0, 3.3, and 3.6V output. Sourc es up to
150mA.
3POK
2
15
4
OUT
GND
SHDNM
IN
3BP
2
15
4
OUT
GND
SHDNM
IN
AS1356
AS1353
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AS1353/AS1356
Data Sheet - Absolute Maximum Ratings
5 Absolute Maximum Ratings
Stresses beyond those li st ed in Table 3 ma y cau s e pe rmanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any othe r conditions beyond those indicated in Section 6 Electrical
Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 3. Absolute Maximum Ratings
Parameter Min Max Typ Units Comments
IN, SHDNM to GND -7 +7 V
SHDNM to IN -7 +0.3 V
POK, BP, OUT to GND -0.3 VIN +
+0.3 V
Output Short-Circuit Duration Indefinite V
Continuous Power Dissipation
(TAMB = +70ºC) 571 mW Derate 7.1mW/ºC above +70ºC
Operating Temperature Range -40 +85 ºC
Junction Temperature +150 ºC Internally limited
ΘJA +140 ºC/W
Storage Temperature Range -65 +150 ºC
Package Body Temperature +260 ºC
The reflow peak soldering te mp erature
(body temperature) specified is in
accordance with IPC/JEDEC J-STD-020C
“Moisture/Reflow Sensitivity Classification
for non-hermetic Solid State Surface
Mount Devices”
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AS1353/AS1356
Data Sheet - Electrical Characteristics
6 Electrical Characteristics
(VIN = VOUT(Nominal) + 1V, SHDNM = IN, TAMB = -40 to +85ºC (unless otherwise specified). T ypical values are at T AMB =
+25ºC. Limits are 100% production tested at TAMB = +25ºC.
Table 4. Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit
VIN Input Voltage 2.5 5.5 V
Output V oltage Accuracy TAMB = +25ºC, IOUT = 100µA -1 1 %
TAMB = -40 to +85ºC, IOUT = 100µA to 150mA - 3 3
IOUT Maximum Output Current 150 mA
ILIM Current Limit 160 380 mA
IQGround Pin C urr ent IOUT = 100µA 70 180 µA
IOUT = 150mA 115
VIN -VOUT Dropout Voltage 1
IOUT = 100µA 0.05
mV
IOUT = 50mA 20
IOUT = 100mA 40 100
IOUT = 150mA 60
ΔVLNR Line Regulation
VIN = 2.5V or (VOUT + 0.1) to 4.5V,
IOUT = 1mA -0.2 0 0.2 %/V
VIN = 2.5V or (VOUT + 0.1) to 5.5V,
IOUT = 1mA -0.8 0 0.8
ΔVLDR Load Regulation IOUT = 100µA to 150mA, COUT = 1µF 0.001 0.02 %/mA
en Output Voltage Noise
COUT = 1µF,
f = 10Hz to 100kHz,
CBP = 0.01µF AS1353 30 µVRMS
COUT = 1µF,
f = 10Hz to 100kHz AS1356 110
PSRR Output Voltage AC
Power-Supply Rejection
Ratio f = 100Hz, COUT = 1µF,
(CBP = 0.01µF, AS1353) 60 dB
Shutdown 2
tON Exit Delay from
Shutdown 3,4CBP = 0.01µF, no load
(AS1353) 30 150 µs
IOFF Shutdown Supply
Current SHDNM = GND TAMB = +25ºC 0.01 1 µA
TAMB = +85ºC 0.04
VIH SHDNM Input Threshold VIN = 2.5 to 5.5V 2.0 V
VIL 0.4
ISHDNM SHDNM Input Bias
Current SHDNM = IN or GND TAMB = +25ºC 0.03 100 nA
TAMB = +85ºC 0.2
Power-OK Output (AS1356 o nly)
VPOK Power-OK Voltage
Threshold IOUT = 0, VOUTFALLING 92 95 97 %
VOUT
Hysteresis, IOUT = 0 1
VOL POK Output Voltage Low ISINK = 1mA 0.4 V
POK Output Leakage
Current 0 VPOK 5.5V, VOUT in regulation 1 µA
Thermal Protection
TSHDNM Thermal Shutdown
Temperature AS1353 150 ºC
AS1356 165
ΔTSHDNM Thermal Shutdown
Hysteresis AS1353 15 ºC
AS1356 20 ºC
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AS1353/AS1356
Data Sheet - Electrical Characteristics
1. Dropout voltage = VIN - VOUT when VOUT is 100mV < VOUT for VIN = VOUT +0.5V (applies only to output volt ages
2.5V).
2. The rise and fall time of the shutdown signal must not exceed 1ms.
3. The delay time is defined as time required to set VOUT to 95% of its final value.
4. Guaranteed by design.
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AS1353/AS1356
Data Sheet - Typical Operating Characteristics
7 Typical Operating Characteristics
VOUT = +3.0V, VIN = +3.6V, CIN = COUT = 1µF, SHDNM = IN, TAMB = +25ºC (unless otherwise specified)
Figure 3. Ground Pin Current vs. Input Voltage Figure 4. Ground Pin Current vs. Output Load
Figure 5. Ground Pin Current vs. Temperature Figure 6. Output Vol tage vs. Input Voltage
Figure 7. Output Voltage vs. Output Load Figure 8. Output Voltage vs. Temperature
0
20
40
60
80
100
120
140
0123456
Input Voltage (V)
Ground P in Cur r ent ( µA) .
60
70
80
90
100
110
120
0 25 50 75 100 125 150
Out put Load (mA)
Ground P in Cur r ent ( µA) .
IOUT = 0mA
IOUT = 150mA
VIN = 3.5V
VIN = 5V
60
70
80
90
100
110
120
130
-40-200 20406080100
Temper atur e ( °C)
Ground P in Cur r ent ( µA) .
VIN = 3.6V , IOUT = 150mA
VIN = 5V, IOUT = 150mA
VIN = 3.6V, IOUT = 0mA
VIN = 5V, IOUT = 0mA 0
0.5
1
1.5
2
2.5
3
3.5
0123456
I nput Voltage (V)
Out put V oltage (V ) .
IOUT = 0mA
IOUT = 150mA
2.9
2.95
3
3.05
3.1
0 25 50 75 100 125 150
O utput Load ( mA)
Out put V oltage (V ) .
VIN = 5V
VIN = 3.6V
2.98
2.99
3
3.01
3.02
3.03
3.04
-40 -20 0 20 40 60 80 100
T emperature ( ° C)
Out put V oltage (V ) .
VIN = 5V, IOUT = 150mA
VIN = 3.6V, IOUT = 0mA
VIN = 3.6V , IOUT = 0mA
VIN = 3.6V,
IOUT = 150mA
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AS1353/AS1356
Data Sheet - Typical Operating Characteristics
Figure 9. Dropout Voltage vs. Output Load Figure 10. PSRR vs. Frequency
Figure 11. Line Transient Response; IOUT = 50mA
0
25
50
75
100
125
150
0 25 50 75 100 125 150
Out put Load (mA)
Dropout V oltage (V) .
-45°C
+85°C
+25°C
0
10
20
30
40
50
60
70
80
10 100 1000 10000 100000
F requency (Hz)
PSRR (dB ) .
10ms/Div
VIN
20mV/Div 4V 5V
VOUT
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AS1353/AS1356
Data Sheet - Detailed Description
8 Detailed Description
The AS1353/AS1356 are low-dropout, low-quiescent-current linear regulators intended for LDO regulator applications
where output current load requirements range from no load to 150mA. All devices come standard with fixed output volt-
ages of 1.5 to 3.6V (see Ordering Information on page 12).
Figure 12. Block Diagram
As illustrated in Figure 12, the devices comprise a 1.25V reference, error amplifier, P-channel MOSFET pass transis-
tor, power-OK comparator, internal feedback voltage divider , current limiter, reverse-battery protection, thermal sensor
and shutdown logic.
The 1.25V bandgap refe rence is connected to the inverting inp ut of the error amplifier. The error amplifier compares
this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the refer-
ence voltage, the P-channel MOSFET gate is pulled lower, allowing more current to pass to the output, and increases
the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to
pass to the output. The output voltage feeds back through an internal resistor voltage divider connected to pin OUT.
Output Voltages
Standard products are factory-set with output voltages of from 1.5 to 3.6V. A two-digit suffix of the part number identi-
fies the nominal output voltage (see Ordering Information on page 12).
Non-standard devices are available. Contact austriamicrosystems AG for more information.
Internal P-Channel MOSFET Pass Transistor
The integrated 0.5Ω (typ) P-channel MOSFET pass transistor requires no base drive, which reduces quiescent current
significantly, and does not exhibit the problems associated with PNP-based regulators, such as dropout when the pass
transistor saturates or high base-drive currents under large load conditions.
The devices consume only 115µA quiescent current in dropout, light-load, or heavy-load applications (see Typical
Operating Characteristics on page 6).
Power-OK
The AS1356’s power-ok circuitry is built around an N-channel MOSFET. The circuitry monitors th e voltage on pin 5
(OUT) and if the voltage goes out of regulation (e.g. during dropout, current limit, or thermal shutdown) pin POK goes
low.
SHDNM
AS1353/AS1356
IN
+
GND
Reverse-
Battery
Protection
OUT
+
-
POK 2
Error
Amplifier
Thermal
Overload
Protection
Bandgap Voltage
&
Current Reference
95%
Shutdown/
Power-On
Control Logic
Trimmable
Reference
Voltage
R2
R1
BP 1
1 AS1353 only
2 AS1356 only
AS1356 only
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AS1353/AS1356
Data Sheet - Detailed Description
The power-OK feature is not active during shutdown and pr ovides a power-on-reset (POR) function that can operate
down to VIN = 1V. A capacitor to GND may be added to generate a POR delay.
To obtain a logic-level output, conne ct a pull-up resistor from pin POK to pin OUT. Larger values for this resistor will
help minimize current consumption; a 100kΩ resistor is perfect for most applications (see Figure 13).
Reverse-Battery Protection
The AS1353/AS1356 contain integrated reverse-battery protection circuitry which monitors the polarity of pins IN and
SHDNM and disconnects the internal circuitry and parasitic diodes if the battery is connected incorrectly. Reverse sup-
ply current is limited to 1mA if VIN = VSHDNM falls below ground. Load current is also limited when VIN or VSHDNM are
reverse biased with respect to ground.
Current Limiting
The AS1353/AS1356 include current limiting circuitry to protect against short-circuit conditions. The circuitry monitors
and controls the gate voltage of the P-channel MOSFET, limiting the output current to 380mA (typ). The P-channel
MOSFET output can be shorted to ground for an indefinite period of time without damaging the device.
Noise Reduction
The AS1353 uses an external 0.01µF bypass capacitor (CBP) at pin BP to reduce output noise. An internal pre-charge
circuit is used to reduce start-up time.
The use of CBP > 0.01µF improves noise performances but increases start-up time.
Thermal-Overload Protection
The devices are protected against thermal runaway conditions by the integrated thermal sensor circuitry. Thermal
shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the
device.
If the junction temperature excee ds 165ºC (typ, AS1356) or 150ºC (typ, AS1353), the thermal sensor starts the shut-
down logic, at which point the P-channel MOSFET is switched off. After the device temperature has dropped by
approximately 20ºC, the thermal sensor will turn the P-channel MOSFET on again. Note that this will be exhibited as a
pulsed output under continu ous thermal-overload conditions.
Note: The absolute maximum junction-temperature rating of +150ºC should not be exceedin g during continual oper-
ation.
Operating Region and Power Dissipation
Maximum power dissipation is determined by the thermal resistance of the case and circuit board, the temperature dif-
ference between the die junction and ambient air, and the rate of air flow. Th e power dissipation of the device is calcu-
lated by:
P = IOUT (VIN - VOUT)(EQ 1)
Maximum power dissipation is calculated by:
PMAX = (TJ - TAMB) / (
Θ
JB +
Θ
JA)(EQ 2)
Where:
TJ - TAMB is the temperature difference between the device die junction and the surround ing air.
Θ
JB or
Θ
JC is the thermal resistance of the package.
Θ
JA is the thermal resistance through the printed circuit board, copper traces, and other materials to the surrounding
air.
Note: Pin GND is a multi-function pin providing a connection to the system ground and acting as a heat sink. This pin
should be connected to the system ground using a large pad or ground plane.
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AS1353/AS1356
Data Sheet - Typic al Application
9 Typical Application
Figure 13. Typical Application Diagrams
Capacitor Selection and Regulator Stability
Ceramic capacitors are highly recommended as they offer distinct advantages over their tantalum and aluminum elec -
trolytic components.
For stable operation with load currents up to 150mA over the entire device temperature range, use a 1µF (min)
ceramic output capacitor with an ESR <0.2 Ω.
Use large output capacitor values (10µF max) to reduce noise and improve load transient-response, stability and
power-supply rejection.
Note: Some ceramic capacitors exhibit large capacitance and ESR variations with variations in temperature. Z5U
and Y5V capacitors may be required to ensure stability at temperatures below TAMB = -10ºC. With X7R or X5R
capacitors, a 1µF capacitor should be sufficient at all operating temperatures.
Power Supply Rejection Ratio
The AS1353/AS1356 are designed to deliver low dropout voltages and low quiescent currents. Power-supply rejection
is 60dB (typ) at low frequencies. To improve power supply-noise rejection and transient response, increase the values
of the input and output bypass capacitors (see Figure 13).
The Typical Operating Characteristics (page 6) show the device line- and load-transient responses. See the Power-
Supply Rejection Ratio vs. Frequency graph in the Typical Operating Characteristics sectio n (page 6) for further
details.
Dropout Voltage
For standard products with output voltage greater than the minimum VIN (2.5V), the minimum input-output voltage dif-
ferential (dropout voltage) determines the lowest usable supply voltage. This determines the useful end-of-life battery
voltage in battery-powered systems.
The dropout voltage is a function of the P-MOSFET drain-to-source on-resistance multiplied by the load current, and is
calculated by:
VDROPOUT = VIN - VOUT = RDS(ON) x IOUT (EQ 3)
Where:
RDS(ON) is the drain-to-source on-resistance.
IOUT is the supply current.
See Typical Operating Characteristics (page 6) for further information.
AS1356
SHDNM
IN OUT
POK
CIN
1µF
+2.5 to
+5.5V COUT
1µF
100kΩ
On
Off
Preset Output
1.5 to 3.6V,
150mA
To Micro-
processor
AS1353
BP
CBP
0.01µF
SHDNM
IN OUT
CIN
1µF
+2.5 to
+5.5V COUT
1µF
On
Off
Preset Output
1.5 to 3.6V,
150mA
GNDGND
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AS1353/AS1356
Data Sheet - Package Drawings and Markings
10 Package Drawings and Markings
The AS1353/AS1356 are available in a 5-pin SOT23 package.
Figure 14. 5-pin SOT23 Package
Symbol Min Max
A0.901.45
A1 0.00 0.15
A2 0.90 1.30
b0.300.50
C0.090.20
D2.803.05
E2.603.00
E1 1.50 1.75
L0.300.55
e 0.95 REF
e1 1.90 REF
α
Notes:
1. All dimensions in millimeters.
2. Foot length measured at intercept point between datum A and lead
surface.
3. Package outline exclusive of mold flas h and metal burr.
4. Package outline inclusive of solder plating.
5. Complies with EIAJ SC74.
6. PKG ST 0003 Rev A supersedes SOT23-D-2005 Rev C.
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AS1353/AS1356
Data Sheet - Ordering Information
11 Ordering Information
The devices are available as the following standard products.
Non-standard versions are available with a minimum order of 30,000 units. Contact austriamicrosystems for availability
of non-standard versions.
Type Marking Description Delivery Form Package
AS1353-15-T ASD8 LDO 150mA, Reverse-Battery Protection, 1.5V Tape and Reel 5-p in SOT 23
AS1353-18-T ASD9 LDO 150mA, Reverse-Battery Protection, 1.8V Tape and Reel 5-p in SOT 23
AS1353-26-T ASHB LDO 150mA, Reverse-Battery Protection, 2.6V Tape and Reel 5-pin SOT23
AS1353-28-T ASHC LDO 150mA, Reverse-Battery Protection, 2.8V Tape and Reel 5-pin SOT23
AS1353-30-T ASHD LDO 150mA, Reverse-Battery Protection, 3.0V Tape and Reel 5-pin SOT23
AS1353-33-T ASHE LDO 150mA, Reverse-Battery Protection, 3.3V Tape and Reel 5-pin SOT23
AS1353-36-T ASI8 LDO 150mA, Reverse-Battery Protection, 3.6V Tape and Reel 5-pin SOT23
AS1356-27-T ASHM LDO 150mA, Reverse-Battery Protection,with
Power-OK, 2.7V Tape and Reel 5-pin SOT23
AS1356-33-T ASHO LDO 150mA, Reverse-Battery Protection,with
Power-OK, 3.3V Tape and Reel 5-pin SOT23
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AS1353/AS1356
Data Sheet
Copyrights
Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduce d, adapted, merged, trans-
lated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems A G makes no warranty , express, statutor y , implied, or by description regarding
the information set forth herein or regard i ng th e fre e do m of the described devices from patent infringement. austriami-
crosystems AG reserves the right to change specifications and prices at any time and withou t notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applicati ons requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-
sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
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personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech-
nical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Cont act Information
Headquarters
austriamicrosystems AG
A-8141 Schloss Premstaetten, Austria
Tel: +43 (0 ) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact