Rev. 1.1 June 2011 www.aosmd.com Page 1 of 16
AOZ1341
Dual Channel USB Switch
General Description
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise times and fall times to minimize
current surges during switching. The charge pump
requires no external components and allows operation
from supplies as low as 2.7 V.
The AOZ1341 is available in an Exposed Pad MSOP-8
or an SO8 8-pin package and is rated over the
-40 °C to +85 °C ambient temperature range.
Features
zTypical 70 mΩ (NFET)
z1 A maximum continuous current
zVIN Range: 2.7 V to 5.5 V
zOpen Drain Fault Flag
zFault Flag deglitched (blanking time)
zDischarge switch for shutdown
zThermal shutdown
zReverse current blocking
zPackages: Exposed Pad MSOP-8 and SO-8
Applications
zNotebook Computers
zDesktop Computers
Typical Application
AOZ1341
IN
OC1
EN2/EN2
OC2
EN1/EN1
OUT1
OUT2
GND
VIN
C4
0.1μF
C2
22μF
C3
0.1μF
Cx
R1
10kΩ
R2
10kΩ
C1
22μF
LOAD
LOAD
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 2 of 16
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
Pin Description
Part Number
Maximum
Continuous
Current
Typical
Short-circuit
Current Limit Enable Setting Package Environmental
AOZ1341AI
1 A 1.5 A
Active Low SO-8
Green Product
RoHS Compliant
AOZ1341AI-1 Active High
AOZ1341EI Active Low Exposed Pad
MSOP-8
AOZ1341EI-1 Active High
Pin Name Pin Number Pin Function
GND 1 Ground
IN 2 Input voltage
EN1/EN1 3 Enable input, logic high/logic low turns on power switch IN-OUT1
EN2/EN2 4 Enable input, logic high/logic low turns on power switch IN-OUT2
OC2 5 Overcurrent, open-drain output, active low, IN-OUT2
OUT2 6 Power-switch output, IN-OUT2
OUT1 7 Power-switch output, IN-OUT1
OC1 8 Overcurrent, open-drain output, active low, IN-OUT1
OC1
OUT1
OUT2
OC2
1
2
3
4
GND
IN
EN1/EN1
EN2/EN2
PAD
Exposed Pad MSOP-8
(Top View)
8
7
6
5
OC1
OUT1
OUT2
OC2
1
2
3
4
GND
IN
EN1/EN1
EN2/EN2
SO-8
(Top View)
8
7
6
5
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 3 of 16
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may da mage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model is a 100 pF capacitor discharging
through a 1.5 kΩ resistor.
Recommended Operating Conditions
The device is not guaranteed to operate beyon d the
Recommended Operating Conditions.
Parameter Rating
Input Voltage (VIN)6 V
Enable Voltage (VEN)6 V
Storage Temperature (TS) -55 °C to +150 °C
Maximum Continuous Current 1 A
ESD Rating(1) 2 kV
Parameter Rating
Input Voltage (VIN) +2.7 V to +5.5 V
Junction Temperature (TJ) -40 °C to +125 °C
Package Thermal Resistance
Exposed Pad MSOP-8 (ΘJA)
SO-8 (ΘJA)
60 °C/W
115 °C/W
Electrical Characteristics
TA = 25 °C, VIN = 5.5 V, VEN = 0 V, unless otherwise specified.
Symbol Parameter Conditions(3) Min. Typ. Max. Units
POWER SWITCH
RDS(ON) Switch On-Resistance VIN = 5.5 V, IO = 1 A 70 135 mΩ
trRise Time, Output VIN = 5.5 V CL = 1 μF, R L = 5 Ω0.6 1.5 ms
VIN = 2.7 V 0.4 1
tfFall time, output VIN = 5.5 V 0.05 0.5 ms
VIN = 2.7 V 0.05 0.5
FET Leakage Current Out connect to ground,
2.7 V ≤ VIN ≤ 5.5 V,
V(ENx) = VIN or V(ENx) = 0 V
-40 °C ≤ TJ ≤ 125 °C(2) 1μA
ENABLE INPUT EN
VIH High-level Input Voltage 2.7 V ≤ VIN ≤ 5.5 V 2.0 V
VIL Low-level Input Voltage 2.7 V ≤ VIN ≤ 5.5 V 0.8 V
IIInput Current -0.5 0.5 μA
ton Turn-on Time CL = 100 μF, R L = 5 Ω3ms
toff Turn-off Time CL = 100 μF, RL = 5 Ω10
CURRENT LIMIT
IOS Short-circuit Output
Current (per Channel)
V(IN) = 2.7 V to 5.5 V, OUT connected to GND,
device enable into short-circuit
1.1 1.5 1.9 A
IOC_TRIP Overcurrent Trip
Threshold (per Channel)
V(IN) = 5 V, current ramp (≤ 100 A/s) on OUT 1.0 1.6 2.0 A
SUPPLY CURRENT
Supply Current, Low-level
Output
No load on OUT,
2.7 V ≤ VIN ≤ 5.5 V,
V(ENx) = VIN or V(ENx) = 0 V
TJ = 25°C 0.5 1 μA
-40 °C ≤ TJ ≤ 125 °C(2) 0.5 5
Supply current, High-level
Output
No load on OUT,
V(ENx) = 0 V or V(ENx) = VIN
TJ = 25 °C 65 81 μA
-40 °C ≤ TJ ≤ 125 °C(2) 65 90
Reverse Leakage Current V(OUTx) = 5.5 V, IN = ground 0.2 μA
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 4 of 16
Note:
2. Parameters are guaranteed by design only and not production tested.
3. Pulse testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
UNDERVOLTAGE LOCKOUT
Low-level voltage, IN 2.0 2.5 V
Hysteresis, IN 200 mV
OVERCURRENT OC1 AND OC2
Output Low Voltage
VOL(OCx)
IO(OCx) = 5 mA 0.4 V
Off-state Current VO(OCx) = 5 V or 3.3 V 1 μA
OC_L Deglitch OCx assertion or deassertion 4 8 15 ms
THERMAL SHUTDOWN
Thermal Shutdown
Threshold
135 °C
Recovery from Thermal
Shutdown
105 °C
Hysteresis 30 °C
Electrical Characteristics (Continued)
TA = 25 °C, VIN = 5.5 V, VEN = 0 V, unless otherwise specified.
Symbol Parameter Conditions(3) Min. Typ. Max. Units
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 5 of 16
Functional Block Diagram
Deglitch
Deglitch
OC1
EN1/EN1
IN
EN2/EN2
OC2
OUT1
OUT2
Thermal
Shutdown
Thermal
Shutdown
Current
Limit
Gate Driver
Enable 1
Enable 2
Gate Driver
AOZ1341
Current
Limit
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 6 of 16
Functional Characteristics
Figure 1. Turn-Off Delay and Fall Time
with 1μF Load (Active Low)
Figure 2. Turn-On Delay and Rise Time
with 1μF Load (Active Low)
Figure 3. Turn-Off Delay and Fall Time
with 100μF Load (Active Low)
Figure 4. Turn-On Delay and Rise Time
with 100μF Load (Active Low)
Figure 5. Short-circuit Current, Device Enable
to Short Figure 6. 0.6Ω Load Connected to Vout
EN
5V/div
VOUT
2V/div
EN
5V/div
VOUT
2V/div
EN
5V/div
IOUT
1A/div
OC
2V/div
IOUT
500mA/div
EN
5V/div
VOUT
2V/div
EN
5V/div
VOUT
2V/div
200μs/div 200μs/div
500μs/div 500μs/div
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 7 of 16
Functional Characteristics (Continued)
Typical Characteristics
Figure 7. Inrush Current with Different Load Capacitance Figure 8. Short Circuit Current Limit
EN
2V/div
EN
2V/div
IOUT
500mA/div
1ms/div 20ms/div
IOUT
500mA/div
100μF
470μF
220μF
Figure 9. Supply Current, Output Enabled
vs. Junction Temperature
80
70
60
50
40
30
20
10
0
Junction Temperature (
°
C)
Supply Current (μA)
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
Figure 10. Supply Current, Output Disabled
vs. Junction Temperature
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
Junction Temperature (°C)
Supply Current (μA)
Figure 11. Rds(on) vs. Ambient Temperature
160
140
120
100
80
60
40
20
0
Ambient Temperature (°C)
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
Figure 12. UVLO Threshold vs. Junction Temperature
2.10
2.12
2.14
2.16
2.18
2.2
2.22
2.24
2.26
2.28
2.30
Junction Temperature (°C)
Threshold (V)
Rising
Falling
-50 0 50 100 150 -50 0 50 100 150
-50 0 50 100 150
-40 -20 0 20 40 60 80
Vin=2.7V
Vin=3.3V
Vin=5V
Vin=5.5V
Rdson (mΩ)
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 8 of 16
Typical Characteristics (Continued)
Figure 13. OCP Trip Current vs. Input Voltage
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
Vin (V)
OCP Trip Current (A)
2 345 6
Figure 14. Turn On Time vs Input Voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Input Voltage (V)
Turn On Time (ms)
2 345 6
C
L
= 100μF
R
L
= 5Ω
T
A
= 25°C
Figure 15. Turn Off Time vs Input Voltage
2.0
1.9
1.8
1.7
1.6
1.5
Input Voltage (V)
Turn Off Time (ms)
23456
C
L
= 100μF
R
L
= 5Ω
T
A
= 25°C
Figure 17. Fall Time vs Input Voltage
0.6
0.5
0.4
0.3
0.2
0.1
0
Input Voltage (V)
Fall Time (ms)
2 345 6
C
L
= 100μF
R
L
= 5Ω
T
A
= 25°C
Figure 16. Rise Time vs Input Voltage
0.6
0.5
0.4
0.3
0.2
0.1
0
Input Voltage (V)
Rise Time (ms)
2 345 6
C
L
= 100μF
R
L
= 5Ω
T
A
= 25°C
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 9 of 16
Detailed Description
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise and fall times to minimize current
surges during switching. The charge pump requires no
external components and allows operation from supplies
as low as 2.7 V.
Power Switch
The power switch is a N-channel MOSFET with a low
on-state resistance capable of delivering 1 A of
continuous current. Configured as a high-side switch,
the MOSFET will go into high impedance when disabled.
Thus, preventing current flow from OUT to IN and IN to
OUT.
Charge Pump
An internal charge pump supplies power to the circuits
and provides the necessary voltage to drive the gate of
the MOSFET beyond the source. The charge pump is
capable of operating down to a low voltage of 2.7 Volts.
Driver
The driver controls the voltage on the gate to the power
MOSFET switch. This is used to limit the large current
surges when the switch is being turned On and Off.
Proprietary circuitry controls the rise and fall time of the
output voltages.
Enable
The logic enable disables the power switch, charge
pump, gate driver, logic device, and other circuitry to
reduce the supply current. When the enable receives a
logic high the supply current is reduced to approximately
1 μA. The enable input is compatible with both TTL and
CMOS logic levels.
Over-current
The over-current open drain output is asserted
(active low) when an over-current condition occurs.
The output will remain asserted until the over-current
condition is removed. A 15 ms deglitch circuit prevents
the over-current from false triggering.
Thermal Shut-down Protection
When the output load exceeds the current-limit threshold
the device limits the output current to a safe level by
switching into a constant-current mode, pulling the
overcurrent (OC) logic output low.
During current limit conditions the increasing power
dissipation in the chip causing the die temperature to
rise. When the die temperature reaches a specified level
the thermal shutdown circuitry will shutdown the device.
The thermal shutdown will cycle repeatedly until the short
circuit condition is resolved.
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 10 of 16
Applications Information
Input Capacitor Selection
The input capacitor prevents large voltage transients
from appearing at the input, and provides the
instantaneous current needed each time the switch turns
on and also to limit input voltage drop. The input
capacitor t also prevents high-frequency noise on the
power line from passing through the output of the power
side. The choice of the input capacitor is based on its
ripple current and voltage ratings rather than its capacitor
value. The input capacitor should be located as close to
the VIN pin as possible. A 0.1 μF ceramic cap is
recommended but higher capacitor values will further
reduce the voltage drop at the input.
Output Capacitor Selection
The output capacitor acts in a similar way. A small 0.1 μF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for a large load that it may encounter
during system transients. This bulk capacitor must be
large enough to supply fast transient load in order to
prevent the output voltage from dropping.
Power Dissipation Calculation
Calculate the power dissipation for normal load condition
using the following equation:
PD = RON x (IOUT)2
The worst case power dissipation occurs when the load
current hits the current limit due to over-current or short
circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
PD = (VIN – VOUT) x ILIMIT
Layout Guidelines
Proper PCB layout is important for improving the thermal
and overall performance of the AOZ1341. To optimize the
switch response time to output short-circuit conditions
keep all traces as short as possible to reduce the effect of
unwanted parasitic inductance.
Place the input and output bypass capacitors as close as
possible to the IN and OUT pins. The input and output
PCB traces should be as wide as possible for the given
PCB space.
Use a ground plane to enhance the power dissipation
capability of the device.
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 11 of 16
USB Power Distribution Application
Figure 18. Typical Four-Port USB Host/Sel f-Powered Hub Applications Circuitry
AOZ1341
IN
D+
VBUS
D-
OUT1
OUT2
GND
Power Supply
Cx
0.1μF
Cx
22μF
0.1μF10kΩ10kΩ
GND
USB
Controller
D+
VBUS
D-
Cx
0.1μF
Cx
22μFGND
D+
VBUS
D-
Cx
0.1μF
Cx
22μFGND
D+
VBUS
D-
Cx
0.1μF
Cx
22μFGND
OC1
EN2/EN2
OC2
EN1/EN1
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 12 of 16
Package Dimensions, SO-8
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Symbols
A
A1
A2
b
c
D
E
e
E1
h
L
θ
Dimensions in millimeters
RECOMMENDED LAND PATTERN
Min.
1.35
0.10
1.25
0.31
0.17
4.80
3.80
5.80
0.25
0.40
0°
D
C
L
h x 45
7 (4x)
b
2.20
2.87
5.74
0.80
0.635 UNIT: mm
1.27
A1
A2 A
0.1
θ
Gauge Plane Seating Plane
0.25
e
8
1
EE1
Nom.
1.65
—
1.50
—
—
4.90
3.90
1.27 BSC
6.00
—
—
—
Max.
1.75
0.25
1.65
0.51
0.25
5.00
4.00
6.20
0.50
1.27
8°
Symbols
A
A1
A2
b
c
D
E
e
E1
h
L
θ
Dimensions in inches
Min.
0.053
0.004
0.049
0.012
0.007
0.189
0.150
0.228
0.010
0.016
0°
Nom.
0.065
—
0.059
—
—
0.193
0.154
0.050 BSC
0.236
—
—
—
Max.
0.069
0.010
0.065
0.020
0.010
0.197
0.157
0.244
0.020
0.050
8°
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 13 of 16
Tape and Reel Dimensions, SO-8
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.00
±0.50
Package
SO-8
(12mm)
A0
6.40
±0.10
B0
5.20
±0.10
K0
2.10
±0.10
D0
1.60
±0.10
D1
1.50
±0.10
E
12.00
±0.10
E1
1.75
±0.10
E2
5.50
±0.10
P0
8.00
±0.10
P1
4.00
±0.10
P2
2.00
±0.10
T
0.25
±0.10
N
ø97.00
±0.10
K0
UNIT: mm
B0
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
A0
P1
P2
Feeding Direction
P0
E2
E1
E
D0
T
D1
W
13.00
±0.30
W1
17.40
±1.00
H
ø13.00
+0.50/-0.20
K
10.60
S
2.00
±0.50
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 14 of 16
Package Dimensions, Exposed Pad MSOP-8
Gauge Plane Seating Plane
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating.
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils each.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Symbols
A
A1
A2
b
c
D
D1
e
E
E1
E2
L
L1
L2
θ1
θ2
Dimensions in millimeters
Min.
0.81
0.05
0.76
0.25
0.13
2.90
1.55
2.90
4.70
1.3
0.40
0.90
0°
—
Nom.
1.02
—
0.86
0.30
0.15
3.00
—
0.65 TYP.
3.00
4.90
—
0.55
0.95
0.25 BSC
—
12°
Max.
1.12
0.15
0.97
0.40
0.23
3.10
1.8
3.10
5.10
1.8
0.70
1.00
6°
—
RECOMMENDED LAND PATTERN
D
EE1
AA2
eb
A1
0.10mm
L2
LL1
c
1
0.75
4.35
0.65 0.35
2
E2
D1
1.9
1.9
Symbols
A
A1
A2
b
c
D
D1
e
E
E1
E2
L
L1
L2
θ1
θ2
Dimensions in inches
Min.
0.032
0.002
0.030
0.010
0.005
0.116
0.06
0.116
0.185
0.05
0.016
0.035
0°
—
Nom.
0.040
—
0.034
0.012
0.006
0.118
—
0.026 TYP.
0.118
0.192
—
0.022
0.037
0.010 BSC
—
12°
Max.
0.044
0.006
0.038
0.016
0.010
0.120
0.07
0.120
0.20
0.07
0.028
0.039
6°
—
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 15 of 16
Tape and Reel Dimensions, Exposed Pad MSO8-P
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.00
±0.50
Package
MSOP-8
T
0.30
±0.05
B0
3.30
±0.10
A0
5.20
±0.10
K1
1.20
±0.10
K0
1.60
±0.10
D0
ø1.50
+0.1/-0.0
E
12.0
±0.3
E1
1.75
±0.10
E2
5.50
±0.05
P0
8.00
±0.10
P1
4.00
±0.05
N
ø97.00
±0.10
UNIT: mm
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min.
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
K1
W
13.00
±0.30
W1
17.40
±1.00
H
ø13.00
+0.50/-0.20
K
10.60
S
2.00
±0.50
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
T
R0.3
Max
B0
P2
P1
K0
K1 A0 P0
Section B-B'
Section B-B'
4.2
3.4
R0.3 Typ.
D0 D1
E
E2
E1
D1
ø1.50
Min.
P2
2.00
±0.05
Notes:
1. 10 sprocket hole pich cumulative tolerance 0.2.
2. Camber not to exceed 1mm in 100mm.
3. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket.
4. K0 measured from a plane on the inside bottom of the pocket to the top surface of the carrier.
5. Pocket position relative to sprocket hole measured as tue position of pocket, not pocket hole.
6. All dimensions in mm.
Feeding Direction
AOZ1341
Rev. 1.1 June 2011 www.aosmd.com Page 16 of 16
Part Marking
Z1341AI
FAY Part Number Code
Assembly Lot Code
Year & Week Code
WLT
Fab Code & Assembly
Location Code
AOZ1341AI
(SO-8)
1341EI
FAYW
LT
Part Number Code
Assembly Lot Code
Year & Week Code
Fab Code & Assembly
Location Code
AOZ1341EI
(Exposed Pad MSOP-8)
Z1341AI1
FAY Part Number Code
Assembly Lot Code
Year & Week Code
WLT
Fab Code & Assembly
Location Code
AOZ1341AI-1
(SO-8)
1341EI
FAYW
LT
1
Part Number Code
Assembly Lot Code
Year & Week Code
Fab Code & Assembly
Location Code
AOZ1341EI-1
(Exposed Pad MSOP-8)
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
This datasheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
