TJA1048T,118-CUT TAPE\"\" - NXP SEMICONDUCTORS

1. General description

The TJA1048 is a dual high-speed CAN transceiver that provides an interface between a

Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.

The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the

automotive industry, providing the differential transmit and receive capability to (a

microcontroller with) a CAN protocol controller.

The TJA1048 belongs to the third generation of high- speed CAN transceivers from NXP

Semiconductors, offering significant improvements over first- and second-g eneration

devices such as the TJA1040. It offers improved Electro Magnetic Compatibility (EMC)

and ElectroStatic Discharge (ESD) performance, and also features:

•Ideal passive behavior to the CAN bus when the supply voltage is off

•A very low-current Standby mode with bus wake-up capability on both channels

•TJA1048T can be interfaced directly to microcontrollers with supply voltages from

3Vto5V

These features make the TJA1048 an excellent choice for all types of HS-CAN networks

containing mor e than one HS-CAN interf ace that require a low-p ower mode with wake-up

capability via the CAN bus, especially for Body Control and Gateway units.

2. Features and benefits

2.1 General

Two TJA1042 HS-CAN transceivers combined monolithically in a single package

Fully ISO 11898-2 and ISO 11898-5 compliant

Suitable for 12 V and 24 V systems

Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)

VIO input allows for direct interfacing with 3 V to 5 V microcontrollers

Available in SO14 and HVSON14 packages

Leadless HVSON14 package (3.0 mm ×4.5 mm) with improved Automated Optical

Inspection (AOI) capability

Dark green product (halogen free and Restriction of Hazardous Subst ances (RoHS)

compliant)

2.2 Low-power management

Very low-current Standby mode with host and bus wake-up capability

Functional behavior predictable under all supply conditions

Transceiver disengages from the bus when not powered up (zero load)

TJA1048

Dual high-speed CAN transceiver with Standby mode

Rev. 2 — 25 March 2011 Product data sheet

Product data sheet Rev. 2 — 25 March 2011 2 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

Wake-up receiver powered by VIO; allows shut down of VCC

2.3 Protection

High ESD handling capability on the bus pins

Bus pins protected against transients in automotive environments

Transmit Data (TXD) dominant time-out function

Undervoltage detectio n on pin s VCC and VIO

Thermally protected

3. Quick reference data

4. Ordering information

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 4.5 - 5.5 V

ICC supply current Standby mode - 0.5 2 μA

Normal mode

both channels recessive - - 20 mA

one channel dominant - - 80 mA

both channels domi nant - 90 140 mA

Vuvd(VCC) undervoltage detection voltage on

pin VCC

3.5 - 4.5 V

VESD electrostatic discharge voltage IEC 61000-4-2 at pins CANHx and CANLx −6- +6kV

VCANH voltage on pin CANH pins CANH1 and CANH2; no time limit;

DC limiting value −58 - +58 V

VCANL voltage on pin CANL pins CANL1 and CANL2; no time limit; DC

limiting value −58 - +58 V

Tvj virtual junction temperature −40 - +150 °C

Table 2. Orderi ng information

Type number Package

Name Description Version

TJA1048T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

TJA1048TK HVSON14 plastic, thermal enhanced very thin small outline package; no leads;

14 terminals ; bo d y 3 × 4.5 × 0.85 mm SOT1086-2

Product data sheet Rev. 2 — 25 March 2011 3 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

5. Block diagram

Fig 1. Block diagram

WAKE-UP

FILTER

CANH1

CANL1

SLOPE CONTROL

AND DRIVER

NORMAL

RECEIVER

LOW-POWER

RECEIVER

VCC

VIO

WAKE-UP

FILTER

CANH2

CANL2

SLOPE CONTROL

AND DRIVER

NORMAL

RECEIVER

LOW-POWER

RECEIVER

VCC

VIO

VCC

VCC/VIO

UNDERVOLTAGE

DETECTION

TEMPERATURE

PROTECTION

MODE

CONTROL

VCC

MUX and

DRIVER

TIME-OUT

TXD1 1

VIO

STBN1

RXD1 4

MUX and

DRIVER

TIME-OUT

TXD2 6

VIO

STBN2

RXD2 7

11 3

GNDA 5GNDB

015aaa146

Product data sheet Rev. 2 — 25 March 2011 4 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

6. Pinning information

6.1 Pinning

6.2 Pin description

[1] Pins 2 and 5 must be connected together externally in the application.

Fig 2. Pin configuration diagram: SO14 Fig 3. Pin configuration diagram: HVSON14

TJA1048T

TXD1 STBN1

GNDA CANH1

VCC CANL1

RXD1 VIO

GNDB CANH2

TXD2 CANL2

RXD2 STBN2

015aaa144

7 8

terminal 1

index area

015aaa207

TJA1048TK

TXD1 1

GNDA 2

RXD1 4

GNDB 5

TXD2 6

RXD2

STBN1

CANH1

CANL1

VIO

CANH2

CANL2

STBN27

Transparent top view

VCC

Table 3. Pin description

Symbol Pin Description

TXD1 1 transmit data input 1

GNDA 2[1] transceiver groun d

VCC 3 transceiver supply voltage

RXD1 4 receive data output 1; reads out data from bus line1

GNDB 5[1] transceiver groun d

TXD2 6 transmit data input 2

RXD2 7 receive data output 2; reads out data from bus line 2

STBN2 8 standby control input 2 (HIGH = Normal mode, LOW = Standby mode)

CANL2 9 LOW-level CAN bus line 2

CANH2 10 HIGH-level CAN bus line 2

VIO 11 supply voltage for I/O level adapter

CANL1 12 LOW-level CAN bus line 1

CANH1 13 HIGH-level CAN bus line 1

STBN1 14 standby control input 1 (HIGH = Normal mode, LOW = Standby mode)

Product data sheet Rev. 2 — 25 March 2011 5 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

7. Functional description

The TJA1048 is a dual HS-CAN stand- alone transceiver with Standby mode and robust

ESD handling capability. It combines the functionality of two TJA1040/TJA1042

transceivers with improved EMC and quiescent curre nt performance. Improved slope

control and high DC handling capability on the bus pins provide additional application

flexibility.

7.1 Operating modes

The TJA1048 supports two operating modes per transceiver, Normal and Standb y. The

operating mode can be selected independently for each transceiver via pins STBN1 and

STBN2 (see Table 4).

7.1.1 Normal mode

A HIGH level on pin STBN1/STBN2 selects Normal mode. In this mode, the transceiver

can transmit and receive data via the bus lines CANH1/CANL1 and CANH2/CANL2 (see

Figure 1 for the block diagram). The differential receiver converts the analog data on the

bus lines into digital data which is output on pin RXD1/RXD2. The slope of the output

signals on the bus lines is controlled and optimized in a way that guarantees the lowest

possible EME.

7.1.2 Standby mode

A LOW level on pin STBN1/STBN2 selects Standby mode. In Standby mode, the

transceiver is not able to transmit or correctly receive data via the bus lines. The

transmitter and Normal-mod e receiver blocks are switched off to reduce supply current,

and only a low-powe r differential receiver monitors the bus lines for activity.

In Standby mode, the bus lines are biased to ground to minimize the system supply

current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus

activity even if VIO is the only supply voltage available. When pin RXD1/RXD2 goes LOW

to signal a wake-up request, a transition to Normal mode will not be triggered until

STBN1/STBN2 is forced HIGH.

A dedicated wake-up sequence (specified in ISO11898-5) must be received to wake-up

the TJA1048 from a low-power mode. This filtering is necessary to avoid spurious

wake-up even ts due to a dom ina n t clam pe d CAN bus or dominant phases caused by

noise or spikes on the bu s.

A valid wake-up pattern consists of:

A dominant phase of at least twake(busdom) followed by

A recessive phase of at least twake(busrec) followed by

A dominant phase of at least twake(busdom)

Table 4. Operating modes

Mode Pin STBN1/STBN2 Pin RXD1/RXD2

LOW HIGH

Normal HIGH bus dominant bus recessive

Standby LOW wake-up request detected no wake-up request detected

Product data sheet Rev. 2 — 25 March 2011 6 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

The complete dominant-recessive -domin ant pattern must be received within tto(wake)bus to

be recognized as a valid wake-up pattern (see Figure 4). Pin RXD1/RXD2 will remain

recessive until the wake-up event has been triggered.

After a wake-up sequence has been detected, the TJA1048 will remain in Standby mode

with the bus signals reflected on RXD1/RXD2. Note that dominant or recessive phases

lasting less than tfltr(wake)bus will not be detected by the low-power differential receiver and

will not be reflected on RXD1/RXD2 in Standby mode.

A wake-up event will not be registered if any of the following events occurs while a

wake-up sequence is being transmitted:

The TJA1048 switches to Normal mode

The complete wake-up pattern was not received within tto(wake)bus

A VIO undervoltage is detected (VIO < Vuvd(VIO); see Section 7.2.3)

If any of these events occurs while a wake-up sequence is being received, the internal

wake-up logic will be reset and the complete wake-up sequence will have to be

re-transmitted to trigger a wake-up event.

7.2 Fail-safe features

7.2.1 TXD dominant time-out function

A 'TXD dominant time-out' timer is started when pin TXD1/TXD2 is set LOW. If the LOW

state on this pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing

the bus lines to recessive state. This function pre vents a hardware and/or software

application failure from driving the bus lines to a permanent dominant state (blocking all

network communications). The TXD dominant time-out timer is reset when pin

TXD1/TXD2 is set HIGH. The TXD dominant time-out time also defines the minimum

possible bit rate of 40 kbit/s. The TJA104 8 has two TXD dominant time-out timers that

operate independently of each other.

Fig 4. Wake-up timin g

wake(busdom)

wake(busrec)

wake(busdom)

CANHx

CANLx

O(diff)bus

RXDx

fltr(wake)bus

to(wake)bus

015aaa14

Product data sheet Rev. 2 — 25 March 2011 7 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

7.2.2 Internal biasing of TXD1, TXD2, STBN1 and STBN2 input pins

Pins TXD1 and TXD2 have internal pull-ups to VIO and pins STBN1 and STBN2 have

internal pull-downs to GNDA and GNDB. This ensures a safe, d efined state if any of these

pins is left floating. Pins GNDA and GNDB must be connected together in the application.

Pull-up/pull-down current s flow in these pins in all states. Pins TXD1 and TXD2 should be

held HIGH in Standby mode to minimize standby currents; pins STBN1 an d STBN2

should be held LOW.

7.2.3 Undervoltage detection on pins VCC and VIO

Should VCC drop below the VCC undervolt age detection le vel, Vuvd(VCC), both transceiver s

will switch to Standby mode. The logic state of pins STBN1 and STBN2 will be ignored

until VCC has recovered.

Should VIO drop below the VIO under volt age detection level, V uvd(VIO), the transceivers will

switch off and disengage from the bus (zero load) until VIO has recovered.

7.2.4 Overtemperature protection

The output dri vers are protecte d against over temperature cond itions. If the virtual ju nction

temperature exceed s the shut down junction temperature , Tj(sd), both output drivers will be

disabled. When the virtual junction temperature drops below Tj(sd) again, the output

drivers will recover independently once TXD1/TXD2 has been reset to HIGH. Including

the TXD1/TXD2 condition prevents output driver oscillation due to small variations in

temperature.

7.3 VIO supply pin

Pin VIO should be connecte d to the microcontrolle r supply volta ge (see Figure 5). This will

adjust the signal levels of pins TXD1, TXD2, RXD1, RXD2, STBN1 and STBN2 to the I/O

levels of the microcontroller. Pin VIO also provides the internal supply voltage for the

transceiver’s low-power differential receiver. For applications running in low-power mode,

this allows the bus lines to be monito re d fo r act ivity ev en if ther e is no supp ly vo ltage on

pin VCC.

Product data sheet Rev. 2 — 25 March 2011 8 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

8. Application design-in information

Optionally, the 5 V supply can be switched off in Standby mode.

Fig 5. Typical application with 3 V microcontroller

TJA1048T

VIO

INH

VCC

113

015aaa14

5 V

BAT 3 V

MICRO-

CONTROLLER

VDD

STBN1

Pxx

Pyy

STBN2

TXD1

TX0

RX0

RXD1

TXD2

TX1

RX1

RXD2

GND

GNDA

5GNDB

CANH1

CANL1

CANH2

CANL2

Product data sheet Rev. 2 — 25 March 2011 9 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

9. Limiting values

[1] Verified by an external test house to ensure pins CANH1, CANL1, CANH2 and CANL2 can withstand ISO 7637 part 3 automotive

transient test pulses 1, 2a, 3a and 3b.

[2] IEC 61000-4-2 (150 pF, 330 Ω).

[3] ESD performance of pins CANH1, CANL1, CANH2 and CANL2 according to IEC 61000-4-2 (150 pF, 330 Ω) has been be verified by an

external test house.

[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 kΩ).

[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 μH, 10 Ω).

[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF).

[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj =T

amb +P×Rth(vj-a), where Rth(vj-a) is a

fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient

temperature (Tamb).

10. Thermal characteristics

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.

Symbol Parameter Conditions Min Max Unit

Vxvoltage on pin x no time limit; DC value

on pins CANH1, CANL1, CANH2 and CANL2 −58 +58 V

on any other pin −0.3 +7 V

Vtrt transient voltage on pins CANH1, CANL1, CANH2 and CANL2 [1] −150 +100 V

VESD electrostatic discharge voltage IEC 61000-4-2 [2]

on pins CANH1, CANL1, CANH2 and CANL2 [3] −6+6 kV

HBM [4]

on pins CANH1, CANL1, CANH2 and CANL2 −6+6 kV

at any other pin −4+4 kV

MM [5]

at any pin −300 +300 V

CDM [6]

at corner pins −750 +750 V

at any pin −500 +500 V

Tvj virtual junction temperature [7] −40 +150 °C

Tstg storage temperature −55 +150 °C

Table 6. Thermal characteris tics

Values determined for free convection conditions on a JESD51-7 board.

Symbol Parameter Conditions Value Unit

Rth(vj-a) thermal resist ance from virtual junction to

ambient SO14 65 K/W

HVSON14 42 K/W

Product data sheet Rev. 2 — 25 March 2011 10 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

11. Static characteristics

Table 7. Static characteristics

Tvj =

−

C to +150

C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL=60

unless specified otherwise; all voltages are

defined with respec t to gr ound; positive currents flow into the IC.

Symbol Parameter Conditions Min Typ Max Unit

Supply; pin VCC

VCC supply voltage 4.5 - 5.5 V

ICC supply current St andby mode; VTXD =V

IO [1] -0.52 μA

Normal mode

both channels recessive - - 20 mA

one channel domi nant - - 80 mA

both channels dominant - 90 140 mA

Vuvd(VCC) undervoltage detection

voltage on pin VCC

3.5 - 4.5 V

I/O level adapter supply; pin VIO

VIO supply voltage on pin VIO 2.8 - 5.5 V

IIO supply current on pin VIO Standby mode; VTXD =V

IO [1] -16.526μA

Normal mode

both channels recessive - - 35 μA

one channel dominant - - 300 μA

both channels dominant - - 550 μA

Vuvd(VIO) undervoltage detection

voltage on pin VIO

1.3 2.0 2.7 V

Standby mode control input; pins STBN1 and STBN2

VIH HIGH-level input voltage 0.7VIO -V

IO + 0.3 V

VIL LOW-level input voltage −0.3 - 0.3VIO V

IIH HIGH-level input current VSTBN[2] =V

IO 1-10μA

IIL LOW-level input current VSTBN =0V −1- +1 μA

CAN transmit data input; pins TXD1 and TXD2

VIH HIGH-level input voltage 0.7VIO -V

IO + 0.3 V

VIL LOW-level input voltage −0.3 - 0.3VIO V

IIH HIGH-level input current VTXD[3] =V

IO −5- +5 μA

IIL LOW-level input current VTXD =0V −260 −150 −30 μA

Ciinput capacitance [4] - 5 10 pF

CAN receive data output; pins RXD1 and RXD2

IOH HIGH-level output current VRXD[5] =V

IO −0.4 V; VIO =V

CC −8−3−1mA

IOL LOW-level output current VRXD = 0.4 V; bus dominant 2 5 12 mA

Bus lines; pins CANH1, CANL1, CANH2 and CANL2

VO(dom) dominant output voltage VTXD =0V; t<t

to(dom)TXD

pin CANH1/CANH2 2.75 3.5 4.5 V

pin CANL1/CANL2 0.5 1.5 2.25 V

Vdom(TX)sym transmitter dominant

voltage symmetry Vdom(TX)sym = VCC −VCANH[6] −VCANL[7] −300 - +300 mV

Product data sheet Rev. 2 — 25 March 2011 11 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

[1] Total supply current (ICC +I

IO) in Standby mode is typically 17 μA, with a maximum value of 26 μA.

[2] STBN refers to the input signal on pin STBN1 or pin STBN2.

[3] TXD refers to the input signal on pin TXD1 or pin TXD2.

[4] Not tested in production.

[5] RXD refers to the output signal on pin RXD1 or pin RXD2.

[6] CANH refers to the input/output signal on pin CANH1 or pin CANH2.

[7] CANL refers to the input/output signal on pin CANL1 or pin CANL2.

[8] Vcm(CAN) is the common mode voltage of CANH1/CANL1 and CANH2/CANL2.

VO(dif)bus bus differential output

voltage VTXD =0V; t<t

to(dom)TXD

VCC = 4.75 V to 5.25 V; RL=45Ω to 6 5 Ω

1.5 - 3 V

VTXD =V

IO; recessive; no load −50 - +50 mV

VO(rec) recessive output voltage Normal mode; VTXD =V

IO; no load 2 0.5VCC 3V

Standby mode; no load −0.1 - +0.1 V

Vth(RX)dif differential receiver

threshol d vol tage Normal mode; Vcm(CAN) =−30 V to +30 V [8] 0.5 0.7 0.9 V

St andby mode

Vcm(CAN) =−12 V to +12 V [8] 0.4 0.7 1.15 V

Vhys(RX)dif differential receiver

hysteresis voltage Normal mode; Vcm(CAN) =−30 V to +30 V [8] 50 120 200 mV

IO(dom) dominant output current VTXD =0V; t<t

to(dom)TXD; VCC =5 V

pin CANH1/CANH2; VCANH =0V −100 −70 −40 mA

pin CANL1/CANL2; VCANL = 5 V/40 V 40 70 100 mA

IO(rec) recessive output current Normal mo de; V TXD =V

VCANH =V

CANL = −40 V to +40 V −5- +5 mA

ILleakage current VCC =V

IO =0V; V

CANH =V

CANL =5V −5- +5 μA

Riinput resistance 9 15 28 kΩ

ΔRiinput resistance deviation between pin CANH1/CANH2 and pin

CANL1/CANL2 −1- +1 %

Ri(dif) differential input

resistance 19 30 52 kΩ

Ci(cm) common-mode input

capacitance [4] - - 20 pF

Ci(dif) differential input

capacitance [4] - - 10 pF

Temperature de te ction

Tj(sd) shutdown junction

temperature [4] -190- °C

Table 7. Static characteristics …continued

Tvj =

−

C to +150

C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL=60

unless specified otherwise; all voltages are

defined with respec t to gr ound; positive currents flow into the IC.

Symbol Parameter Conditions Min Typ Max Unit

Product data sheet Rev. 2 — 25 March 2011 12 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

12. Dynamic characteristics

Table 8. Dynamic character istics

Tvj =

−

C to +150

C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V; RL=60

unless specified otherwise; all voltages are

defined with respec t to gr ound; positive currents flow into the IC.

Symbol Parameter Conditions Min Typ Max Unit

Transceiver timing; pins CANH1, CANH2, CANL1, CANL2, TXD1, TXD2, RXD1 and RXD2; see Figure 6 and Figure 7

td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 - ns

td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 - ns

td(busdom-RXD) delay time from bus dominan t to RX D Normal mode - 60 - ns

td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 - ns

tPD(TXD-RXD) propagation delay from TXD to RXD Normal mode 60 - 250 ns

tto(dom)TXD TXD dominant time-out time VTXD = 0 V; Normal mode 0.5 2 5 ms

td(stb-norm) standby to normal mode delay time 7 25 47 μs

twake(busdom) bus dominant wake-up time Standby mode 0.5 - 5 μs

twake(busrec) bus recessive wake-up time Standby mode 0.5 - 5 μs

tto(wake)bus bus wake-up time-out time 0.5 2 5 ms

tfltr(wake)bus bus wake-up filter time Standby mode 0.5 1.5 5 μs

Fig 6. Timing test circuit for CAN transceiver

015aaa14

TJA1048

GNDA

VCC

GNDB

100 nF47 μF

+5 V

RXD2

VIO

TXD2

RXD1

15 pF

TXD1

CANL2

CANH2

RL100 pF

CANL1

CANH1

RL100 pF

STBN2STBN1

Product data sheet Rev. 2 — 25 March 2011 13 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

13. Test information

13.1 Quality information

This product has been qualified to the appropriate Automotive Electronics Council (AEC)

standard Q100 or Q101 and is suita ble for use in automotive applications.

Fig 7. CAN transceiver timing diagram

CANHx

CANLx

td(TXD-busdom)

TXDx

VO(dif)(bus)

RXDx

HIGH

LOW

dominant

recessive

0.9 V

0.5 V

0.3VIO

0.7VIO

td(busdom-RXD)

td(TXD-busrec)

td(busrec-RXD)

tPD(TXD-RXD)

tPD(TXD-RXD) 015aaa21

Product data sheet Rev. 2 — 25 March 2011 14 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

14. Package outline

Fig 8. Package outline SOT108 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.35

0.34

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.024

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

O14: plastic small outline package; 14 leads; body width 3.9 mm SOT108

-1

Product data sheet Rev. 2 — 25 March 2011 15 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

Fig 9. Package outline SOT1086 (HVSON14)

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT1086-2 - - -

MO-229

- - -

sot1086-2

10-07-14

10-07-15

Unit

max

nom

min

1.00

0.85

0.80

0.05

0.03

0.00

0.2

4.6

4.5

4.4

4.25

4.20

4.15

3.1

3.0

2.9

0.65 3.9

0.45

0.40

0.35

0.1

Dimensions

VSON14: plastic, thermal enhanced very thin small outline package; no leads;

4 terminals; body 3 x 4.5 x 0.85 mm SOT1086-

A1b

0.35

0.32

0.29

cDD

hEE

1.65

1.60

1.55

0.35

0.30

0.25

0.1

0.05

0 2.5 5 mm

scale

terminal 1

index area

detail X

AC B

terminal 1

index area

Product data sheet Rev. 2 — 25 March 2011 16 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

15. Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate prec a u tio ns ar e taken as

described in JESD625-A or equivalent standards.

16. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

16.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to

Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both

the mechanical and the electrical connection. There is no single soldering method that is

ideal for all IC packages. Wave soldering is of ten preferred when through-hole and

Surface Mount Devices (SMDs) are mixed on on e printed wiring board; however, it is not

suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

16.2 Wave and reflow soldering

W ave soldering is a joining te chnology in which the joints are m ade by solder coming from

a standing wave of liquid solder. The wave soldering process is suitable for the following:

•Through-hole components

•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solde r lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads ha ving a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

•Board specifications, including the board finish, solder masks and vias

•Package footprints, including solder thieves and orientation

•The moisture sensitivity level of the packages

•Package placement

•Inspection and repair

•Lead-free soldering ve rsus SnPb soldering

16.3 Wave soldering

Key characteristics in wave soldering are:

Product data sheet Rev. 2 — 25 March 2011 17 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

•Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

•Solder bath specifications, including temperature and impurities

16.4 Reflow soldering

Key characteristics in reflow soldering are :

•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to

higher minimum peak temperatures (see Figure 10) than a SnPb process, thus

reducing the process window

•Solder paste printing issues including smearing, release, and adjusting th e process

window for a mix of large and small components on one board

•Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature) an d cooling down. It is imperative that the peak

temperature is high enoug h for the solder to make reliable solder joint s (a solder paste

characteristic). In addition, the peak temperature must be low en ough that the

packages and/or boards are not damaged. Th e peak temperature of the package

depends on p ackage thickness and volume and is classified in accordance with

Table 9 and 10

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 10.

Table 9. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Packag e reflow temperature (°C)

Volume (mm3)

< 350 ≥ 350

< 2.5 235 220

≥ 2.5 220 220

Table 10. Lead-free process (from J-STD-020C)

Package thickness (mm) Packag e reflow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 260 250 245

> 2.5 250 245 245

Product data sheet Rev. 2 — 25 March 2011 18 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

For further informa tion on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

17. Soldering of HVSON packages

Section 16 contains a brief intr oduction to the techniques most commonly used to solder

Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON

leadless package ICs can found in the following application notes:

•AN10365 ‘Surface mount reflow soldering description”

•AN10366 “HVQFN application information”

18. Revision history

MSL: Moisture Sensitivity Level

Fig 10. Temperature profiles for large and small components

001aac84

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

TJA1048 v.2 20110325 Product data sheet - TJA1048 v.1

Modifications •Section 1: text revised

•Section 2.1: package-related features added

•Table 1: added along with ‘Quick reference data’ disclaimer in Section 19.3

•Section 7.2.2: text revised

•Table 5: parameter Tamb deleted

•Table 7: measuring conditions for parameters ICC, IIO and IIL (for pins TXD1 and TXD2) revised

•Section 15 and Section 17: added

TJA1048 v.1 20101103 Product data sheet - -

Product data sheet Rev. 2 — 25 March 2011 19 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

19. Legal information

19.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

19.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict wit h the short data sheet, th e

full data sheet shall pre va il.

Product specificat io n — The information and data provided in a Product

data sheet shall define the specification of the product as agr eed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

19.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warrant ies, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive

applications. The product is not designed, authorized or warranted to be

suitable for use in medica l, military, aircraft, space or life support equipment,

nor in applications where failure or malf unction of an NXP Semiconductor s

product can reasonably be expected to result in personal injury, death or

severe property or environment al damage. NXP Semiconductors accepts no

liability for inclusion and/or use of NXP Semiconductors products in such

equipment or applications and therefore such inclusion and/or use is at the

customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applicati ons or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Custo mers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party custo m er(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semic onductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter m s and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, patents or

other industrial or inte llectual property rights.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 2 — 25 March 2011 20 of 21

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

19.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

20. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors TJA1048

Dual high-speed CAN transceiver with Standby mode

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 25 March 2011

Document identifier: TJA1048

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

21. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

2.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2.2 Low-power management . . . . . . . . . . . . . . . . . 1

2.3 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 5

7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5

7.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5

7.1.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5

7.2 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6

7.2.1 TXD dominant time-out function. . . . . . . . . . . . 6

7.2.2 Internal biasing of TXD1, TXD2, STBN1 and

STBN2 input pins . . . . . . . . . . . . . . . . . . . . . . . 7

7.2.3 Undervoltage detection on pins VCC and VIO . . 7

7.2.4 Overtemperature protection . . . . . . . . . . . . . . . 7

7.3 VIO supply pin. . . . . . . . . . . . . . . . . . . . . . . . . . 7

8 Application design-in information . . . . . . . . . . 8

9 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9

10 Thermal characteristics . . . . . . . . . . . . . . . . . . 9

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 10

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 12

13 Test information. . . . . . . . . . . . . . . . . . . . . . . . 13

13.1 Quality information . . . . . . . . . . . . . . . . . . . . . 13

14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14

15 Handling information. . . . . . . . . . . . . . . . . . . . 16

16 Soldering of SMD packages . . . . . . . . . . . . . . 16

16.1 Introduction to soldering . . . . . . . . . . . . . . . . . 16

16.2 Wave and reflow soldering . . . . . . . . . . . . . . . 16

16.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 16

16.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 17

17 Soldering of HVSON packages. . . . . . . . . . . . 18

18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18

19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19

19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19

19.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

19.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19

19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20

20 Contact information. . . . . . . . . . . . . . . . . . . . . 20

21 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21