AL102A Advance Information 8 PORT LOW COST 10/100 SWITCH * * * * * * * * * Supports eight 10/100 Mbit/s Ethernet ports with MII interface Capable of trunking up to 800 Mbit/s link Full- and half-duplex mode operation Speed auto-negotiation through MDIO Built-in storage of 1K MAC addresses Designed to utilize low-cost SGRAM Serial EEPROM interface for low-cost system configuration Automatic source address learning Secure mode traffic filtering * * * * * * * * Broadcast storm control Port monitoring support IEEE 802.3x flow control for full-duplex operation Optional backpressure flow control support for half-duplex operation Supports store-and-forward mode switching VLAN support 0.35 micron, 3.3V CMOS technology Packaged in 256-pin PQFP Product Description The AL102A is an eight-port 10/100 Mbit/s dual speed Ethernet switch. A low-cost Fast Ethernet switch can be implemented using the AL102A with low-cost SGRAM. The AL102A also supports VLAN and multiple port aggregation trunks. 10/100 MAC Switch Controller Buffer Manager 10/100 MAC 10/100 MAC High Speed Switch Fabric 10/100 MAC 10/100 MAC Address Control Address Table 10/100 MAC EEPROM Interface 10/100 MAC 10/100 MAC Figure 1 System Block Diagram Reference Only / Allayer Confidential AL102A Advance Information AL102A Overview The AL102A provides eight 10/100 Mbit/s Ethernet ports. Each port supports both 10 and 100 Mbit/s data rate. The operation mode is auto-negotiated by the PHY. All ports are full-duplex capable. The device supports VLAN for workgroup and segment switching applications. The AL102A also supports trunking applications. The chip provides two optional load balancing schemes, explicit and dynamic. With trunking, it is possible to group up to four full-duplex links together to form a single 800 Mbit/s link. Data received from the MAC interface is stored in the external memory buffer. The AL102A utilizes cost effective SGRAM to provide 8-Mbit or 16-Mbit of buffer memory. During transmission, the data is obtained from the buffer memory and routed to the destination port. In the event of a collision during half-duplex operations, the MAC control will back off and retransmit in accordance to the IEEE 802.3 specification. The AL102A provides two flow control methods. For half-duplex operations, an optional jamming based flow control (also known as backpressure) is available to prevent loss of data. With this method of flow control, the switch will generate a jam signal when the receive-buffer is full. The sending station will not transmit until the line is clear. In the full-duplex mode, AL102A utilizes IEEE 802.3x as the flow control mechanism. All ports support multiple MAC addresses. The switch chip supports up to 1K MAC addresses internally. These MAC addresses are shared among all eight ports. The initialization and configuration of the switch is programmed by an external EEPROM. For an unmanaged switch design, a CPU is not required. Field reconfiguration can be achieved by using a parallel interface to reprogram the EEPROM. The AL102A supports port-based VLAN. The VLAN register set is used to configure the destination ports for multicast and broadcast frames. The device also provides two levels of security for intrusion protection. Security can be implemented on a per port basis. The AL102A operates only in the store and forward mode. The entire frame is checked for error. Frames with errors are automatically filtered and will not be forwarded to the destination port. Other features include port monitoring and broadcast storm throttling. 2/2000 Reference Only / Allayer Confidential 2