74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 4 -- 28 December 2015 Product data sheet 1. General description The 74HC165; 74HCT165 is an 8-bit serial or parallel-in/serial-out shift register. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D0 to D7 is loaded into the shift register asynchronously. When PL is HIGH data enters the register serially at DS. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of the CP input. A HIGH on CE will disable the CP input. Inputs include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Asynchronous 8-bit parallel load Synchronous serial input Complies with JEDEC standard no. 7A Input levels: For 74HC165: CMOS level For 74HCT165: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Parallel-to-serial data conversion 4. Ordering information Table 1. Ordering information Type number Package 74HC165D Temperature range Name Description Version 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm 74HCT165D 74HC165DB 74HCT165DB SOT338-1 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Table 1. Ordering information ...continued Type number Package 74HC165PW Temperature range Name Description Version 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm 74HCT165PW 74HC165BQ 74HCT165BQ SOT763-1 5. Functional diagram 65* &>/2$'@ *>6+,)7@ ' ' ' ' ' ' ' ' ' ' 4 ' 4 3/ &3 &( PQD Fig 1. & '6 PQD Logic symbol Fig 2. IEC logic symbol ' ' ' ' ' ' ' ' 3/ '6 &3 &( 4 %,76+,)75(*,67(5 3$5$//(/,16(5,$/287 4 PQD Fig 3. Functional diagram 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 2 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 6. Pinning information 6.1 Pinning +& +&7 3/ WHUPLQDO LQGH[DUHD 9&& +& +&7 9&& &3 &( &3 &( ' ' ' ' ' ' ' ' ' ' ' 4 ' 4 '6 *1' 4 *1' ' '6 ' 4 ' *1' ' 3/ DDK 7UDQVSDUHQWWRSYLHZ DDK (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration (SO16 and (T)SSOP16) Fig 5. Pin configuration (DHVQFN16) 6.2 Pin description Table 2. Pin description Symbol Pin Description PL 1 asynchronous parallel load input (active LOW) CP 2 clock input (LOW-to-HIGH edge-triggered) Q7 7 complementary output from the last stage GND 8 ground (0 V) Q7 9 serial output from the last stage DS 10 serial data input D0 to D7 11, 12, 13, 14, 3, 4, 5, 6 parallel data inputs (also referred to as Dn) CE 15 clock enable input (active LOW) VCC 16 positive supply voltage 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 3 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 7. Functional description Function table[1] Table 3. Operating modes parallel load serial shift hold "do nothing" [1] Inputs Qn registers Outputs PL CE CP DS D0 to D7 Q0 Q1 to Q6 Q7 Q7 L X X X L L L to L H L X X X H H H to H H L H L l X L q0 to q5 q6 q6 H L h X H q0 to q5 q6 q6 H L l X L q0 to q5 q6 q6 L H L h X H q0 to q5 q6 q6 H H X X X q0 q1 to q6 q7 q7 H X H X X q0 q1 to q6 q7 q7 H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; q = state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition; X = don't care; = LOW-to-HIGH clock transition. &3 &( '6 3/ ' ' ' ' ' ' ' ' 4 4 LQKLELW VHULDOVKLIW PQD ORDG Fig 6. Timing diagram 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 4 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C SO16 package [2] - 500 mW (T)SSOP16 package [3] - 500 mW DHVQFN16 package [4] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70 C. [3] Ptot derates linearly with 5.5 mW/K above 60 C. [4] Ptot derates linearly with 4.5 mW/K above 60 C. 9. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate 74HC_HCT165 Product data sheet Conditions 74HC165 74HCT165 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V 0 - VCC 0 - VCC V 0 - VCC 0 - VCC V 40 - +125 40 - +125 C VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 5 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 10. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V 74HC165 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V VI = VIH or VIL IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V VI = VIH or VIL IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A CI input capacitance - 3.5 - - - - - pF 74HCT165 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V - - 0.1 - 1 - 1 A VOL II input leakage current 74HC_HCT165 Product data sheet VI = VCC or GND; VCC = 6.0 V All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 6 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ Max Min Max Min Max - - 8.0 - 80 - 160 A Dn and DS inputs - 35 126 - 157.5 - 171.5 A CP CE, and PL inputs - 65 234 - 292.5 - 318.5 A - 3.5 - - - - - pF ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V ICC additional supply current per input pin; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V CI 40 C to +85 C 40 C to +125 C Unit input capacitance 11. Dynamic characteristics Table 7. Dynamic characteristics GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 12 Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 52 165 - 205 - 250 ns VCC = 4.5 V - 19 33 - 41 - 50 ns VCC = 6.0 V - 15 28 - 35 - 43 ns VCC = 5.0 V; CL = 15 pF - 16 - - - - - ns VCC = 2.0 V - 50 165 - 205 - 250 ns 74HC165 tpd propagation delay [1] CP or CE to Q7, Q7; see Figure 7 PL to Q7, Q7; see Figure 8 VCC = 4.5 V - 18 33 - 41 - 50 ns VCC = 6.0 V - 14 28 - 35 - 43 ns VCC = 5.0 V; CL = 15 pF - 15 - - - - - ns VCC = 2.0 V - 36 120 - 150 - 180 ns VCC = 4.5 V - 13 24 - 30 - 36 ns VCC = 6.0 V - 10 20 - 26 - 31 ns - 11 - - - - - ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns D7 to Q7, Q7; see Figure 9 VCC = 5.0 V; CL = 15 pF tt transition time 74HC_HCT165 Product data sheet Q7, Q7 output; see Figure 7 [2] All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 7 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Table 7. Dynamic characteristics ...continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 12 Symbol Parameter tW pulse width 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 80 17 - 100 - 120 - ns VCC = 4.5 V 16 6 - 20 - 24 - ns VCC = 6.0 V 14 5 - 17 - 20 - ns VCC = 2.0 V 80 14 - 100 - 120 - ns VCC = 4.5 V 16 5 - 20 - 24 - ns VCC = 6.0 V 14 4 - 17 - 20 - ns VCC = 2.0 V 100 22 - 125 - 150 - ns VCC = 4.5 V 20 8 - 25 - 30 - ns VCC = 6.0 V 17 6 - 21 - 26 - ns VCC = 2.0 V 80 11 - 100 - 120 - ns VCC = 4.5 V 16 4 - 20 - 24 - ns VCC = 6.0 V 14 3 - 17 - 20 - ns VCC = 2.0 V 80 17 - 100 - 120 - ns VCC = 4.5 V 16 6 - 20 - 24 - ns VCC = 6.0 V 14 5 - 17 - 20 - ns VCC = 2.0 V 80 22 - 100 - 120 - ns VCC = 4.5 V 16 8 - 20 - 24 - ns VCC = 6.0 V 14 6 - 17 - 20 - ns VCC = 2.0 V 5 6 - 5 - 5 - ns VCC = 4.5 V 5 2 - 5 - 5 - ns VCC = 6.0 V 5 2 - 5 - 5 - ns VCC = 2.0 V 5 17 - 5 - 5 - ns VCC = 4.5 V 5 6 - 5 - 5 - ns VCC = 6.0 V 5 5 - 5 - 5 - ns CP input HIGH or LOW; see Figure 7 PL input LOW; see Figure 8 trec tsu recovery time PL to CP, CE; see Figure 8 set-up time DS to CP, CE; see Figure 10 CE to CP and CP to CE; see Figure 10 Dn to PL; see Figure 11 th hold time DS to CP, CE and Dn to PL; see Figure 10 CE to CP and CP to CE; see Figure 10 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 8 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Table 7. Dynamic characteristics ...continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 12 Symbol Parameter 25 C Conditions Min fmax maximum frequency power dissipation capacitance Max Min Max Min Max CP input; see Figure 7 VCC = 2.0 V 6 17 - 5 - 4 - MHz VCC = 4.5 V 30 51 - 24 - 20 - MHz VCC = 6.0 V 35 61 - 28 - 24 - MHz - 56 - - - - - MHz - 35 - - - - - pF VCC = 4.5 V - 17 34 - 43 - 51 ns VCC = 5.0 V; CL = 15 pF - 14 - - - - - ns VCC = 4.5 V - 20 40 - 50 - 60 ns VCC = 5.0 V; CL = 15 pF - 17 - - - - - ns VCC = 4.5 V - 14 28 - 35 - 42 ns VCC = 5.0 V; CL = 15 pF - 11 - - - - - ns - 7 15 - 19 - 22 ns 16 6 - 20 - 24 - ns 20 9 - 25 - 30 - ns 20 8 - 25 - 30 - ns 20 2 - 25 - 30 - ns 20 7 - 25 - 30 - ns 20 10 - 25 - 30 - ns 7 1 - 9 - 11 - ns 0 7 - 0 - 0 - ns VCC = 5.0 V; CL = 15 pF CPD Typ 40 C to +85 C 40 C to +125 C Unit per package; VI = GND to VCC [3] CE, CP to Q7, Q7; see Figure 7 [1] 74HCT165 tpd propagation delay PL to Q7, Q7; see Figure 8 D7 to Q7, Q7; see Figure 9 tt tW transition time Q7, Q7 output; see Figure 7 pulse width CP input; see Figure 7 VCC = 4.5 V VCC = 4.5 V [2] PL input; see Figure 8 VCC = 4.5 V trec recovery time PL to CP, CE; see Figure 8 VCC = 4.5 V tsu set-up time DS to CP, CE; see Figure 10 VCC = 4.5 V CE to CP and CP to CE; see Figure 10 VCC = 4.5 V Dn to PL; see Figure 11 VCC = 4.5 V th hold time DS to CP, CE and Dn to PL; see Figure 10 VCC = 4.5 V CE to CP and CP to CE; see Figure 10 VCC = 4.5 V 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 9 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Table 7. Dynamic characteristics ...continued GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 12 Symbol Parameter fmax maximum frequency 25 C Conditions power dissipation capacitance [1] Min Typ Max Min Max Min Max 26 44 - 21 - 17 - MHz - 48 - - - - - MHz - 35 - - - - - pF CP input; see Figure 7 VCC = 4.5 V VCC = 5.0 V; CL = 15 pF CPD 40 C to +85 C 40 C to +125 C Unit [3] per package; VI = GND to VCC 1.5 V tpd is the same as tPHL and tPLH. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (CL VCC2 fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. 12. Waveforms IPD[ 9, &3RU&(LQSXW 90 *1' W: W3+/ 92+ W3/+ 90 4RU4RXWSXW 92/ W7+/ W7/+ PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. The clock (CP) or clock enable (CE) to output (Q7 or Q7) propagation delays, the clock pulse width, the maximum clock frequency and the output transition times 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 10 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 9, 90 3/LQSXW *1' W: WUHF 9, &(&3LQSXW 90 *1' W3+/ 92+ 90 4RU4RXWSXW 92/ PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 8. The parallel load (PL) pulse width, the parallel load to output (Q7 or Q7) propagation delays, the parallel load to clock (CP) and clock enable (CE) recovery time 9, 90 'LQSXW *1' W3/+ W3+/ 92+ 90 4RXWSXW 92/ W3/+ W3+/ 92+ 90 4RXWSXW 92/ PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. The data input (D7) to output (Q7 or Q7) propagation delays when PL is LOW 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 11 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 9, 90 &3&(LQSXW *1' WK WK WVX WVX 9, 90 '6LQSXW *1' WVX W: 9, 90 &3&(LQSXW *1' PQD The shaded areas indicate when the input is permitted to change for predictable output performance Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. (1) CE may change only from HIGH-to-LOW while CP is LOW, see Section 1. Fig 10. The set-up and hold times from the serial data input (DS) to the clock (CP) and clock enable (CE) inputs, from the clock enable input (CE) to the clock input (CP) and from the clock input (CP) to the clock enable input (CE) 9, 'QLQSXW *1' 90 90 WVX WK WVX WK 9, 3/LQSXW *1' 90 90 PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 11. The set-up and hold times from the data inputs (Dn) to the parallel load input (PL) Table 8. Measurement points Type Input Output VI VM VM 74HC165 VCC 0.5VCC 0.5VCC 74HCT165 3V 1.3 V 1.3 V 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 12 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 9, W: QHJDWLYH SXOVH 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 9 90 90 90 W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch Fig 12. Test circuit for measuring switching times Table 9. Test data Type Input VI tr, tf CL RL tPHL, tPLH 74HC165 VCC 6 ns 15 pF, 50 pF 1 k open 74HCT165 3V 6 ns 15 pF, 50 pF 1 k open 74HC_HCT165 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 S1 position (c) NXP Semiconductors N.V. 2015. All rights reserved. 13 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 13. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / H Z 0 ES GHWDLO; PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP LQFKHV R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7( Fig 13. Package outline SOT109-1 (SO16) 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 14 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / GHWDLO; Z 0 ES H PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ 02 (8523($1 352-(&7,21 ,668('$7( Fig 14. Package outline SOT338-1 (SSOP16) 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 15 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ SLQLQGH[ $ $ $ /S / H GHWDLO; Z 0 ES PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ 02 (8523($1 352-(&7,21 ,668('$7( Fig 15. Package outline SOT403-1 (TSSOP16) 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 16 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register '+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV 627 WHUPLQDOVERG\[[PP % ' $ $ $ ( F GHWDLO; WHUPLQDO LQGH[DUHD WHUPLQDO LQGH[DUHD & H H E \ \ & Y 0 & $ % Z 0 & / (K H 'K ; PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 PP $ PD[ $ E F ' 'K ( (K H / Y Z \ \ H 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& -(,7$ 627 02 (8523($1 352-(&7,21 ,668('$7( Fig 16. Package outline SOT763-1 (DHVQFN16) 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 17 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 14. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT165 v.4 20151228 Product data sheet - 74HC_HCT165 v.3 Modifications: 74HC_HCT165 v.3 Modifications: 74HC_HCT165_CNV v.2 74HC_HCT165 Product data sheet * Type numbers 74HC165N and 74HCT165N (SOT38-4) removed. 20080314 Product data sheet - 74HC_HCT165_CNV v.2 * The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. * * Legal texts have been adapted to the new company name where appropriate. * Family data added, see Section 10 "Static characteristics" Package SOT763-1 (DHVQFN16) added to Section 4 "Ordering information" and Section 13 "Package outline". December 1990 Product specification - All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 - (c) NXP Semiconductors N.V. 2015. All rights reserved. 18 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT165 Product data sheet Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 19 of 21 74HC165; 74HCT165 NXP Semiconductors 8-bit parallel-in/serial out shift register Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT165 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 December 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 20 of 21 NXP Semiconductors 74HC165; 74HCT165 8-bit parallel-in/serial out shift register 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 28 December 2015 Document identifier: 74HC_HCT165