Am29F016D 4
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29F016D Device Bus Operations ................................ 10
Requirements for Reading Array Data ................................... 10
Writing Commands/Command Sequences ............................ 10
Program and Erase Operation Status .................................... 11
Standby Mode ........................................................................ 11
RESET#: Hardware Reset Pin ............................................... 11
Output Disable Mode.............................................................. 11
Table 2. Sector Address Table........................................................ 12
Autoselect Mode..................................................................... 13
Table 3. Am29F016D Autoselect Codes (High Voltage Method).... 13
Sector Group Protection/Unprotection.................................... 13
Table 4. Sector Group Addresses................................................... 13
Temporary Sector Group Unprotect ....................................... 13
Figure 1. Temporary Sector Group Unprotect Operation................ 14
Hardware Data Protection ...................................................... 14
Low VCC Write Inhibit...................................................................... 14
Write Pulse “Glitch” Protection ........................................................ 14
Logical Inhibit .................................................................................. 14
Power-Up Write Inhibit .................................................................... 14
Common Flash Memory Interface (CFI) . . . . . . . 15
Table 5. CFI Query Identification String .......................................... 15
Table 6. System Interface String..................................................... 15
Table 7. Device Geometry Definition .............................................. 16
Table 8. Primary Vendor-Specific Extended Query ........................ 16
Command Definitions . . . . . . . . . . . . . . . . . . . . . 17
Reading Array Data ................................................................ 17
Reset Command..................................................................... 17
Autoselect Command Sequence ............................................ 17
Byte Program Command Sequence....................................... 17
Unlock Bypass Command Sequence.............................................. 18
Figure 2. Program Operation .......................................................... 18
Chip Erase Command Sequence ........................................... 18
Sector Erase Command Sequence ........................................ 19
Erase Suspend/Erase Resume Commands........................... 19
Figure 3. Erase Operation............................................................... 20
Command Definitions ............................................................. 21
Table 9. Am29F016D Command Definitions................................... 21
Write Operation Status . . . . . . . . . . . . . . . . . . . . 22
DQ7: Data# Polling................................................................. 22
Figure 4. Data# Polling Algorithm ................................................... 22
RY/BY#: Ready/Busy# ........................................................... 23
DQ6: Toggle Bit I .................................................................... 23
DQ2: Toggle Bit II ................................................................... 23
Reading Toggle Bits DQ6/DQ2 .............................................. 23
DQ5: Exceeded Timing Limits ................................................ 24
DQ3: Sector Erase Timer ....................................................... 24
Figure 5. Toggle Bit Algorithm........................................................ 24
Table 10. Write Operation Status................................................... 25
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 26
Figure 6. Maximum Negative Overshoot Waveform ...................... 26
Figure 7. Maximum Positive Overshoot Waveform........................ 26
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 26
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 27
TTL/NMOS Compatible .......................................................... 27
CMOS Compatible.................................................................. 27
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 8. Test Setup...................................................................... 28
Table 11. Test Specifications......................................................... 28
Key to Switching Waveforms. . . . . . . . . . . . . . . . 28
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 29
Read-only Operations............................................................. 29
Figure 9. Read Operation Timings ................................................. 29
Figure 10. RESET# Timings .......................................................... 30
Erase/Program Operations ..................................................... 31
Figure 11. Program Operation Timings.......................................... 32
Figure 12. Chip/Sector Erase Operation Timings .......................... 33
Figure 13. Data# Polling Timings (During Embedded Algorithms). 34
Figure 14. Toggle Bit Timings (During Embedded Algorithms)...... 34
Figure 15. DQ2 vs. DQ6................................................................. 35
Figure 16. Temporary Sector Group Unprotect Timings ................ 35
Erase and Program Operations .............................................. 36
Alternate CE# Controlled Writes .................................................... 36
Figure 17. Alternate CE# Controlled Write Operation Timings ...... 37
Erase and Programming Performance . . . . . . . 38
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 38
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 38
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 39
TS 040—40-Pin Standard Thin Small Outline Package ......... 39
TSR040—40-Pin Reverse Thin Small Outline Package......... 40
TS 048—48-Pin Standard Thin Small Outline Package ......... 41
TSR048—48-Pin Reverse Thin Small Outline Package......... 42
SO 044—44-Pin Small Outline Package ................................ 43
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 44
Revision A (May 1997) ........................................................... 44
Revision B (January 1998) ..................................................... 44
Revision B+1 (January 1998) ................................................. 44
Revision B+2 (April 1998)....................................................... 44
Revision C (January 1999) ..................................................... 44
Revision C+1 (March 23, 1999).............................................. 44
Revision C+2 (May 17, 1999) ................................................. 44
Revision C+3 (July 2, 1999) ................................................... 44
Revision D (November 16, 1999) ........................................... 44
Revision E (May 19, 2000) ..................................................... 45
Revision E+1 (December 4, 2000) ......................................... 45
Revision E+2 (March 23, 2001) .............................................. 45
Revision E+3 (May 27, 2004) ................................................. 45