  
3
2
4
5
DBV PACKAGE
(TOP VIEW)
1IN
GND
EN
OUT
NR
Fixed Option
3
2
4
6
DBV PACKAGE
(TOP VIEW)
1
IN
GND
EN
OUT
NR
5FB
Adjustable Option
TPS73028
RIPPLE REJECTION
vs
FREQUENCY
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection (dB)
Frequency (Hz)
IOUT = 10 mA
50
0
VIN = 3.8 V
COUT = 10 µF
CNR = 0.01 µF
IOUT = 200 mA
20
30
60
70
90
100
0
0.05
0.10
0.15
0.20
0.25
0.30
100 1 k 10 k 100 k
Frequency (Hz)
IOUT = 1 mA
VIN = 3.8 V
COUT = 2.2 µF
CNR = 0.1 µF
IOUT = 200 mA
TPS73028
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Output Spectral Noise Density (µV/√Hz)
IN
EN
OUT
NR
GND
YZQ PACKAGE
(TOP VIEW)
A3 A1
C3 C1
B2
TPS730xx
www.ti.com
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
LOW-NOISE, HIGH PSRR, RF 200-mA
LOW-DROPOUT LINEAR REGULATORS
Check for Samples: TPS730xx
1FEATURES DESCRIPTION
234•200-mA RF Low-Dropout Regulator The TPS730xx family of low-dropout (LDO)
With Enable low-power linear voltage regulators features high
power-supply rejection ratio (PSRR), ultralow-noise,
•Available in Fixed Voltages from 1.8V to 3.3V fast start-up, and excellent line and load transient
and Adjustable (1.22V to 5.5V) responses a small SOT23 package. NanoStar™
•High PSRR (68dB at 100Hz) packaging gives an ultrasmall footprint as well as an
•Ultralow-Noise (33μVRMS, TPS73018) ultralow profile and package weight, making it ideal
for portable applications such as handsets and PDAs.
•Fast Start-Up Time (50μs) Each device in the family is stable, with a small 2.2μF
•Stable With a 2.2μF Ceramic Capacitor ceramic capacitor on the output. The TPS730xx
•Excellent Load/Line Transient Response family uses an advanced, proprietary BiCMOS
fabrication process to yield low dropout voltages (e.g.,
•Very Low Dropout Voltage (120mV at 200mA) 120mV at 200mA, TPS73030). Each device achieves
•5- and 6-Pin SOT23 (DBV), and Wafer Chip fast start-up times (approximately 50μs with a
Scale (YZQ) Packages 0.001μF bypass capacitor) while consuming low
quiescent current (170μA typical). Moreover, when
APPLICATIONS the device is placed in standby mode, the supply
•RF: VCOs, Receivers, ADCs current is reduced to less than 1μA. The TPS73018
exhibits approximately 33μVRMS of output voltage
•Audio noise at 1.8V output with a 0.01μF bypass capacitor.
•Cellular and Cordless Telephones Applications with analog components that are
•Bluetooth®, Wireless LAN noise-sensitive, such as portable RF electronics,
•Handheld Organizers, PDAs benefit from the high PSRR and low-noise features
as well as the fast response time.
Figure 1.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2NanoStar is a trademark of Texas Instruments.
3Bluetooth is a registered trademark of Bluetooth Sig, Inc.
4All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. ©2004–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS730xx
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT VOUT
TPS730xx yy yz XX is nominal output voltage (for example, 28 = 2.8V, 01 = Adjustable).
YYY is package designator.
Zis package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted).(1)
UNIT
VIN range –0.3V to +6V
VEN range –0.3V to +6V
VOUT range –0.3V to VIN + 0.3V
Peak output current Internally limited
ESD rating, HBM 2kV
ESD rating, CDM 500V
Continuous total power dissipation See Dissipation Ratings Table
Junction temperature range –40°C to +150°C
Storage temperature range, Tstg –65°C to +150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2Submit Documentation Feedback ©2004–2011, Texas Instruments Incorporated
TPS730xx
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SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
DISSIPATION RATINGS TABLE TA≤+25°C TA= +70°C TA= +85°C
DERATING FACTOR POWER POWER POWER
BOARD PACKAGE RθJC RθJA ABOVE TA= +25°C RATING RATING RATING
Low-K(1) DBV 65°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mW
High-K(2) DBV 65°C/W 180°C/W 5.6mW/°C 560mW 310mW 225mW
Low-K(1) YZQ 27°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mW
High-K(2) YZQ 27°C/W 190°C/W 5.3mW/°C 530mW 296mW 216mW
(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch ×3-inch, two layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch ×3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range TJ=–40 to +125°C, VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1mA,
COUT = 10μF, CNR = 0.01μF (unless otherwise noted). Typical values are at +25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage(1) 2.7 5.5 V
IOUT Continuous output current 0 200 mA
VFB Internal reference (TPS73001) 1.201 1.225 1.250 V
Output voltage range (TPS73001) VFB 5.5 –VDO V
Output voltage accuracy 0μA≤IOUT ≤200mA, 2.75V ≤VIN <5.5V –2% VOUT(nom) +2% V
Line regulation (ΔVOUT%/ΔVIN)(1) VOUT + 1V ≤VIN ≤5.5V 0.05 %/V
Load regulation (ΔVOUT%/ΔIOUT) 0μA≤IOUT ≤200mA, TJ= +25°C 5 mV
Dropout voltage(2)(VIN = VOUT(nom) –0.1V) IOUT = 200mA 120 210 mV
Output current limit VOUT = 0V 285 600 mA
GND pin current 0μA≤IOUT ≤200mA 170 250 μA
Shutdown current(3) VEN = 0V, 2.7V ≤VIN ≤5.5V 0.07 1 μA
FB pin current VFB = 1.8V 1 μA
Power-supply ripple rejection TPS73028 f = 100Hz, TJ= +25°C, IOUT = 200mA 68 dB
BW = 200Hz to 100kHz,
Output noise voltage (TPS73018) CNR = 0.01μF 33 μVRMS
IOUT = 200mA
Time, start-up (TPS73018) RL= 14Ω, COUT = 1μF CNR = 0.001μF 50 μs
High level enable input voltage 2.7V ≤VIN ≤5.5V 1.7 VIN V
Low level enable input voltage 2.7V ≤VIN ≤5.5V 0 0.7 V
EN pin current VEN = 0 –1 1 μA
UVLO threshold VCC rising 2.25 2.65 V
UVLO hysteresis 100 mV
(1) Minimum VIN is 2.7V or VOUT + VDO, whichever is greater.
(2) Dropout is not measured for the TPS73018 and TPS73025 since minimum VIN = 2.7V.
(3) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low.
©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
_+
Thermal
Shutdown
Bandgap
Reference
1.22V
Current
Sense
R2
GND
EN
SHUTDOWN
Vref
UVLO
ILIM
External to
the Device
R1
UVLO
2.45V
250 kΩNR
FB
59 k
QuickStart
OUTIN
IN
_+
Thermal
Shutdown
Current
Sense
R1
R2
GND
EN
SHUTDOWN
Vref
UVLO
ILIM
250 kΩNR
QuickStart
Bandgap
Reference
1.22V
UVLO
2.45V
R2 = 40 kΩ
IN
IN OUT
TPS730xx
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAMS
ADJUSTABLE VERSION
FIXED VERSION
Table 1. Terminal Functions
TERMINAL
SOT23 SOT23 WCSP
NAME ADJ FIXED FIXED DESCRIPTION
Connecting an external capacitor to this pin bypasses noise generated by the internal
NR 4 4 B2 bandgap. This improves power-supply rejection and reduces output noise.
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator
EN 3 3 A3 into shutdown mode. EN can be connected to IN if not used.
FB 5 N/A N/A This terminal is the feedback input voltage for the adjustable device.
GND 2 2 A1 Regulator ground
IN 1 1 C3 Input to the device.
OUT 6 5 C1 Output of the regulator.
4Submit Documentation Feedback ©2004–2011, Texas Instruments Incorporated
2.795
2.796
2.797
2.798
2.799
2.800
2.801
2.802
2.803
2.804
2.805
0 50 100 150 200
IOUT (mA)
VIN = 3.8 V
COUT = 10 µF
TJ = 25°C
VOUT (V)
0
50
100
150
200
250
−40−25−10 5 20 35 50 65 80 95 110 125
TJ (°C)
IOUT = 1 mA
VIN = 3.8 V
COUT = 10 µF
IOUT = 200 mA
IGND (µA)
2.775
2.780
2.785
2.790
2.795
2.800
2.805
−40−25−10 5 20 35 50 65 80 95 110 125
TJ (°C)
IOUT = 200 mA
IOUT = 1 mA
VIN = 3.8 V
COUT = 10 µF
VOUT (V)
60
50
40
30
20
10
0
RMS Output Noise ( V )mRMS
0.001 0.01 0.1
C ( F)m
NR
BW = 100 Hz to 100 kHz
V = 2.8 V
I = 200 mA
C = 10 F
OUT
OUT
OUT m
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
100 1 k 10 k 100 k
Frequency (Hz)
VIN = 3.8 V
IOUT = 200 mA
COUT = 10 µF
CNR = 0.1 µF
CNR = 0.001 µF
CNR = 0.0047 µF
CNR = 0.01 µF
Output Spectral Noise Density (µV/√Hz)
3
Time (µs)
0 604020 80 100 140120 160 180 200
VIN = 3.8 V
VOUT = 2.8 V
IOUT = 200 mA
COUT = 2.2 µF
TJ = 25°C
1
2
0
0
2CNR = 0.0047 µF
CNR = 0.01 µF
4
CNR = 0.001 µF
VEN (V)VOUT (V)
Time (µs)
0 302010 40 50 7060 80 90 100
IOUT = 200 mA
COUT = 2.2 µF
CNR = 0.01 µF
0
-20
3.8
dv
dt +0.4 V
µs
20
4.8
VIN (mV) VOUT (mV)
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection (dB)
Frequency (Hz)
IOUT = 10 mA
50
0
VIN = 3.8 V
COUT = 10 µF
CNR = 0.01 µF
IOUT = 200 mA
20
30
60
70
90
100
TPS730xx
www.ti.com
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
TYPICAL CHARACTERISTICS (SOT23 PACKAGE)
TPS73028 TPS73028 TPS73028
OUTPUT VOLTAGE OUTPUT VOLTAGE GROUND CURRENT
vs vs vs
OUTPUT CURRENT JUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 2. Figure 3. Figure 4.
TPS73028 OUTPUT SPECTRAL TPS73028
ROOT MEAN SQUARE OUTPUT
NOISE DENSITY NOISE DROPOUT VOLTAGE
vs vs vs
FREQUENCY CNR JUNCTION TEMPERATURE
Figure 5. Figure 6. Figure 7.
TPS73028 TPS73028 OUTPUT VOLTAGE,
RIPPLE REJECTION ENABLE VOLTAGE
vs vs TPS73028
FREQUENCY TIME (START-UP) LINE TRANSIENT RESPONSE
Figure 8. Figure 9. Figure 10.
©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
500 mV/div
1s/div
VIN VOUT
VOUT = 3 V
RL = 15 Ω
100
50
0 20 40 60 80 100 120
150
200
250
140 160 180 200
0
IOUT (mA)
TJ = 125°C
TJ = 25°C
TJ = −55°C
VDO (mV)
Time (µs)
0
0 15010050 200 250 350300 400 450
20
0
−20
100
500
VIN = 3.8 V
COUT = 10 µF
−40
200
300 di
dt +0.02A
µs
1mA
IOUT (mA) ∆VOUT (mV)
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.20
IOUT (A)
1
Region of Instability
Region of Stability
COUT = 2.2 µF
VIN = 5.5 V, VOUT ≥ 1.5 V
TJ = −40°C to 125°C
ESR, Equivalent Series Resistance (Ω)
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.20
IOUT (A)
1
Region of Instability
Region of Stability
COUT = 10 µF
VIN = 5.5 V
TJ = −40°C to 125°C
ESR, Equivalent Series Resistance (Ω)
TPS730xx
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
www.ti.com
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
DROPOUT VOLTAGE
TPS73028 vs
LOAD TRANSIENT RESPONSE POWER-UP/POWER-DOWN OUTPUT CURRENT
Figure 11. Figure 12. Figure 13.
TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR) EQUIVALENT SERIES RESISTANCE (ESR)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 14. Figure 15.
6Submit Documentation Feedback ©2004–2011, Texas Instruments Incorporated
TPS730xx
GNDEN NR
IN OUT
VIN VOUT
VIN VOUT
2.2µF
0.01µF(1)
0.1µF
NOTE: (1) This capacitor is optional.
TPS730xx
www.ti.com
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
APPLICATION INFORMATION
The TPS730xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170μA typically), and enable-input to reduce supply currents to less than 1μA when
the regulator is turned off.
A typical application circuit is shown in Figure 16.
Figure 16. Typical Application Circuit
External Capacitor Requirements
A 0.1μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS730xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A
higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device
is located several inches from the power source.
Like most low dropout regulators, the TPS730xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2μF. Any 2.2μF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load
current is not expected to exceed 100mA, a 1.0μF ceramic capacitor can be used.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS730xx has an NR pin which
is connected to the voltage reference through a 250kΩinternal resistor. The 250kΩinternal resistor, in
conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the
voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate
properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR
drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor should be no more than 0.1μF to ensure that it is fully charged
during the quickstart time provided by the internal switch shown in the Functional Block Diagrams.
As an example, the TPS73018 exhibits only 33μVRMS of output voltage noise using a 0.01μF ceramic bypass
capacitor and a 2.2μF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the NR pin that is created by the internal 250kΩresistor and external
capacitor.
Board Layout Recommendation to Improve PSRR and Noise Performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board
be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND
pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND
pin of the device.
©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
PD(max)+TJmax*TA
RQJA
PD+ǒVIN*VOUTǓ IOUT
VOUT +VREF ǒ1)R1
R2Ǔ
R =
1-1´R2
VOUT
VREF
C1+(3 x 10*7) x (R1)R2)
(R1x R2)
TPS730xx
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
www.ti.com
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature
should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max).
The maximum power dissipation limit is determined using Equation 1:
Where:
•TJmax is the maximum allowable junction temperature.
•RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
•TAis the ambient temperature. (1)
The regulator dissipation is calculated using Equation 2:
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
Programming the TPS73001 Adjustable LDO Regulator
The output voltage of the TPS73001 adjustable regulator is programmed using an external resistor divider as
shown in Figure 17. The output voltage is calculated using Equation 3:
Where:
•VREF = 1.225V typ (the internal reference voltage) (3)
Resistors R1and R2should be chosen for approximately 50μA divider current. Lower value resistors can be used
for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended
design procedure is to choose R2= 30.1kΩto set the divider current at 50μA, C1= 15pF for stability, and then
calculate R1using Equation 4:
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages <1.8V, the value of this capacitor should be 100pF. For voltages >
1.8V, the approximate value of this capacitor can be calculated as shown in Equation 5:
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8V is chosen, then the minimum
recommended output capacitor is 4.7μF instead of 2.2μF.
8Submit Documentation Feedback ©2004–2011, Texas Instruments Incorporated
GNDNR FB
IN OUT
EN
VIN VOUT
R1C1
R2
1 Fm
2.2 Fm
0.01 Fm
TPS73001
OUTPUTVOLTAGE
PROGRAMMINGGUIDE
R1R2C1
2.5V
3.3V
3.6V
1.22V
OUTPUT
VOLTAGE
31.6kW
short
51kW
59kW
open
30.1kW
30.1kW
30.1kW
0pF
22pF
15pF
15pF
TPS730xx
www.ti.com
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
Figure 17. TPS73001 Adjustable LDO Regulator Programming
Regulator Protection
The TPS730xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (for example, during power-down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting
might be appropriate.
The TPS730xx features internal current limiting and thermal protection. During normal operation, the TPS730xx
limits output current to approximately 400mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately +165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately +140°C, regulator operation
resumes.
©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
0.625 Max
NOTES:A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. NanoStar package configuration.
D. This package is tin-lead (SnPb); consult the factory for availability of lead-free material.
NanoStar is a trademark of Texas Instruments.
1,30
1,34
0,79
0,84
TPS730xx
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
www.ti.com
TPS730xxYZQ NanoStar™Wafer Chip Scale Information
Figure 18. NanoStar™Wafer Chip Scale Package
10 Submit Documentation Feedback ©2004–2011, Texas Instruments Incorporated
TPS730xx
www.ti.com
SBVS054I –NOVEMBER 2004–REVISED FEBRUARY 2011
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (October, 2007) to Revision I Page
•Corrected units in y-axis of Figure 6 ..................................................................................................................................... 5
©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 11
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS73001DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73001DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73001DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73001DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73018DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73018DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73018DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73018DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73018YZQR ACTIVE DSBGA YZQ 5 TBD Call TI Call TI
TPS73018YZQT ACTIVE DSBGA YZQ 5 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS73025DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73025DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73025DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73025DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73025YZQR ACTIVE DSBGA YZQ 5 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS73025YZQT ACTIVE DSBGA YZQ 5 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS730285DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS730285DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS730285DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS730285DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS730285YZQR ACTIVE DSBGA YZQ 5 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS730285YZQT ACTIVE DSBGA YZQ 5 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS73028DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73028DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73028DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73028DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73028YZQR ACTIVE DSBGA YZQ 5 3000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS73028YZQT ACTIVE DSBGA YZQ 5 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS73030DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73030DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73030DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73030DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73030YZQR OBSOLETE DSBGA YZQ 5 TBD Call TI Call TI
TPS73030YZQT OBSOLETE DSBGA YZQ 5 TBD Call TI Call TI
TPS73033DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73033DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS73033DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73033DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73047DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73047DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73047DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS73047DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 4
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS73001DBVR SOT-23 DBV 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73001DBVR SOT-23 DBV 6 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS73001DBVT SOT-23 DBV 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73018DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73018DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73018YZQT DSBGA YZQ 5 250 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS73025DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73025DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73025YZQR DSBGA YZQ 5 3000 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS73025YZQT DSBGA YZQ 5 250 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS730285DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS730285DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS730285YZQR DSBGA YZQ 5 3000 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS730285YZQT DSBGA YZQ 5 250 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS73028DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73028DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73028YZQR DSBGA YZQ 5 3000 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
TPS73028YZQT DSBGA YZQ 5 250 178.0 8.4 0.98 1.46 0.69 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS73030DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73030DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73033DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73033DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS73033DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS73047DBVR SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS73047DBVT SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS73001DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0
TPS73001DBVR SOT-23 DBV 6 3000 203.0 203.0 35.0
TPS73001DBVT SOT-23 DBV 6 250 180.0 180.0 18.0
TPS73018DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS73018DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS73018YZQT DSBGA YZQ 5 250 217.0 193.0 35.0
TPS73025DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS73025DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS73025YZQR DSBGA YZQ 5 3000 217.0 193.0 35.0
TPS73025YZQT DSBGA YZQ 5 250 217.0 193.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS730285DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS730285DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS730285YZQR DSBGA YZQ 5 3000 217.0 193.0 35.0
TPS730285YZQT DSBGA YZQ 5 250 217.0 193.0 35.0
TPS73028DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS73028DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS73028YZQR DSBGA YZQ 5 3000 217.0 193.0 35.0
TPS73028YZQT DSBGA YZQ 5 250 217.0 193.0 35.0
TPS73030DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS73030DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS73033DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS73033DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TPS73033DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS73047DBVR SOT-23 DBV 5 3000 203.0 203.0 35.0
TPS73047DBVT SOT-23 DBV 5 250 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 3
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