FSFM260N / FSFM300N Green-Mode Fairchild Power Switch (FPSTM) Features Description ! Internal Avalanche-Rugged SenseFET The FSFM260/300 is an integrated Pulse Width Modulator (PWM) and SenseFET specifically designed for high-performance offline Switch Mode Power Supplies (SMPS) with minimal external components. ! Advanced Burst-Mode Operation Consumes Under 1W at 240VAC and 0.5W Load ! Precision Fixed Operating Frequency: 67kHz ! Internal Startup Circuit ! Over-Voltage Protection (OVP) ! Overload Protection (OLP) ! Internal Thermal Shutdown Function (TSD) ! Abnormal Over-Current Protection (AOCP) ! Auto-Restart Mode ! Under-Voltage Lockout (UVLO) with Hysteresis ! Low Operating Current: 2.5mA ! Built-in Soft-Start: 15ms This device is an integrated high-voltage powerswitching regulator that combines an avalanche-rugged SenseFET with a current-mode PWM control block. The PWM controller includes an integrated fixed-frequency oscillator, under-voltage lockout, leading-edge blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated precise-current sources for a loop compensation, and self-protection circuitry. Compared with discrete MOSFET and PWM controller solutions, it can reduce total cost, component count, size, and weight while simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform for cost-effective designs of flyback converters. Applications ! Power Supply for LCD TV and Monitor, VCR, SVR, STB, DVD, and DVD Recorder ! Adapter Related Resources Visit: http://www.fairchildsemi.com/apnotes/ for: ! AN-4134: Design Guidelines for Offline Forward ! ! ! ! ! ! Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Offline Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4140: Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4145: Electromagnetic Compatibility for Power Converters AN-4147: Design Guidelines for RCD Snubber of Flyback Converters AN-4148: Audible Noise Reduction Techniques for Fairchild Power Switch (FPSTM) Applications (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) April 2009 Maximum Output Power(1) Product Number PKG.(5) Operating Current RDS(ON) Temp. Limit Max. FSFM260N 8-DIP -25 to +85C 1.5A FSFM300N 8-DIP -25 to +85C 1.6A 230VAC15%(2) 85-265VAC Adapter(3) Open Frame(4) Adapter(3) Open Frame(4) 2.6 23W 35W 17W 26W 2.2 26W 40W 20W 30W Replaces Devices FSDM0465RS FSQ0465RS Notes: 1. The junction temperature can limit the maximum output power. 2. 230VAC or 100/115VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient temperature. 4. Maximum practical continuous power in an open-frame design at 50C ambient. 5. Eco status for both the FSFM2600N and FSFM300NS is RoHS. For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Eco Status: RoHS. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 2 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Ordering Information FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Application Diagram VO AC IN VSTR ILIM Drain PWM GND FB V CC FSFM260 Rev. 00 Figure 1. Typical Flyback Application Internal Block Diagram Vstr VCC Drain 5 2 6 7 8 VCC VBURL/VBURH VCC VCC FB 3 Idelay Vref OSC VCC good 8V/12V IFB 2.5R R ILIM 4 PWM Normal Burst S Q LEB 250ns SoftStart R Q Gate driver VSD VCC VOVP S Q LPF 1 VOCP GND R Q TSD VCC good FSFM260 Rev.00 Figure 2. Internal Block Diagram (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 3 Drain GND VCC 8-DIP Drain FB Drain ILIM VSTR FSFM260 Rev.1.0.0 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1 GND Ground. This pin is the control ground and the SenseFET source. 2 VCC Power Supply. This pin is the positive supply input, providing internal operating current for both startup and steady-state operation. 3 FB Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection triggers, which shuts down the FPS. 4 ILIM Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA current source is diverted to the parallel combination of an internal 2.8k resistor and any external resistor to GND on this pin to determine the peak current limit. 5 VSTR Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled. It is not recommended to connect VSTR and drain together. 6,7,8 Drain SenseFET Drain. High-voltage power SenseFET drain connection. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 4 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C, unless otherwise specified. Symbol Parameter Min. Max. Unit VSTR VSTR Pin Voltage 650 V VDS Drain Pin Voltage 650 V VCC Supply Voltage (6) VFB Feedback Voltage Range IDM Drain Current Pulsed ID -0.3 Continuous Drain Current of FSFM260(7) Continuous Drain Current of FSFM300(7) 21 V 8.0 V 9.6 A TC = 25C 2.2 TC = 100C 1.4 TC = 25C 2.8 TC = 100C 1.7 FSFM260 120 FSFM300 190 A EAS Single Pulsed Avalanche Energy(8) PD Total Power Dissipation (TC=25C) TJ Operating Junction Temperature Internally Limited C TA Operating Ambient Temperature -25 +85 C Storage Temperature -55 +150 C Electrostatic Discharge Capability Human Body Model, JESD22-A114 2.0 Electrostatic Discharge Capability, Charged Device Model, JESD22-C110 2.0 TSTG ESD mJ 1.5 W kV Notes: 6. VFB is internally clamped and its maximum clamping current capability is 100A. 7. Repetitive rating: pulse-width limited by maximum junction temperature. 8. L=14mH, starting TJ=25C. Thermal Impedance TA = 25C unless otherwise specified. Symbol JA Parameter Junction-to-Ambient Thermal Package Resistance(9) (10) JC Junction-to-Case Thermal Resistance JT Junction-to-Top Thermal Resistance(11) 8-DIP Value Unit 80 C/W 20 35 C/W C/W Notes: 9. Free standing with no heat-sink under natural convection. 10. Infinite cooling condition - refer to the SEMI G30-88. 11. Measured on the package top surface. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 5 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Absolute Maximum Ratings TA = 25C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit SenseFET Section Drain Source Breakdown Voltage VCC = 0V, ID = 250A IDSS1 Zero Gate Voltage Drain Current1 VDS = 650V, VGS = 0V, TC = 25C 250 A IDSS2 Zero Gate Voltage Drain Current2 VDS = 520V, VGS = 0V, TC = 125C 250 A 2.20 2.60 1.76 2.20 BVDSS RDS(ON) Static Drain Source on Resistance of FSFM260(12) Static Drain Source on Resistance of FSFM300(12) COSS Output Capacitance of FSFM260 td(on) Turn-On Delay Time of FSFM260 tr td(off) tf Rise Time of FSFM260 Turn-Off Delay Time of FSFM260 Output Capacitance of FSFM300 td(on) Turn-On Delay Time of FSFM300 tr tf Rise Time of FSFM300 Turn-Off Delay Time of FSFM300 V VGS = 10V, ID = 2.5A VGS = 0V, VDS = 25V, f = 1MHz 60 pF 23 20 VDD = 325V, ID = 5A ns 65 Fall Time of FSFM260 COSS td(off) 650 27 VGS = 0V, VDS = 25V, f = 1MHz 75 pF 14 26 VDD = 325V, ID = 5A ns 32 Fall Time of FSFM300 25 Control Section fOSC fSTABLE fOSC IFB Switching Frequency VFB = 3V 61 67 73 kHz Switching Frequency Stability 13V VCC 18V 0 1 3 % -25C TA 85C 0 5 10 % 0.7 0.9 1.1 mA 71 77 83 % 0 % Switching Frequency Feedback Source Current DMAX Maximum Duty Cycle DMIN Minimum Duty Cycle VSTART VSTOP tS/S Variation(13) VFB = GND UVLO Threshold Voltage VFB = GND Internal Soft-Start Time VFB = 3V 11 12 13 V 7 8 9 V 10 15 20 ms Burst Mode Section VBURH VBURL Burst Mode Voltages VCC = 14V (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 0.50 V 0.35 V www.fairchildsemi.com 6 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Electrical Characteristics TA = 25C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit Protection Section VSD IDELAY Shutdown Feedback Voltage VFB 5.5V 5.5 6.0 6.5 V Shutdown Delay Current VFB = 5V 3.5 5.0 6.5 A tLEB Leading Edge Blanking Time(13) ILIMIT Peak Current Limit VOVP Over-Voltage Protection TSD Thermal Shutdown 200 FSFM260 FSFM300 TJ = 25C, di/dt = 200mA/s Temperature(13) ns 1.32 1.50 1.68 1.41 1.60 1.79 18.0 19.0 20.5 125 140 A V C Total Device Section IOP ISTART ICH VSTR Operating Supply Current VFB = GND, VCC = 14V 1 3 5 mA Start Current VCC = 10V (before VCC reaches VSTART) 150 200 250 A Startup Charging Current VCC = 0V, VSTR=min. 50V 0.70 0.85 1.00 mA Minimum VSTR Supply Voltage at ISTRIN=ISTART 24 V Notes: 12. Pulse test: pulse width 300s, duty 2%. 13. Guaranteed by design; not tested in production. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 7 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Electrical Characteristics (Continued) 1.2 Normalized Normalized Graphs are normalized at TA= 25C. 1.0 0.8 1.2 1.0 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -25 0 25 50 75 100 0.0 -25 125 0 Temperature [C] 1.2 1.0 0.8 0.4 0.2 0.2 75 100 0.0 -25 125 0 Normalized Normalized 1.2 1.0 0.8 125 0.8 0.4 0.4 0.2 0.2 75 100 0.0 -25 125 0 25 50 75 100 125 Temperature [C] Temperature [C] Figure 8. Switching Frequency (fOSC) vs. TA Figure 9. Maximum Duty Cycle (DMAX) vs. TA (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 100 1.0 0.6 50 75 1.2 0.6 25 50 Figure 7. Startup Charging Current (ICH) vs. TA Figure 6. UVLO Stop Threshold Voltage (VSTOP) vs. TA 0 25 Temperature [C] Temperature [C] 0.0 -25 125 0.8 0.4 50 100 1.0 0.6 25 75 1.2 0.6 0 50 Figure 5. UVLO Start Threshold Voltage (VSTART) vs. TA Normalized Normalized Figure 4. Operating Supply Current (IOP) vs. TA 0.0 -25 25 Temperature [C] www.fairchildsemi.com 8 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Typical Performance Characteristics 1.2 Normalized Normalized Graphs are normalized at TA= 25C. 1.0 0.8 1.2 1.0 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -25 0 25 50 75 100 0.0 -25 125 0 1.2 1.0 0.8 0.4 0.2 0.2 75 100 0.0 -25 125 0 1.2 1.0 0.8 125 0.8 0.4 0.4 0.2 0.2 75 100 0.0 -25 125 Temperature [C] 0 25 50 75 100 125 Temperature [C] Figure 14. Burst-Mode LOW Threshold Voltage (VBURL) vs. TA Figure 15. Peak Current Limit (ILIMIT) vs. TA (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 100 1.0 0.6 50 75 1.2 0.6 25 50 Figure 13. Burst-Mode HIGH Threshold Voltage (VBURH) vs. TA Normalized Normalized Figure 12. Shutdown Delay Current (IDELAY) vs. TA 0 25 Temperature [C] Temperature [C] 0.0 -25 125 0.8 0.4 50 100 1.0 0.6 25 75 1.2 0.6 0 50 Figure 11. Feedback Source Current (IFB) vs. TA Normalized Normalized Figure 10. Over-Voltage Protection (VOVP) vs. TA 0.0 -25 25 Temperature [C] Temperature [C] www.fairchildsemi.com 9 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Typical Performance Characteristics (Continued) values of 2.5V and 1.5A, respectively. The pulse-bypulse current limit can be adjusted using a resistor to GND on the current limit pin (#4). The current limit level using an external resistor (RLIM) is given by: 1. Startup: In previous generations of Fairchild Power Switches (FPSTM), the VCC pin had an external startup resistor to the DC input voltage line. In this generation, the startup resistor is replaced by an internal highvoltage current source. At startup, an internal highvoltage current source supplies the internal bias and charges the external capacitor (Cvcc) connected to the VCC pin, as illustrated in Figure 16. When VCC reaches 12V, the FSFM260/300 begins switching and the internal high-voltage current source is disabled. Then, the FSFM260/300 continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 8V. ILIM = RLIM ILIM_SPEC (1) 2.8k + RLIM => RLIM = ILIM 2.8k (2) ILIM _SPEC - ILIM where, ILIM is the desired drain current limit. VCC VCC Idelay Vfb VO 3 FOD817A VDC IFB CB D2 + Vfb* CVcc KA431 2 5 Vstr OLP Rsense Figure 17. Pulse Width Modulation (PWM) Circuit 2.2 Leading-Edge Blanking (LEB): At the instant the internal SenseFET is turned on, a high-current spike occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the RSENSE resistor would lead to incorrect feedback operation in the currentmode PWM control. To counter this effect, the FSFM260/ 300 employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (tLEB) after the SenseFET is turned on. Vref VCC good Internal Bias FSFM260 Rev: 00 Figure 16. Internal Startup Circuit 2. Feedback Control: FSFM260/300 employs currentmode control, as shown in Figure 17. An opto-coupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the RSENSE resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the optocoupler LED current increases, pulling down the feedback voltage and reducing the duty cycle. This typically occurs when the input voltage is increased or the output load is decreased. 2.3 Constant Power Limit Circuit: Due to the circuit delay of FPS, the pulse-by-pulse limit current increases a little bit when the input voltage increases. This means unwanted excessive power is delivered to the secondary side. To compensate, the auxiliary power compensation network in Figure 18 can be used. RLIM can adjust pulseby-pulse current by absorbing internal current source (IFB: typical value is 0.9mA) depending on the ratio between resistors. With the suggested compensation circuit, additional current from IFB is absorbed more proportionally to the input voltage (VDC) and achieves constant power in wide input range. Choose RLIM for proper current to the application, then check the pulseby-pulse current difference between minimum and maximum input voltage. To eliminate the difference (to gain constant power), Ry can be calculated by: 2.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the SenseFET is determined by the inverting input of the PWM comparator (VFB*), as shown in Figure 17. When the current through the opto-transistor is zero and the current limit pin (#4) is left floating, the feedback current source (IFB) of 0.9mA flows only through the internal resistor (R+2.5R=2.8k). In this case, the cathode voltage of diode D2 and the peak drain current have maximum Ilim_spec xVdc x Ry (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 Gate driver R FSFM260 Rev: 00 Istart 8V/12V 2.5R - VSD VCC SenseFET OSC D1 Na Np Ifb x Ilim_comp (3) www.fairchildsemi.com 10 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Functional Description VDC the reliability is improved without increasing cost. Once the fault condition occurs, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage, 8V, the protection is reset and the internal high-voltage current source charges the VCC capacitor via the Vstr pin. When VCC reaches the UVLO start voltage, 12V, the FSFM260/ 300 resumes normal operation. In this manner, the autorestart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated (see Figure 19). 3.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is in the normal operation, the overload protection circuit can be activated during the load transition. To avoid this undesired operation, the overload protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SenseFET is limited and, therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (VO) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the optocoupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and the 5A current source starts to charge CB slowly up to VCC. In this condition, VFB continues increasing until it reaches 6V, when the switching operation is terminated, as shown in Figure 20. The delay time for shutdown is the time required to charge CB from 2.5V to 6.0V with 5A. In general, a 10 ~ 50ms delay time is typical for most applications. Np L Vfb Drain Na Vcc I_lim RLIM GND RY FSFM260 Rev. 00 - CY + compensation network Vy = VDC x Na Np Figure 18. Constant Power Limit Circuit Vds Power on Fault occurs Fault removed FSFM260 Rev: 00 VFB Vcc Overload protection 12V 6.0V 8V t FSFM260 Rev: 00 Normal operation Fault situation 2.5V Normal operation T12= Cfb*(6.0-2.5)/Idelay Figure 19. Auto Restart Operation T1 3. Protection Circuit: The FSFM260/300 has several self protective functions, such as overload protection (OLP), over-voltage protection (OVP), and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, t Figure 20. Overload Protection (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 T2 www.fairchildsemi.com 11 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) where, Ilim_spec is the limit current stated on the specification; Na and Np are the number of turns for VCC and primary side, respectively; Ifb is the internal current source at feedback pin with a typical value of 0.9mA; and Ilim_comp is the current difference that must be eliminated. In case of capacitor in the circuit 1F, 100V is good choice for all applications. 4. Soft-Start: The FSFM260/300 has an internal softstart circuit that increases PWM comparator inverting input voltage, together with the SenseFET current, slowly after it starts up. The typical soft-start time is 15ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. It also helps prevent transformer saturation and reduce the stress on the secondary diode during startup. 5. Burst Operation: To minimize power dissipation in standby mode, the FSFM260/300 enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 22, the device automatically enters burst mode when the feedback voltage drops below VBURL (350mV). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (500mV) switching resumes. The feedback voltage then falls and the process repeats. Burst mode operation alternately enables and disables switching of the power SenseFET, thereby reducing switching loss in standby mode. 3.3 Thermal Shutdown (TSD): The SenseFET and the control IC are built in one package. This allows for the control IC to detect the heat generation from the SenseFET. When the temperature exceeds approximately 140C, the thermal shutdown is activated. 3.4 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Even though the FPS has overload protection, it is not enough to protect the FPS in those abnormal cases, since severe current stress is imposed on the SenseFET until OLP triggers. This IC has an internal AOCP circuit shown in Figure 21. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the latch, resulting in the shutdown of the SMPS. Vo Voset VFB 0.5V 0.35V Ids Vds OSC 2.5R LEB S Q R Q Gate driver time R FSFM260 Rev: 00 AOCP protection 1 GND T1 Switching disabled T2 T3 Switching disabled T4 Figure 22. Waveforms of Burst Operation VOCP FSFM260 Rev: 00 Figure 21. Abnormal Over-Current Protection (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 12 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) 3.2 Over-Voltage Protection (OVP): If the secondary side feedback circuit malfunctions or a solder defect causes an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an overvoltage protection (OVP) circuit is employed. In general, VCC is proportional to the output voltage and the FSFM260/300 uses VCC instead of directly monitoring the output voltage. If VCC exceeds 19V, an OVP circuit is activated, terminating the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed below 19V. Due to the combined scheme, FPS shows better noise immunity than conventional PWM controller and MOSFET discrete solutions. Furthermore, internal drain current sense eliminates noise generation caused by a sensing resistor. There are some recommendations for PCB layout to enhance noise immunity and suppress the noise inevitable in power-handling components. There are typically two grounds in the conventional SMPS: power ground and signal ground. The power ground is the ground for primary input voltage and power, while the signal ground is ground for PWM controller. In FPS, those two grounds share the same pin, GND. Normally the separate grounds do not share the same trace and meet only at one point, the GND pin. More, wider patterns for both grounds are good for large currents by decreasing resistance. Capacitors at the VCC and FB pins should be as close as possible to the corresponding pins to avoid noise from the switching device. Sometimes Mylar(R) or ceramic capacitors with electrolytic for VCC is better for smooth operation. The ground of these capacitors needs to connect to the signal ground not the power ground. Figure 23. Recommended PCB Layout Mylar(R) is a registered trademark of DuPont Teijin Films. The cathode of the snubber diode should be close to the drain pin to minimize stray inductance. The Y-capacitor between primary and secondary should be directly connected to the power ground of DC link to maximize surge immunity. Because the voltage range of feedback line is small, it is affected by the noise of the drain pin. Those traces should not draw across or close to the drain line. In FSFM260/300, drain pins are the heat radiation pins, so wider PCB pattern is recommended to decrease the package temperature. Drain pins are also high voltage switching pins; however, too wide PCB pattern may deteriorate EMI immunity. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 13 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) PCB Layout Guide Application FPSTM Device Input Voltage Range Rated Output Power Output Voltage (Maximum Current) LCD Monitor Power Supply FSFM300N 85-265VAC 30W 5.0V (2.0A) 14V (1.4A) Features ! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ! Low standby mode power consumption (<1W at 230VAC input and 0.5W load) ! Enhanced system reliability through various protection functions ! Internal soft-start (15ms) Key Design Notes ! The delay time for overload protection is designed to be about 23ms with C105 of 33nF. If faster/slower triggering of OLP is required, C105 can be changed to a smaller/larger value (e.g. 100nF for 70ms). ! The SMD-type 100nF capacitor must be placed as close as possible to VCC pin to avoid malfunction by abrupt pul- sating noises and to improve surge immunity. 1. Schematic L201 5 H T1 EER3016 BD101 2KBP06M 2 C104 3.3nF 630V R103 51k 1W R102 75k 2 D101 1N4007 C103 100 F 400V 14V, 1.4A 10 1 C201 1000 F 25V 6 C202 1000 F 25V 3 FSFM300N 1 5 3 4 VSTR ILIM 3 FB 4 C105 33nF 100V C102 150nF 275VAC Drain VCC GND 1 6,7,8 R105 C106 C107 100 100nF 47 F 0.5W 50V 2 D202 MBRF1060 D102 UF 4004 5V, 2A 7 6 5 ZD101 1N4745A LF101 30mH 4 L202 5 H C204 1000 F 10V C203 2200 F 10V C301 4.7nF Y2 R108 N.C R201 1k R101 1M 1W RT1 NTC 5D-9 C101 150nF 275VAC R202 1.2k IC301 FOD817C F1 FUSE 250V 2A IC201 KA431 R203 18k C205 47nF R204 8k R205 8k Figure 24. Demonstation Circuit of FSFM300N (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 14 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Typical Application Circuit 1 Np/2 2 Np/2 3 Na 4 EER3016 10 9 8 7 Top N14V Np/2 2 1 Na N5V 4 5 7 6 N5V 8 6 N14V 8 10 GND N5V N5V Np/2 5 2 3 6 Bottom Figure 25. Transformer Schematic Diagram 3. Winding Specification Position No Pin (sf) Wire Turns Winding Method Bottom Np/2 32 0.25 x 1 30 Two-Layer Solenoid Winding 5 Solenoid Winding 3 Solenoid Winding 3 Solenoid Winding 7 Center Solenoid Winding 19 Center Solenoid Winding Insulation: Polyester Tape t = 0.025mm, Three Layers N14V 0.4 x 2(TIW) 10 8 Insulation: Polyester Tape t = 0.025mm, Three Layers N5V 0.4 x 3(TIW) 86 Insulation: Polyester Tape t = 0.025mm, Three Layers N5V 0.4 x 3(TIW) 76 Insulation: Polyester Tape t = 0.025mm, Three Layers Na 0.15 x 1 76 Insulation: Polyester Tape t = 0.025mm, Three Layers Np/2 Top 0.25 x 1 21 Insulation: Polyester Tape t = 0.025mm, Two Layers 4. Electrical Characteristics Pin Specification Remarks Inductance 1-3 1.2mH 10% 67kHz, 1V Leakage 1-3 15H Maximum Short all other pins 5. Core & Bobbin ! Core: EER3016 (Ae=109.7mm2) ! Bobbin: EER3016 (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 15 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) 2. Transformer Part Value Note Part Value Note Resistor Inductor R101 1M 1W L201 5H 5A Rating R102 75k 1/2W L202 5H 5A Rating R103 51k 1W R105 100 1/4W D101 IN4007 1A, 1000V General-Purpose Rectifier R108 10k 1/4W D102 UF4004 1A, 400V Ultrafast Rectifier R201 1k 1/4W ZD101 1N4745A 1W 16V Zener Diode (optional) R202 1.2k 1/4W D201 MBRF10H100 10A,100V Schottky Rectifier R203 18k 1/4W D202 MBRF1060 10A,60V Schottky Rectifier R204 8k 1/4W R205 8k 1/4W Capacitor C101 150nF/275VAC Box Capacitor C102 150nF/275VAC Box Capacitor C103 100F/400V Electrolytic Capacitor C104 3.3nF/630V Film Capacitor C105 33nF/50V Ceramic Capacitor C106 100nF/50V SMD (1206) C107 47F/50V Electrolytic Capacitor C201 1000F/25V Low-ESR Electrolytic Capacitor C202 1000F/25V Low-ESR Electrolytic Capacitor C203 2200F/10V Low-ESR Electrolytic Capacitor C204 1000F/10V Low-ESR Electrolytic Capacitor C205 47nF/50V Ceramic Capacitor C301 4.7nF/1kV Ceramic Capacitor Diode IC IC101 FSFM300N FPSTM IC201 KA431 (TL431) Voltage Reference IC202 FOD817A Opto-Coupler Fuse Fuse NTC RT101 5D-9 Bridge Diode BD101 2KBP06M2N257 Bridge Diode Line Filter LF101 34mH Transformer T1 (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 2A/250V EER3016 Ae=109.7mm2 www.fairchildsemi.com 16 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) 6. Evaluation Board Part List FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) Package Dimensions 9.83 9.00 6.67 6.096 8.255 7.61 3.683 3.20 5.08 MAX 7.62 0.33 MIN 3.60 3.00 (0.56) 2.54 0.56 0.355 0.356 0.20 9.957 7.87 1.65 1.27 7.62 NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994 E) DRAWING FILENAME AND REVSION: MKT-N08FREV2. Figure 26. 8-Lead Dual Inline Package (DIP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 17 FSFM260N / FSFM300N -- Green-Mode Farichild Power Switch (FPSTM) (c) 2009 Fairchild Semiconductor Corporation FSFM260N / FSFM300N Rev. 1.0.0 www.fairchildsemi.com 18