180 54161/74161 Synchronous 4-Bit Binary Counter with Direct Clear Schottky TTL High-Speed TTL Low-Power Schottky TTL Standard TTL Low-Power TTL Package Package Package Package Package Device Type Device Type Device Type = Device Type Device Type C|P|M\CF C|P|MICF C/PjM{CF C|P{|M{CF P|P|MICF Tl SNS4L S161 I@ wO] SN54161 sD} WO) -_ SNTAL S161 JONG SN 74161 J OND FMSALSI61/FWOLSI61 | DO FO] FM93i61 oo FAIRCHILD j- Fovatsi6l.rcasiel | 0@ | PO FO| Fcvai61 Feasi6t B@| PO FO MOTOROLA |- SN74LS 161 PO MC7416t PD NSC. OMS4L S161 OM54161A pow OM74LSi61 DM74161A PHILIPS N74LS16} N74t61 ' $5416! FOS lwo SIGNETICS N74LS161 AO) N74161 F OBO SIEMENS FLJ4Il Q FUJITSU ~ 74L $161 gq Ir HITACHI HD74LSi61 Po HD 7416] OPO T - _ MITSUBISHI M74LS 161 PO M53361 D NEC 7a S161 co #PB2I6I Do AmS45 161 AmS4L.S 161 AMD ~ 74516 . Am74S 161 Am74LS 16 oO Electrical Characteristics SN54LS161/SN74LSI61 . . . | Pin Assignments (Top View) absolute maximum ratings over operating free-air temperture range Supply voltage. Vog 7 Wv Operating free-air [ SNSALS | 55C to 125C Input voltage 5.5V temperature range [SN7ALS ac to 70C | Storage temperature range 65C to 150C RIPPLE outputs recommended operating conditions Yec ourrur O, Og a ENE ono SN54LS161 sn7acsi! | ve 16J15L}14tf13tf12efaaffiol] 9 MIN NOM MAX | MIN NOM MAX ] T TL ly vol 5 1 Supply voltage, Vog 45 5.54 4.75 5 5.2) Vv RIPPLES, Gq Uc O_gENABLE High-level output current. IoH 400 400 | wA CARRY T Low-level output current, lo. 4 al ma OUTPUT . Input clock frequency. tolocx ~ 0 25 0 25 | MHz curaR ono Width of clock pulse. tw(ciock) 25 25 ns ENABLE| Width of clear pulse, tw (clear) 20 20 ns A D f Data inputs A.B.C,D 20 20 I l I I yy Setup time, tgerup nable Poor T 20 20 ns 3 5 6 Load oe 20 20 _| CLFAR CLOCK A a c O ENABLE GND Clear 20 20 DATA INPUTS Hold time at any input. thoid | 0 0 | _ns | Operating tree-ui temperature, Tq | 55 i25[ 0 eo C electrical characteristics over recommended operating free-air temperature range _PARAMETER TEST CONDITIONS ft MIN TYP? MAX | UNIT High-level input voltage 2 v ~ Low-level input voltage oal v Input clamp voltage Voc=MIN. Ip= i8maA 1S v ~ Voc=MIN, Vip 2V v High-level outout volt OH 1d vi Outout voltage Vit =0.8V. lon = 400204 2.7 3.4 v Voo=MIN. Viq=2V Vor Low-level output voltage as i oe VL =0.8V, Ig, =8mA 0.35 y Joput current TL asd, clack or T a2] Ly at maximum Veco MAX. Wj 1V -+: 4 mA voltage Other input ot High-level _~ [1H input current Veco MAX. Wy 2.7V Lowievel 1L aput current Voce MAX. Vv) O.4v -} - Tos Snortcrcult vutput current i VoQ =MAX 7 - 20 "Supply current, Voc =MAX. SNSALS. 18 "CCH a1) outputs high See Note 2 SN74LS 18 Supply current, Voc =MAX, SNS4LS 19 32] - loot - mA ail outputs low See Note 3 SN74LS 19 32 tmax Maximum clock frequency 25 R as to out 38 PHL | Ripple carry 18 35 ns NOTES: |. This is the voltage between two emitters of a multiple-emitter transistor. For these tpen | trom Clock(ioad input high} | Vee ov 3 24 circuits, this rating applies between the count enable inputs P and T: tpn | fo outout Any 0 Ta Doe 2 2 ns 2. IGCH Is measured with the load input high, then again with the load input low, with tout An PHL 0 y Cy =I5pF. ma all other inputs high and all outputs epen. | IPLH | from Clock(load input tow) Ry = 2k {3 ns 3. Ico. Is measured with the clock input high, then again with the clock input low, tpHL | to output Any O See Note 4 18 27 with ail other imputs tow and all outputs open. | 'PLLH from Enable T 93 4 ns 4. Propagation delay for clearing is measured from the clear input for the 161. APHL } to output Rippie carry 9 ia TPHL | from Clear to output Any @ 20 28 ns t For conditions shown as MIN or MAX,use the appropriate vaiue specified under FAI tyoiwal values are at VoG= 3 Vi Ta =25c. @Not more than one output should be shorted at a time. *IPLH Propagation delay time, Icw-to-high-tevel output 'PHL = Propagation delay time, high-to-low-level output recommended operating conditions CONTINUED ON NEXT PAGE (REARS) >