102 5475 7475 4-Bit Bistable Latch Schottky TTL High-Speed TTL Low-Power Schottky TTL Standard TTL Low-Power TTL Package Package Package Package Package Device Type 7 Device Type Device Type Device Type Device Type} clP|M F C|P|MCF C;/ PIMCF Cc; P| MCF C|P|MCF Tl I SN54L S75 1G WO SN5475 ID WO] SN54L.75 1b " | SN74L.S75 LONG SN7475 JAIND SL74L75 LONG FMS475/F M9375 }OC FG FAIRCHI CHILD 1 FCIMIS/FC937S jDA|PA FO) i + OTOROLA MC7475 PO NSC DMS4L $75 i DM5475 JOING) |w@] OM54t.75A | ~ DM74L. $75 \ OM7875 JONG DM74L75A | t PHILIPS N74L S75 FJJ181/7875 a : t = $5475 Ba i SIGNETICS N74L 875 AW NT475 BO SIEMENS i FLJUSI a FUJITSU - ~ HTACH HO74L S75 Pb HD7475/HD2517 aed t | MITSUBISHI f MT4L S75 Pa MB3275 Pa | L NEC uPB2IT cacao} I | TOSHIBA TD3475A Pa i Electrical Characteristics SN54LS75/SN74LS75 Pin Assignment (Top View) absolute maximum ratings over operating _ ENABLE - free-air temperature range @ yo 20 2 1-2 GND 903040 Supply voliage. Voc WwW Opetating ftee-air SNS4LS TSS'Cto 125C | Input voltage 5.8V temper afure range amet oct we | Cto 70C interemitter voltage(see Note | ) 5.5V Storage temperature range 65C to 150C recommended operating conditions SN54LS75 SN74LS75 UNT MIN NOM MAX |MIN NOM MAX Supply vollage, Voc 45 5 5.5 14.75 5 5.25 Vv High-level output current, |QH 400 400 vA Low-level output current, lol 4 8] mA 19 TD QOENABLE Voq aD 7, 40 Width of enabling pulse. tw 20 20 ns 3-4 Data hold time. thold 0 0 as positive logic: see function table Setup time. tsetup 20 20 ns Operating free-air temperature, Tf, 55 125 0 70] C | - h 4 ; FUNCT |ON TABLE electrical characteristics over recommended operating 75 L758 (Eech Latch) free-air temperature range J INPUTS | OUTPUTS | PARAMETER * [___TEST CONDITIONS f [MIN TYP MAX | UNIT D TO o VIH High-level input valtage 2 v L H L H | 1 v = a a et voltage , x 7 0.8 < 4 H H L it yao - = I Input clamp voltage ce oy 18m. 5 x L Oo Bo Voo = MN. Vin 2, a VoH High-level output voltage 27 3.4 v H==nigh level, L =low level, X =irrelevavant ViL - 0.8, IoH = 400A th ' Vec=MIN, Vin 2 Qo =the level of O before the high-to-iow transition of G VoL Low-level output voltage 0.26 o4| v Vi =U. 8V fo 74mA Input 0.1 \ nput current at Dinput | Veo MAK. Vy 1V _ a maximum input voltage | Ginput * 0.4 Dinput 20 ry 4H High-level input Voc MAX. Wy: 2.7 t A To current Ginput 80 Low-level input 0.4 p> Other in evel anpy Voce Max, vy O.4v oA, Latch - current 1.6 I Sni U 1 Voc =MA&X SNSALS 20 190 mA Os ort-circuit OUtpUL Gurrer cc= SNTALS 20 Toa . Voco MAX SN5ALS 6.3 12 ENABLE DATA upply cure mA co Supply current Seenote 2 SNTALS s al 7 15 75L75 4-BIT BISTABLE LATCH \ PLB] trom D to outrut O |_. a ns TPHL Voc. 8V. 9 i7 t - TAT 25C, 12 POH trom D to output O A 20 ns PHL CL = |5pF. 7 15 a 1 Ry = 2k 15 27 DATA PLAT trom G to output Q L [oo eT Os TPHL ia 2 TO t = (6 30 >4q Q Heat from G to output & lo? OTHER 4 PHL LATCH ENABLE LS$7 4-6il BISTABLE LATCH NOTES: |. This is the voltage between two emitters of a muitiple-emitter Input transistor 2.1 gcis tested with all inputs groundded and all outouts open. t For conditions shown as MIN or MAX. use appropriate value spec fed under recommended operating conditions for the applicable device type TA typwal vawies ace at VoQ = FV. Ta 725C, @Not more than one output should be shorted at a time *1PLH = bropagation delay time, IPHL =Propagation delay time, low -to-high-level output high-to- low-level output