ASM1832 October 2003 rev 1.0 3.3V P Power Supply Monitor and Reset Circuit General Description Devices are available in 8-pin DIP, 8-pin SO and compact 8-pin The ASM1832 is a fully integrated microprocessor supervisor. It can halt and restart a "hung-up" microprocessor, restart a MicroSO packages. microprocessor after a power failure. It has a watchdog timer Key Features and external reset override. RESET and RESET outputs are * 3.3V supply monitor push-pull. * Push-pull output * Selectable watchdog period and * Debounce manual push-button reset input comparator circuits monitor the 3.3V, VCC input voltage status. * Precision temperature-compensated voltage reference A precision temperature-compensated reference During power-up or when the VCC power supply falls outside selectable tolerance limits, both RESET and RESET become active. When VCC rises above the threshold voltage, the reset signals remain active for an additional 250ms minimum, allowing the power supply and system microprocessor to stabilize. The trip point tolerance signal, TOL, selects the trip level tolerance to be either 10% or 20%. A debounced manual reset input, PBRST, activates the reset outputs for a minimum period of 250ms. There is a watchdog and comparator. * Power-up, power-down and brown out detection * 250ms minimum reset time * Active LOW and HIGH reset signal * Selectable trip point tolerance: 10% or 20% * Low-cost 8-pin DIP/SO and 8-pin Micro SO packages * Wide operating temperature -40C to +85C Applications timer to stop and restart a microprocessor that is "hung-up". * Microprocessor systems The watchdog timeouts periods are selectable: 150ms, 610ms, * Computers and 1200ms. If the ST input is not strobed LOW before the * Controllers time-out period expires, a reset is generated. * Portable instruments * Automotive systems Typical Operating Circuit Block Diagram 3.3V P ASM1832 ST RESET TOL TD Tolerance Selection RESET + I/O - VCC Reference VCC 40K RESET PBRST GND VCC ASM1832 VCC TOL Push Button Debounce TD Watchdog Timebase Selection ST Watchdog Transition Detector Reset & Watchdog Timer GND Alliance Semiconductor 2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com Notice: The information in this document is subject to change without notice RESET ASM1832 October 2003 rev 1.0 Pin Configuration PBRST 1 TD 2 TOL 3 GND 4 ASM1832 8 VCC 7 ST 6 RESET 5 RESET Pin Description Pin # 8-Pin Package Pin Name 1 PBRST 2 TD 3 TOL 4 GND Function Debounced manual pushbutton reset input. Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms for TD=Open, and tTD = 1200ms for TD = VCC). Selects 10% (TOL connected to GND) or 20% (TOL connected to VCC) trip point tolerance. Ground. Active HIGH reset output. RESET is active: 1. If VCC falls below the reset voltage trip point. 5 RESET 2. If PBRST is LOW. 3. If ST is not strobed LOW before the timeout period set by TD expires. 4. During power-up. 6 RESET Active LOW reset output. (See RESET). 7 ST Strobe input. 8 VCC 3.3V power. 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 2 of 9 ASM1832 October 2003 rev 1.0 tR Detailed Description The ASM1832 monitors the microprocessor or VCCTP(MIN) ~~ microcontroller power supply and issues reset signals, both active HIGH and active LOW, that halt processor operation whenever the power supply voltage levels are outside a VCCTP(MAX) VCCTP tRPU VCC RESET predetermined tolerance. VOH RESET and RESET outputs 250ms after the supply has returned to in-tolerance level. This allows the power supply and monitored processor to stabilize before instruction execution is allowed to begin. VOL ~ ~~~ RESET and RESET signals are active for a minimum of RESET Figure 1: Timing Diagram : Power Up Trip Point Tolerance Selection VCC, RESET and RESET become active whenever VCC falls below 2.64V. RESET and RESET become active when the tF VCC VCCTP (MAX) VCCTP VCC falls below 2.98V if TOL is connected to ground. VCCTP (MIN) and RESET remain active for a minimum time period of ~~ After VCC has risen above the trip point set by TOL, RESET RESET tRPD 250ms. On power-down, one VCC falls below the reset threshold RESET stays LOW and is guaranteed to be 0.4V or VOH less until VCC drops below 1.2V. The active HIGH reset signal VOL is valid down to a VCC level of 1.2V also. RESET ~ ~~ The TOL input is used to determine the level VCC can vary below 3.3V without asserting a reset. With TOL conected to Figure 2: Timing Diagram : Power Down Tolerance Select TOL = VCC TOL = GND Tolerance 20% 10% TRIP Point Voltage (V) Min Nom Max 2.47 2.55 2.64 2.80 2.88 2.97 Application Information Manual Reset Operation Push-button switch input, PBRST, allows the user to override the internal trip point detection circuits and issue reset signals. The pushbutton input is debounced and is pulled HIGH through an internal 40k resistor. When PBRST is held LOW for the minimum time tPB, both resets become active and remain active for a minimum time period of 250ms after PBRST returns HIGH. 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 3 of 9 ASM1832 October 2003 rev 1.0 The debounced input is guaranteed to recognize pulses greater than 20ms. No external pull-up resistor is required, ST Pulses as short as 20ns can be detected. since PBRST is pulled HIGH by an internal 40k resistor. Valid Strobe The PBRST can be driven from a TTL or CMOS logic line or Valid Strobe Invalid Strobe ST shorted to ground with a mechanical switch. tST tRST tTD (min) PBRST tTD (max) ~ tPB RESET VIH tPDLY Note: ST is ignored whenever a reset is active VIL Figure 5: Timing Diagram: Strobe Input ~ ~~ RESET tRST RESET VOH VOL Timeouts periods of approximately 150ms, 610ms or 1,200ms are selected through the TD pin. Figure 3: Timing Diagram: Pushbutton Reset Watchdog Time-out Period (ms) TD Voltage level Supply Voltage Min Nom Max GND 62.5 150 250 Floating 250 610 1000 VCC 500 1200 2000 ASM1832 1 2 3 4 PBRST 8 VCC TD 7 ST TOL RESET GND RESET I/O P 6 5 The watchdog timer can not be disabled. It must be strobed RESET with a high-to-low transition to avoid watchdog timeout and reset. Figure 4: Application Circuit: Pushbutton Reset Supply Voltage Watchdog Timer and ST Input ASM1832 A watchdog timer stops and restarts a microprocessor that is "hung-up". The P must toggle the ST input within a set 1 period (as selectable through TD input) to verify proper 2 software execution. If the ST is not toggled low within the minimum timeout period, reset signals become active. On power-up after the supply voltage returns to an in-tolerance condition, the reset signal remains active for 250ms minimum, allowing the microprocessor to stabilize. power supply and system 3 4 PBRST TD MREQ VCC 8 ST TOL RESET GND RESET 7 6 P RESET 5 Decoder Address Bus Figure 6: Application Circuit: Watchdog Timer 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 4 of 9 ASM1832 October 2003 rev 1.0 Absolute Maximum Ratings Parameter Min Max Unit Voltage on VCC -0.5 7 V Voltage on ST, TD -0.5 VCC + 0.5 V Voltage on PBRST, RESET, RESET -0.5 VCC + 0.5 V Operating Temperature Range -40 +85 C +260 C +125 C Soldering Temperature (for 10 sec) Storage Temperature -55 Note: 1. Voltages are measured with respect to ground 2. These are stress ratings only and functional implication is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC Electrical Characteristics Unless otherwise stated, 1.2 <= VCC<=5.5V and over the operating temperature range of -40C to +85C. All voltages are referenced to ground. Parameter Symbol Conditions Min Max Unit 1.0 5.5 V 2 VCC + 0.3 V Supply Voltage VCC ST and PBRST Input High Level VIH VCC >=2.7V ST and PBRST Input High Level VIH VCC<2.7V ST and PBRST Input Low Level VIL -0.3 VCC Trip Point (TOL = GND) VCCTP 2.80 VCC Trip Point (TOL = VCC) VCCTP Watchdog Timeout Period tTD Watchdog Timeout Period Watchdog Timeout Period Typ VCC - 0.4V V 0.5 V 2.88 2.97 V 2.47 2.55 2.64 V TD = GND 62.5 150 250 ms tTD TD = VCC 500 1200 2000 ms tTD TD Floating 250 610 1000 ms 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 5 of 9 ASM1832 October 2003 rev 1.0 Parameter Symbol Conditions Min Typ Output Voltage VOH I=-500A, VCC < 27.V Note 1 VCC - 0.3V VCC - 0.1V V Output Current IOH Output = 2.4V, VCC >=2.7V 350 A Output Current IOL Output = 0.4V, VCC >=2.7V Input Leakage IIL VOL RESET Low Level Internal Pull-up Resistor 10 ICC1 Input Capacitance Output Capacitance Unit mA -1.0 Note 1 PBRST pin Operating Current Max 1.0 A 0.4 V 40 Outputs open, VCC <= 3.6V k 20 A CIN 5 pF COUT 7 pF PBRST Manual Reset Minimum Low Time tPB Reset Active Time tRST ST Pulse Width tST and all inputs at VCC or GND PBRST = VIL 20 250 ms 610 1000 ms Must not exceed tRD mini- VCC Fail Detect to RESET or tRPD RESET VCC Slew Rate RESET inactive VCC Slew Rate 20 Pulses < 2 s at VCCTP mini- ns 5 mum will not cause reset tF PBRST Stable LOW to RESET and RESET Active VCC Detect to RESET or mum. Watchdog cannot be disabled. 20 tR trise=5s 250 0 s s tPDLY tRPU 8 610 20 ms 1000 ms ns Notes 1. RESET remains within 0.5V of VCC on power-down until VCC falls below 2V. RESET remains within 0.5V of ground on power-don until VCC falls below 2.0V. 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 6 of 9 ASM1832 October 2003 rev 1.0 Package Information MicroSO (8-Pin) Inches D Millimeteres a Min Max Min Max MicroSO (8-Pin) E E1 L A2 C A e 0.10mm 0.004in A1 b SO (8-Pin) A - 0.0433 - 0.10 A1 0.0020 0.0059 0.050 0.15 A2 0.0295 0.0374 0.75 0.95 b 0.0098 0.0157 0.25 0.40 C 0.0051 0.0091 0.13 0.23 D 0.1142 0.1220 2.90 3.10 e 0.0256 BSC 0.65 BSC E 0.193 BSC 4.90 BSC E1 0.1142 0.1220 2.90 3.10 L 0.0157 0.0276 0.40 0.70 a 0 6 0 6 1.75 SO (8-Pin) C L E H A 0.053 0.069 1.35 A1 0.004 0.010 0.10 0.25 B 0.013 0.020 0.33 0.51 C 0.007 0.010 0.19 e E D A1 A 0.050 0.150 0.25 1.27 0.157 3.80 4.00 H 0.228 0.244 5.80 6.20 L 0.016 0.050 0.40 1.27 D 0.189 0.197 4.80 2.00 - 5.33 Plastic DIP (8-Pin) Plastic DIP (8-Pin) D1 E E1 D 0 - 15 A A2 L A1 b2 b C eA eB A - 0.210 A1 0.015 - 0.38 - A2 0.115 0.195 2.92 4.95 b 0.014 0.022 0.36 0.56 b2 0.045 0.070 1.14 1.78 b3 0.030 0.045 0.80 1.14 D 0.355 0.400 9.02 10.16 D1 0.005 - 0.13 - E 0.300 0.325 7.62 8.26 E1 0.240 0.280 6.10 7.11 e 0.100 - 2.54 eA 0.300 - 7.62 eB - 0.430 - 10.92 2.92 3.81 eC - 0.060 L 0.115 0.150 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 7 of 9 ASM1832 October 2003 rev 1.0 Ordering Information Part Number Package Operating Temperature Range Maximum Supply Current (A) Voltage Monitoring Application ASM1832 8-Pin DIP -40C to 85C 20 3.3 V ASM1832S 8-SO -40C to 85C 20 3.3 V ASM1832SEMA 8-MicroSO -40C to 85C 20 3.3 V 3.3V P Power Supply Monitor and Reset Circuit Notice: The information in this document is subject to change without notice 8 of 9 ASM1832 Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, CA 95054 Tel: 408 - 855 - 4900 Fax: 408 - 855 - 4999 www.alsc.com Copyright (c) Alliance Semiconductor All Rights Reserved Part Number: ASM1832 Document Version: 1.0 (c) Copyright 2003 Alliance Semiconductor Corporation. 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