ASM1832
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
rev 1.0 3.3V µP Power Supply Monitor and Reset Circuit
October 2003
General Description
The ASM1832 is a fully integrated microprocessor supervisor. It
can halt and restart a “hung-up” microprocessor, restart a
microprocessor after a power failure. It has a watchdog timer
and external reset override. RESET and RESET outputs are
push-pull.
A precision temperature-compensated reference and
comparator circuits monitor the 3.3V, VCC input voltage status.
During power-up or when the VCC power supply falls outside
selectable tolerance limits, both RESET and RESET become
active. When VCC rises above the threshold voltage, the reset
signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to
stabilize. The trip point tolerance signal, TOL, selects the trip
level tolerance to be either 10% or 20%.
A debounced manual reset input, PBRST, activates the reset
outputs for a minimum period of 250ms. There is a watchdog
timer to stop and restart a microprocessor that is “hung-up”.
The watchdog timeouts periods are selectable: 150ms, 610ms,
and 1200ms. If the ST input is not strobed LOW before the
time-out period expires, a reset is generated.
Devices are available in 8-pin DIP, 8-pin SO and compact 8-pin
MicroSO packages.
Key Features
3.3V supply monitor
Push-pull output
Selectable watchdog period
Debounce manual push-button reset input
Precision temperature-compensated voltage reference
and comparator.
Power-up, power-down and brown out detection
250ms minimum reset time
Active LOW and HIGH reset signal
Selectable trip point tolerance: 10% or 20%
Low-cost 8-pin DIP/SO and 8-pin Micro SO packages
Wide operating temperature -40°C to +85°C
Applications
Microprocessor systems
Computers
Controllers
Portable instruments
Automotive systems
Typical Operating Circuit Block Diagram
Tolerance Selection
Reference
Push Button
Debounce
Watchdog
Timebase Selection
Reset &
Watchdog Timer
Watchdog
Transition Detector
+
-
VCC
TOL
PBRST
TD
ST
RESET
RESET
40K
VCC
VCC
VCC
GND
ASM1832
ST
RESET
RESET
I/O
µP
ASM1832
GND TOL
TD
3.3V
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
rev 1.0
October 2003
Pin Configuration
Pin Description
Pin #
8-Pin Package Pin Name Function
1 PBRST Debounced manual pushbutton reset input.
2TD
Watchdog time delay selection. (tTD = 150ms for TD = GND, tTD = 610ms for
TD=Open, and tTD = 1200ms for TD = VCC).
3TOL
Selects 10% (TOL connected to GND) or 20% (TOL connected to VCC) trip point
tolerance.
4 GND Ground.
5 RESET
Active HIGH reset output. RESET is active:
1. If VCC falls below the reset voltage trip point.
2. If PBRST is LOW.
3. If ST is not strobed LOW before the timeout period set by TD expires.
4. During power-up.
6 RESET Active LOW reset output. (See RESET).
7ST
Strobe input.
8VCC 3.3V power.
1
2
3
45
6
7
8
PBRST
TD
TOL
GND
VCC
ST
RESET
RESET
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
ASM1832
rev 1.0
October 2003
Detailed Description
The ASM1832 monitors the microprocessor or
microcontroller power supply and issues reset signals, both
active HIGH and active LOW, that halt processor operation
whenever the power supply voltage levels are outside a
predetermined tolerance.
RESET and RESET outputs
RESET and RESET signals are active for a minimum of
250ms after the supply has returned to in-tolerance level.
This allows the power supply and monitored processor to
stabilize before instruction execution is allowed to begin.
Trip Point Tolerance Selection
The TOL input is used to determine the level VCC can vary
below 3.3V without asserting a reset. With TOL conected to
VCC, RESET and RESET become active whenever VCC falls
below 2.64V. RESET and RESET become active when the
VCC falls below 2.98V if TOL is connected to ground.
After VCC has risen above the trip point set by TOL, RESET
and RESET remain active for a minimum time period of
250ms. On power-down, one VCC falls below the reset
threshold RESET stays LOW and is guaranteed to be 0.4V or
less until VCC drops below 1.2V. The active HIGH reset signal
is valid down to a VCC level of 1.2V also.
Application Information
Manual Reset Operation
Push-button switch input, PBRST, allows the user to override
the internal trip point detection circuits and issue reset
signals. The pushbutton input is debounced and is pulled
HIGH through an internal 40k resistor.
When PBRST is held LOW for the minimum time tPB, both
resets become active and remain active for a minimum time
period of 250ms after PBRST returns HIGH.
Tolerance
Select Tolerance
TRIP Point Voltage
(V)
Min Nom Max
TOL = VCC 20% 2.47 2.55 2.64
TOL = GND 10% 2.80 2.88 2.97
~
~
~
~
~
~
VOH
VOL
tRPU
RESET
RESET
VCCTP(MIN)
VCCTP(MAX)
VCCTP
tR
VCC
Figure 1: Timing Diagram : Power Up
~
~
~
~
~
~
VOH
VOL
VCCTP (MAX)
VCCTP
VCCTP (MIN)
RESET
RESET
tF
VCC
tRPD
Figure 2: Timing Diagram : Power Down
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
ASM1832
rev 1.0
October 2003
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is required,
since PBRST is pulled HIGH by an internal 40k resistor.
The PBRST can be driven from a TTL or CMOS logic line or
shorted to ground with a mechanical switch.
Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
“hung-up”. The µP must toggle the ST input within a set
period (as selectable through TD input) to verify proper
software execution. If the ST is not toggled low within the
minimum timeout period, reset signals become active. On
power-up after the supply voltage returns to an in-tolerance
condition, the reset signal remains active for 250ms
minimum, allowing the power supply and system
microprocessor to stabilize.
ST Pulses as short as 20ns can be detected.
Timeouts periods of approximately 150ms, 610ms or
1,200ms are selected through the TD pin.
The watchdog timer can not be disabled. It must be strobed
with a high-to-low transition to avoid watchdog timeout and
reset.
TD Voltage level Watchdog Time-out Period
(ms)
Min Nom Max
GND 62.5 150 250
Floating 250 610 1000
VCC 500 1200 2000
~
~~
~~
~
V
OH
V
OL
RESET
RESET
PBRST t
PB
t
PDLY
V
IH
t
RST
Figure 3: Timing Diagram: Pushbutton Reset
PBRST
T
D
TOL
GND
V
CC
ST
RESET
RESET
1
2
3
45
6
7
8
µP
RESET
Supply
Voltage
ASM1832
Figure 4: Application Circuit: Pushbutton Reset
~
~
Valid Valid Invalid
ST
RESET
tRST
tST
tTD (min) tTD (max)
Strobe Strobe Strobe
Figure 5: Timing Diagram: Strobe Input
Note: ST is ignored whenever a reset is active
PBRST
T
D
TOL
GND
V
CC
ST
RESET
1
2
3
4
6
7
8
µP
RESET
Supply
Voltage
ASM1832
Figure 6: Application Circuit: Watchdog Timer
Decoder
Address
Bus
MREQ
5
RESET
V
IL
I/O
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
rev 1.0
October 2003
Absolute Maximum Ratings
DC Electrical Characteristics
Unless otherwise stated, 1.2 <= VCC<=5.5V and over the operating temperature range of -40°C to +85°C. All voltages are
referenced to ground.
Parameter Min Max Unit
Voltage on VCC -0.5 7 V
Voltage on ST, TD -0.5 VCC + 0.5 V
Voltage on PBRST, RESET, RESET -0.5 VCC + 0.5 V
Operating Temperature Range -40 +85 °C
Soldering Temperature (for 10 sec) +260 °C
Storage Temperature -55 +125 °C
Note:
1. Voltages are measured with respect to ground
2. These are stress ratings only and functional implication is not implied. Exposure to absolute maxi-
mum ratings for extended periods may affect device reliability.
Parameter Symbol Conditions Min Typ Max Unit
Supply Voltage VCC 1.0 5.5 V
ST and PBRST Input High
Level VIH VCC >=2.7V 2VCC + 0.3 V
ST and PBRST Input High
Level VIH VCC<2.7V VCC - 0.4V V
ST and PBRST Input Low
Level VIL -0.3 0.5 V
VCC Trip Point (TOL = GND) VCCTP 2.80 2.88 2.97 V
VCC Trip Point (TOL = VCC)V
CCTP 2.47 2.55 2.64 V
Watchdog Timeout Period tTD TD = GND 62.5 150 250 ms
Watchdog Timeout Period tTD TD = VCC 500 1200 2000 ms
Watchdog Timeout Period tTD TD Floating 250 610 1000 ms
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
rev 1.0
October 2003
Notes
1. RESET remains within 0.5V of VCC on power-down until VCC falls below 2V. RESET remains within 0.5V of ground on power-don until VCC falls
below 2.0V.
Output Voltage VOH I=-500µA, VCC < 27.V Note 1 VCC - 0.3V VCC - 0.1V V
Output Current IOH Output = 2.4V, VCC >=2.7V 350 µA
Output Current IOL Output = 0.4V, VCC >=2.7V 10 mA
Input Leakage IIL -1.0 1.0 µA
RESET Low Level VOL Note 1 0.4 V
Internal Pull-up Resistor PBRST pin 40 k
Operating Current ICC1
Outputs open, VCC <= 3.6V
and all inputs at VCC or GND 20 µA
Input Capacitance CIN 5pF
Output Capacitance COUT 7pF
PBRST Manual Reset
Minimum Low Time tPB PBRST = VIL 20 ms
Reset Active Time tRST 250 610 1000 ms
ST Pulse Width tST
Must not exceed tRD mini-
mum. Watchdog cannot be
disabled.
20 ns
VCC Fail Detect to RESET or
RESET tRPD
Pulses < 2 µs at VCCTP mini-
mum will not cause reset 58µs
VCC Slew Rate tF20 µs
PBRST Stable LOW to RESET
and RESET Active tPDLY 20 ms
VCC Detect to RESET or
RESET inactive tRPU trise=5µs 250 610 1000 ms
VCC Slew Rate tR0ns
Parameter Symbol Conditions Min Typ Max Unit
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
ASM1832
rev 1.0
October 2003
Package Information
MicroSO (8-Pin)
SO (8-Pin)
Plastic DIP (8-Pin)
Inches Millimeteres
Min Max Min Max
MicroSO (8-Pin)
A - 0.0433 - 0.10
A1 0.0020 0.0059 0.050 0.15
A2 0.0295 0.0374 0.75 0.95
b 0.0098 0.0157 0.25 0.40
C 0.0051 0.0091 0.13 0.23
D 0.1142 0.1220 2.90 3.10
e 0.0256 BSC 0.65 BSC
E 0.193 BSC 4.90 BSC
E1 0.1142 0.1220 2.90 3.10
L 0.0157 0.0276 0.40 0.70
a0°6°0°6°
SO (8-Pin)
A 0.053 0.069 1.35 1.75
A1 0.004 0.010 0.10 0.25
B 0.013 0.020 0.33 0.51
C 0.007 0.010 0.19 0.25
e 0.050 1.27
E 0.150 0.157 3.80 4.00
H 0.228 0.244 5.80 6.20
L 0.016 0.050 0.40 1.27
D 0.189 0.197 4.80 2.00
Plastic DIP (8-Pin)
A - 0.210 - 5.33
A1 0.015 - 0.38 -
A2 0.115 0.195 2.92 4.95
b 0.014 0.022 0.36 0.56
b2 0.045 0.070 1.14 1.78
b3 0.030 0.045 0.80 1.14
D 0.355 0.400 9.02 10.16
D1 0.005 - 0.13 -
E 0.300 0.325 7.62 8.26
E1 0.240 0.280 6.10 7.11
e 0.100 - 2.54
eA 0.300 - 7.62
eB - 0.430 - 10.92
eC - 0.060
L 0.115 0.150 2.92 3.81
E1 E
D
A
A1
A2
eb
C
L
a
0.10mm
0.004in
L
C
A
A1
EH
D
D
D1
A
A1
A2
L
b
b2
E
E1
C
eA
eB
0° - 15°
ASM1832
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Notice: The information in this document is subject to change without notice
3.3V µP Power Supply Monitor and Reset Circuit
rev 1.0
October 2003
Ordering Information
Part Number Package Operating Temperature
Range
Maximum Supply
Current (µA)
Voltage Monitoring
Application
ASM1832 8-Pin DIP -40°C to 85°C 20 3.3 V
ASM1832S 8-SO -40°C to 85°C 20 3.3 V
ASM1832SEMA 8-MicroSO -40°C to 85°C 20 3.3 V
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel: 408 - 855 - 4900
Fax: 408 - 855 - 4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number: ASM1832
Document Version: 1.0
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or
registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the
right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may
appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the
right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these
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ASM1832