UG150: Si5381/82-E-EVB User's Guide EVB FEATURES * Powered from USB port or external power supply o fo t R rN e ew co m D m es e ig nd ns ed The Si5381/82E-E-EB is used for evaluating the Ultra-Low Phase Noise Quad/Dual PLL. The Si5381/82 employs fourth-generation DSPLL technology to enable clock generation for LTE/ JESD204B applications which require the highest level of jitter performance. The Si5381/82E-E-EB has four independent input clocks and a total of 12 outputs with 4 PLLs. The Si5381/82E-E-EB also has four independent input clocks and a total of 12 outputs with 2 PLLs. The Si5381/82E-E-EB can be easily controlled and configured using Silicon Labs' Clock Builder ProTM (CBProTM) software tool. The device revision is distinguished by a white 1 inch x 0.187 inch label with the text "Si5381/82E-E-EB" installed in the lower left hand corner of the board. (For ordering purposes only, the terms "EB" and "EVB" refer to the board and the kit respectively. For the purpose of this document, the terms are synonymous in context.) * Internal 48.0231 MHz crystal provides holdover mode of operation on the Si5381/82 * CBPro GUI programmable VDDO supplies allow each of the ten primary outputs to have its own supply voltage selectable from 3.3, 2.5, or 1.8 V * CBPro GUI-controlled voltage, current, and power measurements of VDDA and all VDDO supplies * Status LEDs for power supplies and control/status signals of Si5381/82 N * SMA connectors for input clocks, output clocks and optional external timing reference clock silabs.com | Building a more connected world. Rev. 1.0 Si5381/82 Evaluation Board User's Guide Si5381/82 Functional Block Diagram 1. Si5381/82 Functional Block Diagram Below is a functional block diagram of the Si5381/82E-E-EB. This EB can be connected to a PC via the main USB connector for programming, control, and monitoring. See 2. Quick Start and Jumper Defaults or 5.1 Installing ClockBuilderPro (CBPro) Desktop Software for more information. Note: All Si5381/82 schematics, BOMs, User's Guides, and software can be found online at the following link: http://www.silabs.com/ si538x-4x-evb +5V_USB Ext +5V Connector SPI Conn I2C/SPI Bus CLKOUT_0A CLKOUT_0AB Output Termination Control/ Status CLKOUT_0 CLKOUT_0B Output Termination CLKOUT_1 CLKOUT_1B Output Termination CLKOUT_2 CLKOUT_2B Output Termination CLKOUT_3 CLKOUT_3B Output Termination CLKOUT_4 CLKOUT_4B Output Termination CLKOUT_5 CLKOUT_5B Output Termination CLKOUT_6 CLKOUT_6B Output Termination CLKOUT_7 CLKOUT_7B Output Termination CLKOUT_8 CLKOUT_8B Output Termination CLKOUT_9 CLKOUT_9B Output Termination CLKOUT_9A CLKOUT_9AB Output Termination } } } } } } } } } } } } Output Clock 0A Output Clock 0 o fo t R rN e ew co m D m es e ig nd ns ed C8051F380 MCU + Peripherals VDDO_0 VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8 VDDO_9 VDDMCU I2C Ext Aux +5V Connector VDD_3.3 Power Supply +5V_Aux VDDO_0 VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7 VDDO_8 VDDO_9 Power only VDD_Core USB Aux +5V Connector VDD_3.3 Power only VDD_Core USB +5V Connector INTR Alarm_Status Si5381/82 Input Clock 0 Input Clock 1 Input Clock 2 Input Clock 3 { { { { Input Termination CLKIN_0 Input Termination CLKIN_1 Input Termination CLKIN_2 Input Termination CLKIN_3 CLKIN_0B CLKIN_1B CLKIN_2B CLKIN_3B Output Clock 1 Output Clock 2 Output Clock 3 Output Clock 4 Output Clock 5 Output Clock 6 Output Clock 7 Output Clock 8 Output Clock 9 Output Clock 9A N Figure 1.1. Functional Block Diagram of Si5381/82E-E-EB silabs.com | Building a more connected world. Rev. 1.0 | 2 Si5381/82 Evaluation Board User's Guide Quick Start and Jumper Defaults 2. Quick Start and Jumper Defaults Perform the following steps to quick-start the ClockBuilderPro software. 1. Install ClockBuilderPro desktop software. http://www.silabs.com/CBPro 2. Connect a USB cable from the Si5381/82E-E-EB to the PC where the software was installed. 3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software. 4. You can use ClockBuilderPro to create, download, and verify a frequency plan on the Si5381/82E-E-EB. 5. For the Si5381/82 data sheet, go to: http://www.silabs.com/si538x-4x-evb and search for Si5381/82 data sheet. The following table lists the Si5381/82E-E-EB jumper defaults. Table 2.1. Si5381/82E-E-EVB Jumper Defaults* Location Type I = Installed Location Type O = Open JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP13 JP14 JP15 JP16 JP17 JP18 JP19 JP20 JP21 JP22 O JP23 2 pin O 2 pin O JP24 3 pin all open 2 pin O JP25 2 pin O 2 pin I JP26 3 pin all open 2 pin O JP27 2 pin O 2 pin O JP28 3 pin all open 2 pin I JP29 2 pin O 2 pin O JP30 3 pin all open 2 pin O JP31 2 pin O 2 pin O JP33 2 pin O 2 pin I JP34 3 pin all open 3 pin 1 to 2 JP35 2 pin O 3 pin 1 to 2 JP36 3 pin all open 2 pin O JP39 2 pin O 3 pin all open JP40 2 pin O 2 pin O JP41 2 pin O 3 pin all open 2 pin O 3 pin all open J36 5x2 Hdr All 5 installed o fo t R rN e ew co m D m es e ig nd ns ed JP2 O = Open 2 pin N JP1 I = Installed Note: Refer to the Si5381/82E-E-EB schematics for the functionality associated with each jumper. silabs.com | Building a more connected world. Rev. 1.0 | 3 Si5381/82 Evaluation Board User's Guide Status LEDs 3. Status LEDs Table 3.1. Si5381/82E-E-EVB Status LEDs Silkscreen Color Status Function Indication D11 INTRB Blue DUT Interrupt Active D21 READY Green MCU Ready D22 3P3V Blue DUT +3.3 V is present D24 BUSY Green MCU Busy D25 INTR Red MCU Interrupt active D26 VDD DUT Blue DUT VDD voltage present D27 5VUSBMAIN Blue Main USB +5 V present o fo t R rN e ew co m D m es e ig nd ns ed Location D27, D22, and D26 are illuminated when USB +5 V, Si5381/82 +3.3 V, and Si5381/82 Output +5 V supply voltages, respectively, are present. D25, D21, and D24 are status LEDs showing on-board MCU activity. D11 and D12 are status indicators from the DUT. N Figure 3.1. Status LEDs silabs.com | Building a more connected world. Rev. 1.0 | 4 Si5381/82 Evaluation Board User's Guide Clock Input and Output Circuits 4. Clock Input and Output Circuits 4.1 Clock Input Circuits (INx/INxB and FB_IN/FB_INB) o fo t R rN e ew co m D m es e ig nd ns ed The Si5381/82E-E-EB has eight SMA connectors (IN0/IN0B-IN2/IN2B and IN3(FB_IN)/IN3B(FB_INB)) for receiving external clock signals. All input clocks are terminated as shown in the figure below. Note input clocks are ac coupled and 50 terminated. This represents four differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. For details on how to configure inputs as single-ended, refer to the Si5381/82 Data Sheet. Figure 4.1. Input Clock Termination Circuit 4.2 Clock Output Circuits (OUTx/OUTxB) N Each of the twenty-four output drivers (12 differential pairs) is ac coupled to its respective SMA connector. The output clock termination circuit is shown in the figure below. The output signal will have no dc bias. If dc coupling is required, the ac coupling capacitors can be replaced with a resistor of appropriate value. The Si5381/82E-E-EB provides pads for optional output termination resistors and/or low frequency capacitors. Note that components with schematic "NI" designation are not normally populated on the Si5381/82E-E-EB, and provide locations on the PCB for optional dc/ac terminations by the end user. Figure 4.2. Output Clock Termination Circuit silabs.com | Building a more connected world. Rev. 1.0 | 5 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5. Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.1 Installing ClockBuilderPro (CBPro) Desktop Software To install the CBPro software on any Windows 7 (or above) PC: Go to http://www.silabs.com/cbpro and download the ClockBuilderPro software. Installation instructions, release notes, and a user's guide for ClockBuilderPro can be found at the download link shown above. Please follow the instructions as indicated. 5.2 Connecting the EVB to Your Host PC o fo t R rN e ew co m D m es e ig nd ns ed Once ClockBuilderPro software in installed, connect to the EVB with a USB cable as shown below. N Figure 5.1. EVB Connection Diagram silabs.com | Building a more connected world. Rev. 1.0 | 6 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.3 Additional Power Supplies The Si5381/82E-E-EB comes preconfigured with jumpers installed on JP15 and JP16 (pins 1-2 in both cases) in order to select "USB". These jumpers, together with the components installed, configure the evaluation board to obtain +5 V power to all EVB power solely through the J37 USB connector. This setup is the default EVB configuration and is sufficient to configure the device and run multiple clock outputs simultaneously. o fo t R rN e ew co m D m es e ig nd ns ed In some cases when enabling all outputs or at high output frequencies, the EVB requires more power than a single USB connection can provide. This may result in intermittent device behavior or undesired increases in jitter/phase-noise. This condition may be checked using the EVB GUI, which is described further below. Selecting the "All Voltages" tab of the GUI and clicking on the "Read All" button produces a display similar to this one: Figure 5.2. EVB GUI - Power Supply Check Verify that the "RAIL_5V" measurement shows the EVB voltage > 4.7 V. An EVB voltage lower than this level may cause the issues described above. In this case, J33 can be used to provide power to the output drivers separately from the main Si5381/82 device supplies. To make this change, move jumper JP15 to connect pins 2-3 "EXT". Connect J33 to an external 5 V, 0.5 A or higher power source. Make sure that the polarity of the +5 V and GND connections are correct. Verify that the RAIL_5V voltage is 4.7 V or higher. The EVB should be powered by the USB connector when turning this auxiliary 5 V supply on or off. N See the figure below for the correct installation of the jumper shunts at JP15 and JP16 for default or standard operation. Figure 5.3. JP15-JP16 Standard Jumper Shunt Installation silabs.com | Building a more connected world. Rev. 1.0 | 7 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.4 Overview of ClockBuilderPro Applications Note: The following instructions and screen captures may vary slightly depending on your version of ClockBuilder Pro. The ClockBuilderPro installer will install two main applications. o fo t R rN e ew co m D m es e ig nd ns ed Application 1: Figure 5.4. ClockBuilderPro Wizard Use the CBPro Wizard to do the following: * Create a new design. * Review or edit an existing design. * Export: Create in-system programming files. N Application 2: Figure 5.5. EVB GUI Use the EVB GUI to do the following: * Download configuration to EVB's DUT (Si5381/82). * Control the EVB's regulators. * Monitor voltage, current, power on the EVB. silabs.com | Building a more connected world. Rev. 1.0 | 8 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.5 Common ClockBuilderPro Work Flow Scenarios There are three common workflow scenarios when using CBPro and the Si5381/82E-E-EB. These workflow scenarios are: * Workflow Scenario #1: Testing a Silicon Labs-created Default Configuration * Workflow Scenario #2: Modifying the Default Silicon Labs-created Device Configuration * Workflow Scenario #3: Testing a User-created Device Configuration Each is described in more detail in the following sections. 5.6 Workflow Scenario #1: Testing a Silicon Labs-Created Default Configuration o fo t R rN e ew co m D m es e ig nd ns ed Verify that the PC and EVB are connected, then launch ClockBuilder Pro by clicking on this icon on your PC's desktop: Figure 5.6. ClockBuilder Pro Icon CBPro automatically detects the EVB and device type. When the EVB has been detected, click on the "Open Default Plan" button. Figure 5.7. CBPro--Open Default Plan Button N Once you open the default plan, a popup will appear. Figure 5.8. CBPro--Write Design Dialog Select "Yes" to write the default plan to the Si5381/82 device mounted on your EVB. This ensures the device on the EVB is configured with the latest parameters from Silicon Labs. silabs.com | Building a more connected world. Rev. 1.0 | 9 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software Figure 5.9. CBPro--Write Progress Window o fo t R rN e ew co m D m es e ig nd ns ed After CBPro writes the default plan to the EVB, click on "Open EVB GUI" as shown in the figure below. Figure 5.10. CBPro--Open EVB GUI Button The EVB GUI window will appear on the desktop. Note all power supplies on the "Regulators" tab will be set to the values defined in the device's default CBPro project, as shown in the figure below. N Figure 5.11. EVB GUI--Regulators silabs.com | Building a more connected world. Rev. 1.0 | 10 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.6.1 Verify Free-Run Mode Operation Assuming no external clocks have yet been connected to the INPUT CLOCK differential SMA connectors, labeled "INx/INxB" and located around the perimeter of the EVB, the DUT should now be operating in free-run mode and locked to the internal crystal. You can run a quick check to determine if the device is powered up, generating output clocks, and consuming power by clicking on the "Read All" button highlighted above and then reviewing the voltage, current and power readings for each VDDx supply. o fo t R rN e ew co m D m es e ig nd ns ed Note: Turning VDD or VDDA "Off" will power-down and reset the DUT. Once both of these supplies are turned "On" again, you must reload the desired frequency plan back into the device memory by selecting the "Write Design to EVB" button on the CBPro home screen: Figure 5.12. CBPro--Write Design Button Failure to do the step above will cause the device to read in the preprogrammed plan from its non-volatile memory (NVM). However, the plan loaded from the NVM may not be the latest plan recommended by Silicon Labs for evaluation. N At this point, you should verify the presence and frequencies of the output clocks, running in free-run mode from the crystal, using external instrumentation connected to the output clock SMA connectors, labeled OUTx/OUTs. To verify plan inputs, go to the appropriate configuration page or click on "Frequency Plan Valid" to see the design report. Figure 5.13. CBPro--Design Report Button and Link silabs.com | Building a more connected world. Rev. 1.0 | 11 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software o fo t R rN e ew co m D m es e ig nd ns ed Your configuration's design report will appear in a new window, as shown below. Compare the observed output clocks to the frequencies and formats noted in your default project's Design Report. Figure 5.14. CBPro--Design Report 5.6.2 Verify Locked Mode Operation N Now, assuming that you connect the input clocks to the EVB as shown in the Design Report above, the DUT on your EVB will be running in "locked" mode. silabs.com | Building a more connected world. Rev. 1.0 | 12 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.7 Workflow Scenario #2: Modifying the Default Silicon Labs-Created Device Configuration o fo t R rN e ew co m D m es e ig nd ns ed To modify the configuration using the CBPro Wizard, click on the appropriate category. The category may also be selected from a dropdown list by clicking on the "Design Dashboard" button above this section. Figure 5.15. CBPro--Edit Settings Links and Pulldown N You will now be taken to the Wizard's step-by-step menu pages to allow you to change any of the default plan's operating configurations. Figure 5.16. CBPro--Design ID and Notes Edit Page silabs.com | Building a more connected world. Rev. 1.0 | 13 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software As you edit the settings, you may notice the "Frequency Plan Valid" link in the lower left corner updating. You can click on this link to bring up the design report to confirm that the information is correct. When you are finished editing each page, you may click on the "> Next" or "< Back" buttons to move from page to page. When you are done making all your desired changes, you can click on "Write to EVB" to reconfigure your device. The Design Write status window will appear each time you write to the EVB. Figure 5.17. CBPro--Design Write Progress Window N o fo t R rN e ew co m D m es e ig nd ns ed When you have verified your design settings, you may save the design project. Click on the "Finish" button to return to the home page and then click on the "Save Design to Project File" link. You can use the windows file browser to reach the correct location and enter a filename for this new project. silabs.com | Building a more connected world. Rev. 1.0 | 14 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software o fo t R rN e ew co m D m es e ig nd ns ed 5.8 Workflow Scenario #3: Testing a User-Created Device Configuration Figure 5.18. CBPro--Open Design Project Link N Using the windows file browser popup, locate your CBPro design file (*.slabtimeproj or *.sitproj file). Figure 5.19. CBPro--Windows File Browser Select "Yes" when the WRITE DESIGN to EVB popup appears: Figure 5.20. CBPro--Write Design Dialog The progress bar will be launched. Once the new design project file has been written to the device, verify the presence and frequencies of your output clocks and other operating configurations using external instrumentation. silabs.com | Building a more connected world. Rev. 1.0 | 15 Si5381/82 Evaluation Board User's Guide Using the Si5381/82E-E-EVB and Installing ClockBuilderPro (CBPro) Desktop Software 5.9 Exporting the Register Map File for Device Programming by a Host Processor o fo t R rN e ew co m D m es e ig nd ns ed You can also export your configuration to a file format suitable for in-system programming by selecting "Export" as shown below: Figure 5.21. CBPro--Export Design Programming File N You can now write your device's complete configuration to file formats suitable for in-system programming. Figure 5.22. CBPro--Export Configuration Window silabs.com | Building a more connected world. Rev. 1.0 | 16 Si5381/82 Evaluation Board User's Guide Writing A New Frequency Plan or Device Configuration to Non-volatile Memory (OTP) 6. Writing A New Frequency Plan or Device Configuration to Non-volatile Memory (OTP) The Si5381/82 device loads the Non-Volatile Memory (OTP) on either a powerup or a hard reset, overwriting any previous volatile register changes. This allows the device to begin functioning as desired on powerup/hard-reset without manual intervention. To restart the device while preserving volatile changes and without loading the OTP, use soft-reset through the registers or EVB-GUI. Note: Writing to the device non-volatile memory (OTP) is NOT the same as writing a configuration into the Si5381/82 using ClockBuilderPro on the Si5381/82E-E-EB. Writing a configuration into the EVB from ClockBuilderPro is done using Si5381/82 RAM space and can be done virtually an unlimited number of times. Writing to OTP is limited as described below. N o fo t R rN e ew co m D m es e ig nd ns ed Refer to the Si5381/82 Family Reference Manual and device datasheet for information on how to write a configuration to the EVB DUT's non-volatile memory (OTP). The OTP can be programmed a maximum of two times only. Care must be taken to ensure the configuration desired is valid when choosing to write to OTP. silabs.com | Building a more connected world. Rev. 1.0 | 17 Si5381/82 Evaluation Board User's Guide Serial Device Communications (Si5381/82 <-> MCU) 7. Serial Device Communications (Si5381/82 <-> MCU) 7.1 Onboard SPI Support The MCU on-board the Si5381/82E-E-EB communicates with the Si5381/82 device through a 4-wire SPI (Serial Peripheral Interface) link. The MCU is the SPI master and the Si5381/82 device is the SPI slave. The Si5381/82 device can also support a 2-wire I2C serial interface, although the Si5381/82E-E-EB does NOT support the I2C mode of operation. SPI mode was chosen for the EVB because of the relatively higher speed transfers supported by SPI vs. I2C. 7.2 External I2C Support o fo t R rN e ew co m D m es e ig nd ns ed I2C can be supported if driven from an external I2C controller. The serial interface signals between the MCU and Si5381/82 pass through shunts loaded on header J36. These jumper shunts must be installed in J36 for normal EVB operation using SPI with CBPro. If testing of I2C operation via external controller is desired, the shunts in J36 can be removed thereby isolating the on-board MCU from the Si5381/82 device. The shunt at J4 (I2C_SEL) must also be removed to select I2C as Si5381/82 interface type. An external I2C controller connected to the Si5381/82 side of J36 can then communicate to the Si5381/82 device. (For more information on I2C signal protocol, refer to the Si5381/82 Data Sheet.) The figure below illustrates the J36 header schematic. J36 even numbered pins (2, 4, 6, etc.) connect to the Si5381/82 device and the odd numbered pins (1, 3, 5, etc.) connect to the MCU. Once the jumper shunts have been removed from J36 and J4, I2C operation should use J36 pin 4 (DUT_SDA_SDIO) as the I2C SDA and J36 pin 8 (DUT_SCLK) as the I2C SCLK. Please note the external I2C controller will need to supply its own I2C signal pull-up resistors. N Figure 7.1. Serial Communications Header J36 silabs.com | Building a more connected world. Rev. 1.0 | 18 Si5381/82 Evaluation Board User's Guide Si5381/82-E-EB Schematic and Bill of Materials (BOM) 8. Si5381/82-E-EB Schematic and Bill of Materials (BOM) The Si5381/82-E-EB Schematic and Bill of Materials (BOM) can be found online at: http://www.silabs.com/si538x-4x-evb N o fo t R rN e ew co m D m es e ig nd ns ed Note: Please be aware the Si5381/82-E-EB schematic is in OrCad Capture hierarchical format and not in a typical "flat" schematic format. silabs.com | Building a more connected world. Rev. 1.0 | 19 One-click access to Timing tools, documentation, software, source code libraries & more. Available for Windows and iOS (CBGo only). N www.silabs.com/CBPro o fo t R rN e ew co m D m es e ig nd ns ed ClockBuilder Pro Timing Portfolio www.silabs.com/timing SW/HW Quality Support and Community www.silabs.com/CBPro www.silabs.com/quality community.silabs.com Disclaimer Silicon Labs intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Labs products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. 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