Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6
January 2010
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M (Preliminary)
High Speed Transistor Optocouplers
Features
■
High speed –1 MBit/s
■
Superior CMR – 10kV/µs
■
Dual-Channel HCPL2530M, HCPL2531M
(Preliminary)
■
CTR guaranteed 0–70°C
■
U.L. recognized (File # E90700, Vol. 2)
■
VDE recognition (pending)
– Ordering option ‘V’, e.g., 6N135VM
■
5,000Vrms (1 minute) isolation rating
■
Superior CMR of 15,000V/µs min. (HCPL4503M)
■
No base connection for improved noise immunity
(HCPL4503M)
Applications
■
Line receivers
■
Pulse transformer replacement
■
Output interface to CMOS-LSTTL-TTL
■
Wide bandwidth analog coupling
Description
The HCPL4503M, 6N135M, 6N136M, HCPL2530M and
HCPL2531M optocouplers consist of an AlGaAs LED
optically coupled to a high speed photodetector transis-
tor.
A separate connection for the bias of the photodiode
improves the speed by several orders of magnitude over
conventional phototransistor optocouplers by reducing
the base-collector capacitance of the input transistor.
The HCPL4503M has no internal connection to the pho-
totransistor base for improved noise immunity.
An internal noise shield provides superior common
mode rejection of up to 50,000V/µs.
Related Resources
■
www.fairchildsemi.com/products/opto/
■
www.fairchildsemi.com/pf/HC/HCPL0500.html
■
www.fairchildsemi.com/pf/FO/FODM452.html
■
www.fairchildsemi.com/pf/FO/FOD050L.html
Schematics Package Outlines
1
2
3
4 5
6
7
8
+
_
VF1
VCC
V01
V02
GND
VF2
_
+
HCPL2530M/HCPL2531M
1
2
3
4 5
6
7
8
+
_
VF
VCC
VB
VO
GNDN/C
N/C
6N135M, 6N136M, HCPL4503M
Pin 7 is not connected in the
HCPL4503M
8
8
1
8
1
1
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 2
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Absolute Maximum Ratings
(T
A
= 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 0.8mA/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 1.6mA/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
Symbol Parameter Condition Value Units
T
STG
Storage Temperature -40 to +125 °C
T
OPR
Operating Temperature -40 to +100 °C
T
SOL
Lead Solder Temperature
(Wave)
260 for 10 sec °C
EMITTER
I
F
(avg) DC/Average Forward Input
Current Each Channel
(1)
25 mA
I
F
(pk) Peak Forward Input Current
Each Channel
(2)
50% duty cycle, 1ms P.W. 50 mA
I
F
(trans) Peak Transient Input Current
Each Channel
≤
1µs P.W., 300pps 1.0 A
V
R
Reverse Input Voltage Each
Channel
5V
P
D
Input Power Dissipation Each
Channel
(3)
6N135M, 6N136M, HCPL4503M 45 mW
HCPL2530M, HCPL2531M
DETECTOR
I
O
(avg) Average Output Current Each
Channel
8 mA
I
O
(pk) Peak Output Current Each
Channel
16 mA
V
EBR
Emitter-Base Reverse Voltage 6N135M and 6N136M only 5 V
V
CC
Supply Voltage -0.5 to 30 V
V
O
Output Voltage -0.5 to 20 V
I
B
Base Current 6N135M and 6N136M only 5 mA
PD Output Power Dissipation
Each Channel
(4)
6N135M, 6N136M, HCPL4503M 100 mW
HCPL2530M, HCPL2531M 35 mW
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 3
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Electrical Characteristics
(T
A
= 0 to 70°C unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
CC
= 5.0V.
)
Individual Component Characteristics
Symbol Parameter Test Conditions Device Min. Typ. Max. Unit
EMITTER
V
F
Input Forward Voltage I
F
= 16mA, T
A
=25°C All 1.45 1.7 V
I
F
= 16mA All 1.8
B
VR
Input Reverse
Breakdown Voltage
I
R
= 10 µA All 5.0 21 V
∆
V
F
/
∆
T
A
Temperature Coefficient
of Forward Voltage
I
F
= 16mA All -1.7 mV/°C
DETECTOR
I
OH
Logic High Output
Current
I
F
= 0mA, V
O
= V
CC
= 5.5V,
T
A
=25°C
All 0.0007 0.5 µA
I
F
= 0mA, V
O
= V
CC
= 15V,
T
A
=25°C
6N135M
6N136M
HCPL4503M
0.0019 1
I
F
= 0mA, V
O
= V
CC
= 15V All 50
I
CCL
Logic Low Supply
Current
I
F
= 16mA, V
O
= Open,
V
CC
= 15V
6N135M
6N136M
HCPL4503M
163 200 µA
I
F1
= I
F2
= 16mA,
V
O
= Open, V
CC
= 15V
HCPL2530M
HCPL2531M
400
I
CCH
Logic High Supply
Current
I
F
= 0mA, V
O
= Open,
V
CC
= 15V, T
A
=25°C
6N135M
6N136M
HCPL4503M
0.0002 1 µA
I
F
= 0mA, V
O
= Open,
V
CC
= 15V
6N135M
6N136M
HCPL4503M
0.0004 2
I
F
= 0mA, V
O
= Open,
V
CC
= 15V
HCPL2530M
HCPL2531M
4
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 4
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Electrical Characteristics
(Continued)
(T
A
= 0 to 70°C unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
CC
= 5.0V.
)
Transfer Characteristics
Note:
5. Current Transfer Ratio is defined as a ratio of output collector current, I
O
, to the forward LED input current, I
F
,
times 100%.
Symbol Parameter Test Conditions Device Min. Typ. Max. Unit
COUPLED
CTR Current Transfer
Ratio
(5)
I
F
= 16mA, V
O
= 0.4 V,
V
CC
= 4.5V, T
A
=25°C
6N135M 7 38 50 %
HCPL2530M
6N136M
HCPL4503M
19 38 50 %
HCPL2531M
I
F
= 16mA,
V
CC
= 4.5V
V
OL
= 0.4V 6N135M 5 %
V
OL
= 0.5V HCPL2530M
V
OL
= 0.4V 6N136M
HCPL4503M
15 %
V
OL
= 0.5V HCPL2531M
V
OL
Logic LOW Output
Voltage
I
F
= 16mA, I
O
= 1.1mA,
V
CC
= 4.5V, T
A
=25°C
6N135M 0.12 0.4 V
HCPL2530M 0.5
I
F
= 16mA, I
O
= 3mA,
V
CC
= 4.5V, T
A
=25°C
6N136M
HCPL4503M
0.20 0.4
HCPL2531M 0.5
I
F
= 16mA, I
O = 0.8mA,
VCC = 4.5V
6N135M 0.11 0.5
HCPL2530M
IF = 16mA, IO = 2.4mA,
VCC = 4.5V
HCPL4503M 0.18 0.5
HCPL2531M
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 5
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Electrical Characteristics (Continued)
(TA = 0 to 70°C unless otherwise specified. Typical values are measured at TA = 25°C and VCC = 5V.)
Switching Characteristics (VCC = 5V)
Notes:
6. The 4.1kΩ load represents 1 LSTTL unit load of 0.36mA and 6.1kΩ pull-up resistor.
7. The 1.9kΩ load represents 1 TTL unit load of 1.6mA and 5.6kΩ pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge
of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge
of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO < 0.8V).
Symbol Parameter Test Conditions Device Min. Typ. Max. Unit
tPHL Propagation Delay
Time to Logic LOW
TA = 25°C, RL = 4.1kΩ,
IF = 16mA(6) (Fig. 7)
6N135M 0.23 1.5 µs
HCPL2530M
RL = 1.9kΩ, IF = 16mA,
TA = 25°C(7) (Fig. 7)
6N136M
HCPL4503M
0.25 0.8 µs
HCPL2531M
RL = 4.1kΩ, IF = 16mA(6) (Fig. 7) 6N135M
HCPL2530M
2.0 µs
RL = 1.9kΩ, IF = 16mA(7) (Fig. 7) 6N136M
HCPL4503M
HCPL2531M
1.0 µs
tPLH Propagation Delay
Time to Logic HIGH
TA = 25°C, (RL = 4.1kΩ,
IF = 16mA(6) (Fig. 7)
6N135M 0.45 1.5 µs
HCPL2530M
RL = 1.9kΩ, IF = 16mA(7) (Fig. 7)
TA = 25°C
6N136M
HCPL4503M
0.26 0.8 µs
HCPL2531M
RL = 4.1kΩ, IF = 16mA(6) (Fig. 7) 6N135M
HCPL2530M
2.0 µs
RL = 1.9kΩ, IF = 16mA(7) (Fig. 7) 6N136M
HCPL4503M
HCPL2531M
1.0 µs
|CMH| Common Mode
Transient
Immunity at
Logic High
IF = 0mA, VCM = 10VP-P,
RL = 4.1kΩ, TA = 25°C(8) (Fig. 8)
6N135M
HCPL2530M
10,000 V/µs
IF = 0mA, VCM = 10VP-P,
RL = 1.9kΩ, TA = 25°C(8) (Fig. 8)
6N136M
HCPL2531M
10,000 V/µs
IF = 0mA, VCM = 1,500VP-P,
RL = 1.9kΩ, TA = 25°C(8) (Fig. 8) HCPL4503M 15,000 50,000
|CML| Common Mode
Transient
Immunity at
Logic Low
IF = 16mA, VCM = 10VP-P,
RL = 4.1kΩ, TA = 25°C(8) (Fig. 8)
6N135M
HCPL2530M
10,000 V/µs
IF = 16mA, VCM = 10VP-P,
RL = 1.9kΩ(8) (Fig. 8)
6N136M
HCPL2531M
10,000 V/µs
IF = 0mA, VCM = 1,500VP-P,
RL = 1.9kΩ, TA = 25°C(8) (Fig. 8) HCPL4503M 15,000 50,000
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 6
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Electrical Characteristics (Continued)
(TA = 0 to 70°C unless otherwise specified. Typical values are measured at TA = 25°C and VCC = 5V.)
Isolation Characteristics (TA = 0 to 70°C Unless otherwise specified)
Notes:
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are
shorted together.
10. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
11. 5,000Vrms for 1 minute duration is equivalent to 6,000Vrms for 1 second duration.
Symbol Characteristics Test Conditions Min. Typ. Max. Unit
VISO Withstand Insulation Test
Voltage
RH ≤ 50%, TA = 25°C, II-O ≤ 10µA,
t = 1 min., f = 50Hz(9)(11) 5,000 VRMS
RI-O Resistance (Input to Output) VI-O = 500VDC(9) 1011 Ω
CI-O Capacitance (Input to Output) f = 1MHz, VI-O = 0V(9) 1pF
II-I Input-Input Insulation
Leakage Current
RH ≤ 45%, VI-I = 500VDC(10)
t = 5 s, (HCPL2530M/2531M only)
µA
RI-I Input-Input Resistance VI-I = 500 VDC(10)
(HCPL2530M/2531M only) Ω
CI-I Input-Input Capacitance f = 1MHz(10)
(HCPL2530M/2531M only)
pF
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 7
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Typical Performance Curves
-40 -20 0 20 40 60 80 100 120
Fig. 1 Normalized CTR vs. Forward Current
IF - FORWARD CURRENT (mA)
0.1 1 10 100
CTR (NORMALIZED) CTR(I
F
) / CTR (I
F
= 16mA)
CTR (NORMALIZED) CTR(T
A
) / CTR (T
A
= 16mA)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Fig. 2 Normalized CTR vs. Temperature
TA - TEMPERATURE (°C)
-40 -20 0 20 40 60 80 100 120
-40 -20 0 20 40 60 80 100 120
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Fig. 3 Output Current vs. Output Voltage
VO – OUTPUT VOLTAGE (V)
02468101214161820
I
O
– OUTPUT CURRENT (mA)
Normalized to:
I
F
= 16 mA
V
O
= 0.4 V
V
CC
= 5 V
T
A
= 25°C
Normalized to:
T
A
= 25°C
I
F
= 16mA
V
CC
= 4.5V
V
O
= 0.4V
Fig. 4 Logic High Output Current
vs. Temperature
TA – TEMPERATURE (°C)
I
OH
– LOGIC HIGH OUTPUT CURRENT (nA)
0.1
100025
20
15
10
5
0
100
10
1
Fig. 5 Propagation Delay vs. Temperature
TA – TEMPERATURE (°C)
tP – PROPAGATION DELAY (ns)
0
100
200
300
400
500
600
700
800
RL = 1.9kΩ (t
PHL
)
R = 4.1kΩ (t
PHL
)
L
RL = 1.9kΩ (t
PLH
)
RL
= 4.1kΩ (t
PLH
)
Fig. 6 Propagation Delay vs. Load Resistance
RL – LOAD RESISTANCE (kΩ)
1 10
T
P
- PROPAGATION DELAY (ns)
100
1000
IF = 16mA (t
PLH
)
IF = 16mA (t
PHL
)
TA = 25°C
VCC = 5 V I
F
= 0 mA
V
CC
= 5.5V
V
O
= 5.5V
Frequency = 10kHz
Duty Cycle = 10%
V
CC
= 5V
IF
35mA
30mA
25mA
20mA
15mA
10mA
5mA
= 40mA
Frequency = 10kHz
Duty Cycle = 10%
V
CC
= 5 V
IF = 10mA (t
PLH
)
IF = 10mA (t
PHL
)
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 8
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Test Circuits
Pulse Gen
CM
V
V
FF
B
A
+-
+5 V
O
V
–
I
F
3
4
+
F
V
-
2
1
Shield
Noise
6
O
5
GND
7
8
V
B
V
CC
V
L
R
PLH
OL
V
V
O
0
5 V
1.5 V
F
I
1.5 V
T
PHL
T
Switch at A : I = 0 mA
F
Switch at A : I = 16 mA
F
t
r
V
O
O
V
OL
V
5 V
0 V 10% 10%
90%
CM
V 10 V
4 5
Noise
1
2
3
Shield
8
7
6
+5 V
O
V
V
CC
V
01
V
02
GND
V
F1
-
+
F2
V
-
F
I+
10% DUTY CYCLE
I/f < 100µS
F
I
MONITOR
L
R
C = 15 pF
L
Pulse
Generator
tr = 5ns
Z = 50
O
Ω
GND
+
4 5
1
3
2
-
F2
V
V
F1
-
Shield
Noise
+5 V
CC
8
V
L
V
6
02
V
7
R
01
V
O
V
CM
A
B
Pulse Gen
F
I
+-
+
3
I Monitor
F
4
I/f < 100µs
10% D.C.
tr = 5ns
Generator
Pulse
Z = 50
O
+
V
F
I
Ω
F
-
2
1
Shield
Noise
V
O
O
6
5
GND
7
8
V
B
V
L
R
CC
V+5 V
0.1 µF
L
C = 15 pF
Test Circuit for 6N135M, 6N136M, and HCPL4503M
Test Circuit for HCPL2530M and HCPL2531M
0.1 µF
f
t
0.1 µF
0.1 µF
FF
V
m
R
m
R
90%
Fig. 7 Switching Time Test Circuit
Fig. 8 Common Mode Immunity Test Circuit
Test Circuit for 6N135M, 6N136M, and HCPL4503M Test Circuit for HCPL2530M and HCPL2531M
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 9
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Package Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
Through Hole
Surface Mount – 0.3" Lead Spacing (Option S)
Note:
All dimensions are in inches (millimeters)
0.4" Lead Spacing (Option T)
8-Pin Surface Mount DIP – Land Pattern
(Option S)
0.200 (5.08)
MAX
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.020 (0.51)
MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
0.156 (3.94)
0.144 (3.68)
241
56 78
0.300 (7.62)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
15° MAX
PIN 1
ID.
SEATING PLANE
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.070 (1.78)
0.045 (1.14)
0.156 (3.94)
0.144 (3.68) 0.300 (7.62)
TYP
0.405 (10.30)
MAX.
0.315 (8.00)
MIN
0.015 (0.40) MIN
Both Sides
32 14
5678
0.016 (0.40)
0.008 (0.20)
PIN 1
ID.
0.200 (5.08)
MAX
0.100 (2.54) TYP
0.022 (0.56)
0.031 (0.78)
0.016 (0.41)
0.020 (0.51)
MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78) 0.156 (3.94)
0.144 (3.68)
0.045 (1.14)
241
56 78
0.400 (10.16)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
0° to 15°
PIN 1
ID.
SEATING PLANE
0.070 (1.78)
0.060 (1.52)
0.030 (0.76)
0.100 (2.54)
0.295 (7.49)
0.415 (10.54)
0.200 (5.08)
MAX
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 10
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Package Dimensions (Continued)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
Surface Mount – 0.4" Lead Spacing
(Option TS) (Pending)
Note:
All dimensions are in inches (millimeters)
8-Pin Surface Mount DIP – Land Pattern
(Option TS)
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.022 (0.56)
0.031 (0.775)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.070 (1.78)
0.045 (1.14)
0.300 (7.62)
TYP
0.497 (12.6)
MAX.
0.400 (10.16)
32 14
5678
0.016 (0.40)
0.008 (0.20)
PIN 1
ID.
0.070 (1.78)
0.060 (1.52)
0.030 (0.76)
0.100 (2.54)
0.392 (9.96)
0.511 (13.0)
0.156 (3.94)
0.144 (3.68)
0.200 (5.08)
MAX
0.015 (0.40) MIN
Both Sides
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 11
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Ordering Information
Marking Information
Option Example Part Number Description
No option 6N135M Standard through hole lead form (50 units per tube)
S 6N135SM Surface mount lead bend
SD 6N135SDM Surface mount; tape and reel
V 6N135VM IEC60747-5-2 (approval pending)
TSV 6N135TSVM IEC60747-5-2 (approval pending); surface mount
TSDV 6N135TSDVM IEC60747-5-2 (approval pending); surface mount;
tape and reel
TV 6N135TVM IEC60747-5-2 (approval pending); 0.4" lead spacing
SV 6N135SVM IEC60747-5-2 (approval pending); surface mount
SDV 6N135SDVM IEC60747-5-2 (approval pending); surface mount;
tape and reel
1
2
6
43 5
Note:
1. ‘HCPL’ devices are marked with only the numeric characters
(for example, HCPL4503M is marked as ‘4503’).
2. The ‘M’ suffix is an ordering identifier only. It is used to indicated the
white package version. The ‘M’ does no appear in the top mark.
Definitions
1Fairchild logo
2(1) Device number
3 IEC60747-5-2 mark (Note: Only appears on parts ordered
with this option – See order entry table)
4Two digit year code, e.g., ‘08’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
6N135
BYY
XXV
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 12
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Carrier Tape Specifications (Option SD)
Symbol Description Dimension in mm
WTape Width 16.0 ± 0.3
tTape Thickness 0.30 ± 0.05
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
FPocket Location 7.5 ± 0.1
P22.0 ± 0.1
PPocket Pitch 12.0 ± 0.1
A0Pocket Dimensions 10.30 ±0.20
B010.30 ±0.20
K04.90 ±0.20
W1Cover Tape Width 13.2 ± 0.2
dCover Tape Thickness 0.1 max
Max. Component Rotation or Tilt 10°
R Min. Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 13
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Carrier Tape Specifications (Option TSR2) (Pending)
Symbol Description Dimension in mm
WTape Width 24.0 ± 0.3
tTape Thickness 0.40 ± 0.1
P0Sprocket Hole Pitch 4.0 ± 0.1
D0Sprocket Hole Diameter 1.55 ± 0.05
E Sprocket Hole Location 1.75 ± 0.10
FPocket Location 11.5 ± 0.1
P22.0 ± 0.1
PPocket Pitch 16.0 ± 0.1
A0Pocket Dimensions 12.80 ± 0.1
B010.35 ± 0.1
K05.7 ±0.1
W1Cover Tape Width 21.0 ± 0.1
dCover Tape Thickness 0.1 max
Max. Component Rotation or Tilt 10°
R Min. Bending Radius 30
d
0
P
t2
D0
1
1
W
User Direction of Feed
0
K
B0
A0W
E
D
F
P
P
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 14
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers
Reflow Profile
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
240 360
Profile Freature Pb-Free Assembly Profile
Temperature Min. (Tsmin) 150°C
Temperature Max. (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60–120 seconds
Ramp-up Rate (tL to tP) 3°C/second max.
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60–150 seconds
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 seconds
Ramp-down Rate (TP to TL) 6°C/second max.
Time 25°C to Peak Temperature 8 minutes max.
©2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N13XM, HCPLXXXM Rev. 1.0.6 15
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®
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Datasheet Identification Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in
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Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
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at any time without notice to improve the design.
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The datasheet is for reference information only.
Rev. I47
Single-Channel: 6N135M, 6N136M, HCPL4503M
Dual-Channel: HCPL2530M, HCPL2531M — High Speed Transistor Optocouplers