© Semiconductor Components Industries, LLC, 2012
April, 2012 − Rev. 2
1Publication Order Number:
EVBUM2108/D
NCP2823AGEVB,
NCP2823BGEVB
NCP2823 Series Evaluation
Board User's Manual
Overview
The NCP2823A/B are cost effective mono audio power
amplifiers designed for portable electronic devices.
NCP2823A is optimized for 8 W operation and NCP2823B
can operate with speaker impedance down to 4.0 W. For
Instance, NCP2823B is capable of delivering 3 W of
continuous average power to a 4.0 W from a 5.0 V supply in
a Bridge Tied Load (BTL) configuration. Under the same
conditions, NCP2823A can provide 1.5 W to an 8.0 W BTL
load with less than 1% THD+N. For cellular handsets or
PDAs it offers space and cost savings because no output
filter is required when using inductive transducers. With
more than 95% efficiency and very low shutdown current,
it increases the lifetime of your battery and drastically
lowers the junction temperature.
The intent of the evaluation boards is to illustrate typical
operation of the NCP2823 device for laboratory
characterization. The NCP2823 Series Evaluation Board
schematic is depicted in Figure 3.
Figure 1. NCP2823AGEVB Board Picture Figure 2. NCP2823BGEVB Board Picture
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EVAL BOARD USER’S MANUAL
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BOARD SCHEMATIC
Figure 3. NCP2823 Series Evaluation Board Schematic
Tit le
Size D oc um ent N um ber Rev
D ate: Sheet of
N C P2823EVB TLS−P−001−A−1109−RD A
N C P2823EVB
A
11Thurs day , J anuary 07, 2010
U1
N C P2823
INP
A1
AGN D
A2
OU TP A3
AVD D B1
PVD D B2
PGN D
B3
INM
C1
EN
C2
OU TM C3
C1
100n
C2
100n
C3
4. 7uF
J1
1
2
3
R1
150k
R2
150k
0
0
0
J2
1
J3
1
J4
GN D
1
2
0
J5
1
2
J6
1
2
J7
1
2
J8 1
2
J26
1
2
3
4
5
C4
NM
EN
J25
1
2
J20
1
2
0
J9
1
J10
1
ENABLE
POWER SUPPLY
PROBE CONNECTION
BOARD FIXATION HOLES
0
FILTER
EN
J11
1
2
0
J17
1
2
VD D
VD D
VD D
L1
NM
1 2
L2
NM
1 2
C7
100uF
C8
NM
0
J27
1
0
C9
NM
J28
1
out nf
J29
1
J30
1
out p
J31
1
2
0
J32
1
2
out pfout p
out n
SPEAKER
CONNECTION
J13
1
out n
J12
1
OPERATION
The operating power supply of the NCP2823 is from 2.5
to 5.5 V. The absolute maximum input voltage is 7.0 V. A
power supply set to 3.6 V and current limit set to at least
1.5 A must be connected to J11 connector to powering the
NCP2823 Series Evaluation Board. Also to compensate for
parasitic inductance of wires between the power supply and
the evaluation board it is highly recommended to connect a
470 mF electrolytic capacitor to bypass J11 terminal. Like
this the device can be evaluate under powering condition
very similar that battery power supplies.
Performances of EVB Solution
To be as close as possible with final handset application,
the design of this power conversion solution used small size
footprints where possible. Changing components may
positively or negatively impact the evaluation board
performance, illustrated in Figure 4 to 9. For more
information please refer to the NCP2823 datasheet.
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Table 1. BOARD CONNECTIONS
INPUT POWER
Symbol Descriptions
J11−1This is the positive connection for power supply. The leads (positive + ground) to the input supply should
be twisted and kept as short as possible.
J11−2This is the return connection for the power supply (Ground signal)
J4 Ground clip
AUDIO
Symbol Descriptions
J9 Positive Audio input
J10 Negative Audio input
J17−2Positive Audio output
J17−1Negative Audio output
SWITCHES SETUP
Symbol Switch Descriptions
J1 Enable
J5 Short input capacitor on positive input
J6 Short input capacitor on negative input
J7 Connect the positive audio input to Gnd
J8 Connect the negative audio input to Gnd
J31 Short filter on positive output
J32 Short filter on negative output
J25 Connect negative output to Probe connection (J26)
J20 Connect Positive output to Probe connection (J26)
TEST POINT
Symbol Switch Descriptions
J3 This test point is directly connected to the GND
J2 This test point is directly connected to the Vdd pin
J9 This test point is connected to the positive audio input
J10 This test point is connected to the negative audio input
J12 This test point is connected to the positive audio output
J13 This test point is connected to the negative audio output
J26 Probe connection
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TYPICAL OPERATING CHARACTERISTICS
Figure 4. THD vs. POUT
, RI = 8 W, f = 1 kHz Figure 5. THD vs. POUT
, RI = 4 W, f = 1 kHz
THD+ N vs Pout @ 255C
0.01
0.1
1
10
100
10 100 1000 10000
Pout (mW)
THD (%)
V p=2.5V V p=2.7V V p=3V V p=3.6V V p=4.2V V p=5V V p=5.5V
THD+ N vs Pout @ 255C
0.01
0.1
1
10
100
10 100 1000 10000
Pout (mW)
THD (% )
V p=2.5V V p=2.7V V p=3V V p=3.6V V p=4.2V V p=5V V p=5.5V
Figure 6. Efficiency vs. POUT
, RI = 8 W, f = 1 kHz Figure 7. THD vs. Frequency, RI = 8 W,
POUT = 250 mW
Effi ci e ncy vs vs Pout @ 255C
0
10
20
30
40
50
60
70
80
90
100
0 500 1000 1500 2000
Pout (mW)
(% )
V p=2.5V V p=2.7V V p=3V V p=3.6V V p=4.2V V p=5V V p=5.5V
THD vs Fre que ncy @ Pout= 250mW
0.001
0.01
0.1
1
10 100 1000 10000 100000
Fr eq( Hz )
THD(%)
V p=5V V p=3.6V V p=2.5V
Figure 8. THD vs. Frequency, RI = 8 W, POUT = 1 W Figure 9. PSRR vs. Frequency
THD vs Fre que ncy @ Pout= 1W
0.001
0.01
0.1
1
10 100 1000 10000 100000
Fr eq( Hz )
THD(% )
V p=5V
PSRR vs. Fre q I nput gnd (100nF)
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1000 10000 100000
f r eq ( Hz)
PSRR (dB)
V p=2.5V
V p=3.6V
V p=4.2V
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PCB LAYOUT
As with all Class D amplifier, care must has been observed
to place the components on the PCB and layout the critical
nodes. The evaluation board is made of 4 PCB layers where
first internal layer is a GND. Figure 10, Figure 12 and
Figure 13 show the layout of the NCP2823 Series evaluation
board. For more specific layout guidelines please refer to the
NCP2823 datasheet.
Figure 10. Assembly Layer TOP
Figure 11. Assembly Layer BOTTOM
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Figure 12. Top Layer Routing
Figure 13. Bottom Layer Routing
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Table 2. BILL OF MATERIALS
Qty Ref Des. Description Size Manufacturer Part Number
1 U1 NCP2823 CSP−9
1.45 x 1.45
mm
ON Semiconductor NCP2823
2C1, C2 Capacitor, Ceramic 100 nF 0603 KEMET C0603C104K5RAC
2 C4 Capacitor, Ceramic 4.7 mF 6.3 V 0603 KEMET C0603C475K9PAC
2R1, R2 Resistor 150k 1% 0603 Std Any supplier possible
2 J11,
J17
Mal. SL5.08/2/90B plus Fem. BLZ
5.08/2
Weidmuller SL5.08/2/90 +
BLZ 5.08/2
3 J1 Header 3 pin, 100 mil spacing 0.100 x 2 Std Std
2J7, J8 Header 2 pin, 100 mil spacing 0.100 x 2 Std Std
1 J7 GND Connection Std Std
9J2, J3, J9,
J10, J12, J13
Test Point Std Std
2J31, J32 Soldering point must be connected
1 PCB PCB 2.0 in x 2.0 in x 1.0 mm, 4 Layers Any TLS−P−001−A−1109−RD
NOTE: Component J20, J25, J26, L1, L2, C8 and C9 are not mounted on this demokit.
ASSEMBLY TEST PROCEDURE
A power supply set to 3.6 V and current limit set to at least
1.5 A must be connected to J15 connector to powering the
NCP2823 Series evaluation board. Also to compensate for
parasitic inductance of wires between the power supply and
the evaluation board it is highly recommended to connect a
470 mF electrolytic capacitor to bypass J11 terminal. Like
this the device can be evaluate under powering condition
very similar that battery power supplies.
These tests are provided in order to guarantee a good
assembly of the NCP2823 on its dedicated board, it do not
consist in parametric test which is already done at chip level.
SHUTDOWN TEST
Switches setup for shutdown test:
Symbol Switch Description
J1 Must be connected to ground (low side)
*All other switches must be kept floating
Tests:
1. Set the switches in the configuration
2. Power the board with a 3.6 V power supply
limited at 1.5A and bypassed by a 470 mF
electrolytic capacitor.
3. Measure the current on the power supply (must be
inferior to 1 mA)
Wake up test
Switches setup for wire mode test:
Symbol Switch Description
J1 Must be connected to VDD (high side)
*All other switches must be kept floating
Tests:
4. Set the switches in the configuration
5. Power the board with a 3.6 V power supply
limited at 1.5 A and bypassed by a 470 mF
electrolytic capacitor.
6. Measure DC Output voltage on J12 on J13 and
GND. DC Voltage must be equal to 1.8 V
7. Measure DC input voltage on J5−2 on J6−2 and
GND. DC Voltage must be equal to 1.26 V
SUMMARY
Test Measurement Switch Description
Shutdown test I Supply I < 1 mA
Wake up test VOUTP, VOUTN
VJ9, VJ10
VDC = 1.8 V
VDC = 1.26 V
NOTE: For each board a Test Result Table must be fully
completed (see the next page)
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TEST RESULT TABLE
NCP2823 Assembly Test
Date Operator Name
Board Serial Number
Test No. Test Name Results Value
1Shutdown mode test I Supply
2Wake up test VoutP, VoutN 1.8
VJ9, VJ10 1.26
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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EVBUM2108/D
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