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Rev.1.00, Oct.30.2003, page 1 of 11
H7N0608LD, H7N0608LS, H7N0608LM
Silicon N Channel MOS FET
High Speed Power Switching REJ03G0144-0100Z
Rev.1.00
Oct.30.2003
Features
• Low on-resistance
RDS(on) = 6.0 mΩ typ.
• Low drive current
• Available for 4. 5 V gat e drive
Outline
LDPAK
D
G
S
1. Gate
2. Drain
3. Source
4. Drain
123
4
123
4
H7N0608LD
H7N0608LS
123
4
H7N0608LM
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 2 of 11
Absolute Maximum Ratings
(Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage VDSS 60 V
Gate to source voltage VGSS ±20 V
Drain current ID70 A
Drain peak current ID (pulse)Note1 280 A
Body-drain diode reverse drain current IDR 70 A
Avalanche current IAPNote3 40 A
Avalanche energy EARNote3 137 mJ
Channel dissipation PchNote2 80 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 3 of 11
Electrical Characteristics
(Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown
voltage V(BR)DSS 60 — — V ID = 10 mA, VGS = 0
Gate to source breakdown Voltage V(BR)GSS ±20 — — V IG = ±100 µA, VDS = 0
Gate to source leak current IGSS ——±10 µAV
GS = ±16 V, VDS = 0
Zero gate voltage drain current IDSS ——10µAV
DS = 60 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.5 — 2.5 V ID = 1 mA, VDS = 10 VNote1
Static drain to source on state RDS(on) —6.08.0mΩID = 35 A, VGS = 10 VNote1
resistance — 8.0 12 mΩID = 35 A, VGS = 4.5 VNote1
Forward transfer admittance |yfs|4575—S I
D = 35 A, VGS = 10 VNote1
Input capacitance Ciss — 6200 — pF VDS = 10 V
Output capacitance Coss — 680 — pF VGS = 0
Reverse transfer capacitance Crss — 350 — pF f = 1 MHz
Total gate charge Qg — 100 — nC VDD = 25 V
Gate to source charge Qgs — 20 — nC VGS = 10 V
Gate to drain charge Qgd — 20 — nC ID = 70 A
Turn-on delay time td(on) —45—nsV
GS = 10 V, ID = 35 A
Rise time tr— 220 — ns RL = 0.86 Ω
Turn-off delay time td(off) — 125 — ns Rg = 4.7 Ω
Fall time tf—35—ns
Body–drain diode for ward voltage VDF —0.94—V I
F = 70 A, VGS = 0
Body–drain diode reverse
recovery time trr —40—nsI
F = 70 A, VGS = 0
diF/dt = 100 A/µs
Notes: 1. Pulse test
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 4 of 11
Main Characteristics
160
120
80
050 100 150 200 0.1 0.3 1 310 30 100
100
80
60
40
20
0246810
1000
300
100
30
10
1
0.3
0.03
0.01
0.1
3
Ta = 25°C
10 µs
100 µs
1 ms
40
4.5 V
4.0 V
3.6 V
10 V
100
80
60
40
20
0246810
–40°C
25°C
Tc = 150°C
VDS = 10 V
Pulse Test
VGS = 3.2 V
DC Operation
(Tc = 25°C)
PW = 10 ms
(1 shot)
Pulse Test
Channel Dissipation Pch (W)
Case Temperature Tc (°C)
Power vs. Temperature Derating
Drain to Source Voltage VDS (V)
Drain Current ID (A)
Maximum Safe Operation Area
Gate to Source Voltage VGS (V)
Typical Transfer Characteristics
Drain Current ID (A)
Drain to Source Voltage VDS (V)
Drain Current ID (A)
Typical Output Characteristics
Operation in
this area is
limited by R
DS(on)
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 5 of 11
048
12 16 20
500
400
300
200
100
I
D
= 50 A
20 A
10 A
1 30 100
3
100
1
10 1000
10
3
30
300
V
GS
= 4.5 V
10 V
0.1 0.3 1 3 10
100
1000
300
30
10
1
3
0.3
0.1
Tc = –40°C
150°C
25°C
V
DS
= 10 V
Pulse Test
20
16
12
8
4
–50 0–25 25 50 75 100 125 150
0
V
GS
= 10 V
4.5 V
50 A
10, 20 A
10, 20, 50 A
30 100
Pulse Test Pulse Test
Pulse Test
Drain Current I
D
(A)
Drain to Source on State Resistance
R
DS(on)
(mΩ)
Drain to Source on State Resistance
R
DS(on)
(mΩ)
Static Drain to Source on State Resistance
vs. Drain Current
Case Temperature Tc (°C)
Static Drain to Source on State Resistance
vs. Temperature
Drain Current I
D
(A)
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
Gate to Source Voltage V
GS
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Drain to Source Saturation Voltage
V
DS(on)
(V)
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 6 of 11
10.1 0.3 3 10 30 100 01020304050
100
1000
300
100
80
60
40
20
0
20
16
12
8
4
40 80 120 160 200
0
1000
100
300
30
10
1
3
0.1 0.3 3 10 100
1000
100
300
30
3
10
1
30
301
10
VGS = 0
f = 1 MHz
Ciss
Coss
Crss
ID = 85 A VGS
VDS
VGS = 10 V, VDD = 30 V
PW = 5 µs, duty < 1 %
Rg = 4.7 Ω
tr
tr
td(on)
td(off)
tf
tf
3000
10000
di / dt = 100 A / µs
VGS = 0, Ta = 25°C
VDD = 50 V
25 V
10 V
VDD = 50 V
25 V
10 V
Reverse Drain Current IDR (A)
Reverse Recovery Time trr (ns)
Body-Drain Diode Reverse
Recovery Time
Capacitance C (pF)
Drain to Source Voltage VDS (V)
Typical Capacitance vs.
Drain to Source Voltage
Gate Charge Qg (nc)
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Dynamic Input Characteristics
Switching Time t (ns)
Drain Current ID (A)
Switching Characteristics
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 7 of 11
00.4 0.8 1.2 1.6 2.0
V
GS
= 0, –5 V
10 V
5 V
100
80
60
40
20
D. U. T
Rg
I
Monitor
AP
V
Monitor
DS
V
DD
50Ω
Vin
15 V
0
I
D
V
DS
I
AP
V
(BR)DSS
L
V
DD
E = • L • I •
2
1V
V – V
AR AP
DSS
DSS DD
2
200
160
120
80
40
25 50 75 100 125 150
0
I
AP
= 40 A
V
DD
= 25 V
duty < 0.1 %
Rg > 50 Ω
Pulse Test
Source to Drain Voltage V
SD
(V)
Reverse Drain Current I
DR
(A)
Reverse Drain Current vs.
Source to Drain Voltage
Channel Temperature Tch (°C)
Repetitive Avalanche Energy E
AR
(mJ)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Avalanche Test Circuit Avalanche Waveform
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 8 of 11
tr
td(on)
Vin
90% 90%
10%
10%
Vout
td(off)
90%
10%
tf
3
1
0.3
0.1
0.03
0.01
10 µ100 µ1 m 10 m 100 m 1 10010
Vin Monitor
D.U.T.
Vin
10 V
RL
V
= 30 V
DS
Vout
Monitor
Rg
Tc = 25°C
D = 1
1shot pulse
0.5
0.2
0.1
0.05
0.02
0.01
DM
P
PW
T
D = PW
T
θch - c(t) = γs (t) • θch - c
θch - c = 1.56°C/ W, Tc = 25°C
Switching Time Test Circuit Waveform
Pulse Width PW (S)
Normalized Transient Thermal Impedance γs (t)
Normalized Transient Thermal Impedance vs. Pulse Width
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 9 of 11
Package Dimensions
• H7N0608LD
Package Code
JEDEC
JEITA
Mass
(reference value)
LDPAK (L)
—
—
1.40 g
10.2 ± 0.3
0.86
0.76 ± 0.1
2.54 ± 0.5
2.54 ± 0.5
+ 0.2
– 0.1
1.3 ± 0.2
4.44 ± 0.2
1.3 ± 0.15
2.49 ± 0.2
0.4 ± 0.1
11.0 ± 0.5
8.6 ± 0.3
10.0
11.3 ± 0.5
+ 0.3
– 0.5
(1.4)
1.37 ± 0.2
As of January, 2003
Unit: mm
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 10 of 11
• H7N0608LS
Package Code
JEDEC
JEITA
Mass
(reference value)
LDPAK (S)-(1)
—
—
1.30 g
10.2 ± 0.3
1.37 ± 0.2
(1.5)
(1.4)
8.6 ± 0.3
10.0 + 0.3
– 0.5
4.44 ± 0.2
1.3 ± 0.15
0.1 + 0.2
– 0.1
0.4 ± 0.1
2.49 ± 0.2
0.86 + 0.2
– 0.1
2.54 ± 0.5
2.54 ± 0.5
1.3 ± 0.2
3.0 + 0.3
– 0.5
(1.5)
7.8
6.6
2.2
1.7
7.8
7.0
As of January, 2003
Unit: mm
H7N0608LD, H7N0608LS, H7N0608LM
Rev.1.00, Oct.30.2003, page 11 of 11
• H7N0608LM
Package Code
JEDEC
JEITA
Mass
(reference value)
LDPAK (S)-(2)
—
—
1.35 g
10.2 ± 0.3
1.37 ± 0.2
(2.3)
(1.4)
8.6 ± 0.3
10.0 + 0.3
– 0.5
4.44 ± 0.2
1.3 ± 0.15
0.1 + 0.2
– 0.1
0.4 ± 0.1
2.49 ± 0.2
0.86 + 0.2
– 0.1
2.54 ± 0.5
2.54 ± 0.5
1.3 ± 0.2
5.0 + 0.3
– 0.5
(1.5)
7.8
6.6
2.2
1.7
7.8
7.0
As of January, 2003
Unit: mm
©
2003. Renesas Technolo
gy
Corp., All ri
g
hts reserved. Printed in Japan
.
Colo
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Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
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