P-TO263-15-1
Data Sheet 1 2001-02-01
TrilithIC
Data Sheet
BTS 7710 GP
1Overview
1.1 Features
• Quad D-MOS switch driver
• Free configurable as bridge or quad-switch
• Optimized for DC motor management applications
•Low
RDS ON: 70 mτ high-side switch, 40 mτ low-side
switch (typical values @ 25 C)
• Maximum peak current: typ. 15 A @ 25 C=
• Very low quiescent current: typ. 5 ←A @ 25 C=
• Small outline, thermal optimized PowerPak
• Load and GND-short-circuit-protection
• Operates up to 40 V
• Status flag diagnosis
• Overtemperature shut down with hysteresis
• Internal clamp diodes
• Isolated sources for external current sensing
• Under-voltage detection with hysteresis
• PWM frequencies up to 50 kHz
1.2 Description
The BTS 7710 GP is part of the TrilithIC family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated leadframes. The sources are connected
to individual pins, so the BTS 7710 GP can be used in H-bridge- as well as in any other
configuration. The double high-side is manufactured in SMART SIPMOS® technology
which combines low RDS ON vertical DMOS power stages with CMOS control circuitry.
The high-side switch is fully protected and contains the control and diagnosis circuitry.
To achieve low RDS ON and fast switching performance, the low-side switches are
manufactured in S-FET logic level technology. The equivalent standard product is the
BUZ 103 SL.
In contrast to the BTS 7710 G, which consists of the same chips in an P-DSO-28
package, the P-TO263-15-1 PowerPack offers a much lower thermal resistance, which
opens up applications with even higher currents in the automotive and industrial area.
Type Ordering Code Package
BTS 7710 GP Q67006-A9400 P-TO263-15-1
BTS 7710 GP
Data Sheet 2 2001-02-01
1.3 Pin Configuration
(top view)
Figure 1
1
2
3
4
5
6
7
9
10
11
12
13
14
15
IL1
NC
SL1
SH1
NC
NC
NC
GND
IH1
DHVS
ST
IH2
SH2
IL2
SL2
8
18
17
16
DHVS
DL1
DL2
Heat-Slug 1
Heat-Slug 2
Heat-Slug 3
Molding
Compound
BTS 7710 GP
Data Sheet 3 2001-02-01
Pins written in bold type need power wiring.
1.4 Pin Definitions and Functions
Pin No. Symbol Function
1 IL1 Analog input of low-side switch 1
2 NC Not connected
3 SL1 Source of low-side switch 1
4 NC Not connected
5 SH1 Source of high-side switch 1
6 GND Ground of high-side switches
7 IH1 Digital input of high-side switch 1
8 DHVS Drain of high-side switches and power supply voltage
9 ST Status; open Drain output
10 IH2 Digital input of high-side switch 2
11 SH2 Source of high-side switch 2
12 NC Not connected
13 IL2 Analog input of low-side switch 2
14 NC Not connected
15 SL2 Source of low-side switch 2
16 DL2 Drain of low-side switch 2
Heat-Slug 3 or Heat-Dissipator
17 DHVS Drain of high-side switches and power supply voltage
Heat-Slug 2 or Heat-Dissipator
18 DL1 Drain of low-side switch 1
Heat-Slug 1 or Heat-Dissipator
BTS 7710 GP
Data Sheet 4 2001-02-01
1.5 Functional Block Diagram
Figure 2
Block Diagram
SH2
DHVS
ST
IL1
GND
IH1
SL2
8, 17
10
7
11
15
6
13
1
R
O1
R
O2
Biasing and Protection
5
18
9
IH2
IL2
3
16
SL1
DL2
SH1
DL1
Diagnosis
Driver
OUT
0
IN
0 L L
0 1 L H
1 0 H L
1 1 H H
BTS 7710 GP
Data Sheet 5 2001-02-01
1.6 Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical
power-MOS-FETs.
Output Stages
The output stages consist of an low RDS ON Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection
The outputs are protected against
– output short circuit to ground
– overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-
Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
Overtemperature Protection
The high-side switches incorporate an overtemperature protection circuit with hysteresis
which switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage VS drops below
the switch off value VUVOFF.
BTS 7710 GP
Data Sheet 6 2001-02-01
Status Flag
The status flag output is an open drain output with Zener-diode which requires a pull-up
resistor, c.f. the application circuit on page 14. Various errors as listed in the table
“Diagnosis” are detected by switching the open drain output ST to low. A open load
detection is not available. Freewheeling condition does not cause an error.
2 Truthtable and Diagnosis (valid only for the High-Side-Switches)
Flag IH1 IH2 SH1 SH2 ST Remarks
Inputs Outputs
Normal operation;
identical with functional truth table
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
1
1
1
1
stand-by mode
switch2 active
switch1 active
both switches
active
Overtemperature high-side switch1 0
1
X
X
L
L
X
X
1
0detected
Overtemperature high-side switch2 X
X
0
1
X
X
L
L
1
0detected
Overtemperature both high-side switches 0
X
1
0
1
X
L
L
L
L
L
L
1
0
0
detected
detected
Undervoltage X X L L 1 not detected
Inputs: Outputs: Status:
0 = Logic LOW Z = Output in tristate condition 1 = No error
1 = Logic HIGH L = Output in sink condition 0 = Error
X = don’t care H = Output in source condition
X = Voltage level undefined
BTS 7710 GP
Data Sheet 7 2001-02-01
3 Electrical Characteristics
3.1 Absolute Maximum Ratings
– 40 C < Tj < 150 C
Parameter Symbol Limit Values Unit Remarks
min. max.
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)
Supply voltage VS– 0.3 42 V –
Supply voltage for full short
circuit protection
VS(SCP) 28 V –
HS-drain current IS– 10 * A TC = 125°C; DC
HS-input current IIH – 5 5 mA Pin IH1 and IH2
HS-input voltage VIH – 10 16 V Pin IH1 and IH2
Note: * internally limited
Status Output ST
Status pull up voltage VST – 0.3 5.4 V –
Status Output current IST – 5 5 mA Pin ST
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
Drain- source break down
voltage
VDSL 55 – V VIL =0V; ID1mA
LS-drain current IDL –12 12 A TC = 125°C; DC
LS-drain current
TC = 85°C
IDL –20At < 100 ms; ↑Ψ0.1
–30A
t < 1 ms; ↑Ψ0.1
LS-input voltage VIL – 20 20 V Pin IL1 and IL2
Temperatures
Junction temperature Tj– 40 150 C–
Storage temperature Tstg – 55 150 C–
BTS 7710 GP
Data Sheet 8 2001-02-01
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Note: In the operating range the functions given in the circuit description are fulfilled.
Thermal Resistances (one HS-LS-Path active)
LS-junction case RthjC L –1.7K/W
HS-junction case RthjC H –1.7K/W
Junction ambient
Rthja = Tj(HS)/(P(HS)+P(LS))
Rthja – 26 K/W device soldered to
reference PCB with
6cm
2 cooling area
ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/
ESD assn. standard S5.1 - 1993)
Input LS-Switch VESD –0.5kV
Input HS-Switch VESD –1kV
Status HS-Switch VESD –2kV
Output LS and HS-Switch VESD – 8 kV all other pins connected
to Ground
3.2 Operating Range
– 40 C < Tj < 150 C
Parameter Symbol Limit Values Unit Remarks
min. max.
Supply voltage VSVUVOFF 42 V After VS rising
above VUVON
Input voltages VIH – 0.3 15 V –
Input voltages VIL – 0.3 20 V –
Output current IST 02mA–
Junction temperature TjHS – 40 150 C–
3.1 Absolute Maximum Ratings (cont’d)
– 40 C < Tj < 150 C
Parameter Symbol Limit Values Unit Remarks
min. max.
BTS 7710 GP
Data Sheet 9 2001-02-01
3.3 Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 C < Tj < 150 C; 8 V < VS < 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Current Consumption HS-switch
Quiescent current IS–58←A IH1 = IH2 = 0 V
Tj = 25 C
––12←A IH1 = IH2 = 0 V
Supply current IS– 1.5 2.6 mA IH1 or IH2 = 5 V
VS = 12 V
– 3 5.2 mA IH1 and IH2 = 5 V
VS = 12 V
Leakage current of
highside switch
ISH LK ––6←AVIH = VSH = 0 V
Leakage current through
logic GND in free wheeling
condition
ILKCL =
IFH + ISH
––10mAIFH = 3 A
Current Consumption LS-switch
Input current IIL – 10 100 nA VIL = 20 V;
VDSL = 0 V
Tj = 25 C
Leakage current of lowside
switch
IDL LK ––10←AVIL = 0 V
VDSL = 40 V
Under Voltage Lockout (UVLO) HS-switch
Switch-ON voltage VUVON ––4.5VVS increasing
Switch-OFF voltage VUVOFF 1.8 – 3.2 V VS decreasing
Switch ON/OFF hysteresis VUVHY –1–VVUVON – VUVOFF
BTS 7710 GP
Data Sheet 10 2001-02-01
Output stages
Inverse diode of high-side
switch; Forward-voltage
VFH –0.81.2VIFH = 3A
Inverse diode of lowside
switch; Forward-voltage
VFL –0.81.2VIFL = 3 A
Static drain-source
on-resistance of highside
switch
RDS ON H – 7090mτISH =1A
Tj = 25 C
Static drain-source
on-resistance of lowside
switch
RDS ON L – 4050mτISL =1A;
VIL = 5 V
Tj = 25 C
Static path on-resistance RDS ON ––260mτRDS ON H +R
DS ON L
ISH =1A;
Short Circuit of highside switch to GND
Initial peak SC current ISCP H 15 18 20 A Tj = – 40 °C
Initial peak SC current ISCP H 13 15 17 A Tj = + 25 °C
Initial peak SC current ISCP H 9 1113A Tj = + 150 °C
Short Circuit of highside switch to VS
Output pull-down-resistor RO8 1535kτVDSL = 3 V
Thermal Shutdown
Thermal shutdown junction
temperature
Tj SD 155 180 190 C–
Thermal switch-on junction
temperature
Tj SO 150 170 180 C–
Temperature hysteresis αT–10–CαT = TjSD –TjSO
3.3 Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 C < Tj < 150 C; 8 V < VS < 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
BTS 7710 GP
Data Sheet 11 2001-02-01
Status Flag Output ST of highside switch
Low output voltage VST L –0.20.6VIST = 1.6 mA
Leakage current IST LK ––10←AVST = 5 V
Zener-limit-voltage VST Z 5.4 – V IST = 1.6 mA
Switching times of highside switch
Turn-ON-time;
to 90% VSH
tON – 75 160 ←sR
Load = 12 τ
VS = 12 V
Turn-OFF-time;
to 10% VSH
tOFF – 60 160 ←sR
Load = 12 τ
VS = 12 V
Slew rate on 10 to 30% VSH dV/dtON ––1.5V/←sR
Load = 12 τ
VS = 12 V
Slew rate off 70 to 40% VSH -dV/
dtOFF
––2.0V/←sR
Load = 12 τ
VS = 12 V
Note: switching times are guaranteed by design
Switching times of low-side switch
Turn-ON delay time;
VIL = 5V; RG = 7τ
td_ON_L – 9 14 ns resistive load
ISL = 3 A; VS = 30 V
Switch-ON time;
VIL= 5V; RG = 7τ
tON_L – 2540nsresistive load
ISL = 3 A; VS = 30 V
Switch-OFF delay time;
VIL= 5V; RG = 7τ
td_OFF_L – 3655nsresistive load
ISL = 3 A; VS = 30 V
Switch-OFF time;
VIL= 5V; RG = 7τ
tOFF_L – 2233nsresistive load
ISL = 3 A; VS = 30 V
3.3 Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 C < Tj < 150 C; 8 V < VS < 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
BTS 7710 GP
Data Sheet 12 2001-02-01
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 C and
the given supply voltage.
Gate charge of lowside switch
Input to source charge QIS –46nCISL = 3 A; VS = 14 V
Input to drain charge QID – 1016nCISL = 3 A; VS = 14 V
Input charge total QI– 2843nCISL = 3 A; VS = 14 V
VIL = 0 to 10 V
Input plateau voltage V(plateau) –2.75- VISL = 3 A; VS = 14 V
Note: switching times and input charges are guaranteed by design
Control Inputs of highside switches IH 1, 2
H-input voltage VIH High ––2.5V–
L-input voltage VIH Low 1––V–
Input voltage hysterese VIH HY –0.3–V–
H-input current IIH High 15 30 60 ←AVGH = 5 V
L-input current IIH Low 5–20←AVGH = 0.4 V
Input series resistance RI2.7 4 5.5 kτ–
Zener limit voltage VIH Z 5.4––VIGH = 1.6 mA
Control Inputs IL1, 2
Gate-threshold-voltage VIL th 0.9 1.7 2.2 V IDL = 1 mA
3.3 Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 C < Tj < 150 C; 8 V < VS < 18 V
unless otherwise specified
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
BTS 7710 GP
Data Sheet 13 2001-02-01
Figure 3
Test Circuit
HS-Source-Current Named during Short
Circuit
Named during Leakage-
Cond.
ISH1,2 ISCP H IDL LK
SH2
DHVS
ST
IL1
GND
IH1
SL2
8, 17
10
7
11
15
6
13
1
R
O1
R
O2
Biasing and Protection
5
18
9
IH2
IL2
3
16
SL1
DL2
SH1
DL1
I
GND
I
LKCL
V
S
=12V
C
L
100µF
C
S
470nF
I
FH1,2
I
S
I
SH2
I
DL2
I
SH1
I
DL1
I
DL LK 2
I
DL LK 1
V
DSL1
-V
FL1
V
DSL2
-V
FL2
-V
FH2
V
DSH2
-V
FH1
V
DSH1
V
UVON
V
UVOFF
I
SL2
I
SL1
I
SCP L 1
I
SCP L 2
V
IL2
V
IL th 2
V
IL1
V
IL th 1
V
ST
V
STL
V
STZ
V
IH1
V
IH2
Gate
Driver
Gate
Driver
Diagnosis
I
ST
I
ST LK
I
IH1
I
IH1
I
IL1
I
IL2
BTS 7710 GP
Data Sheet 14 2001-02-01
Figure 4
Application Circuit
SH2
DHVS
ST
IL1
GND
IH1
SL2
8, 17
10
7
11
15
6
13
1
TLE
4278G
V
S
=12V
D01
Z39
C
S
10µF
C
D
47nF
D
I
Q
Reset
Watchdog
C
Q
22µF
V
CC
WD R
GND
µP
R
O1
R
O2
Biasing and Protection
M
5
18
9
IH2
IL2
3
16
SL1
DL2
SH1
DL1
R
Q
100 k
τ
ττ
τ
R
S
10 k
τ
ττ
τ
Gate
Driver
Gate
Driver
Diagnosis
BTS 7710 GP
Data Sheet 15 2001-02-01
4 Package Outlines
GPT09151
A
8˚ max.
BA0.25
M
0.1
Typical
±0.2
21.6
8.3
1)
8.21)
(15)
±0.2
9.25 ±0.3
1
0...0.15
0.8
±0.1
±0.1
1.27
4.4
B
0.5
±0.1
±0.3
2.7
4.7±0.5
0.05
1)
0.1
All metal surfaces tin plated, except area of cut.
2.4
14x1.4
8.41)
8.18
±0.15
1
±0.2
±0.15
5.56
4.8
1)
P-TO263-15-1
(Plastic Transistor Single Outline Package)
GPS05123
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
SMD = Surface Mounted Device
BTS 7710 GP
Data Sheet 16 2001-02-01
Published by
Infineon Technologies AG i Gr.,
Bereichs Kommunikation
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices please contact your nearest
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list).
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sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other
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