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Precision Edge®
SY100EL29V
Micrel, Inc.
M9999-031306
hbwhelp@micrel.com or (408) 955-1690
Pin Function
CLK, /CLK Differential Clock Inputs
D[0:1], /D[0:1] Differential Data Inputs
Q[0:1], /Q[0:1] Differential Data Outputs
R0, R1Reset Inputs
S0, S1Set Inputs
VBB VBB Reference Output
VCC VCC
VEE VEE
DESCRIPTION
FEATURES
■3.3V and 5V power supply option
■Differential D, CLK and Q
■Extended VEE range of –3.0V to –5.5V
■VBB output for single-ended use
■1100MHz min. toggle frequency
■Asynchronous Reset and Set
■Fully compatible with Motorola MC100LVEL29 and
MC100EL29
■Available in 20-pin SOIC package
5V/3.3V DUAL DIFFERENTIAL
DA TA AND CLOCK
D FLIP-FLOP w/SET AND RESET
Precision Edge®
SY100EL29V
Rev.: E Amendment: /0
Issue Date:
March 2006
PIN NAMES
R S D CLK Q /Q
LLLZLH
LLHZHL
HLXXLH
LHXXHL
H H X X Undef Undef
TRUTH TABLE
NOTE:
Z = LOW-to-HIGH Transition
The SY100EL29V is a dual differential register with
differential data (inputs and outputs) and clock. The
registers are triggered by a positive transition of the
positive clock (CLK) input. A HIGH on the Reset (Rx)
asynchronously resets the appropriate register so that
the Q outputs go LOW. A HIGH on the Set (Sx)
asynchronously resets the appropriate register so that
the Q outputs go HIGH. The Set and Reset inputs cannot
both be HIGH simultaneously.
The differential input structures are clamped so that
the inputs of unused registers can be left open without
upsetting the bias network of the devices. The clamping
action will assert the /D and the /CLK sides of the inputs.
The noninverting input will pull down to VEE and the
inverting input will be biased around VCC/2. Because of
the edge-triggered flip-flop nature of the devices,
simultaneously opening both the clock and data inputs
will result in an output which reaches an unidentified but
valid state.
The fully differential design of the devices makes them
ideal for very high frequency applications where a
registered data path is necessary.
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge®