MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
M
agnaChip Se
miconductor L
td
.
1
Parameter
V
alue
Unit
V
DS
@
T
j,max
850
V
R
DS(on),max
0.9
Ω
V
TH
,typ
3
V
I
D
6
A
Q
g,typ
17.6
nC
Order Code
Marking
T
emp. Range
Package
Packing
RoHS Status
MM
D80R
900P
RH
80R900P
-55 ~ 150
℃
TO
-
252
(D-P
AK)
Reel &
T
ape
Halogen Free
MM
D80R900P
800
V 0.9
Ω
N-channel MOS
FET
Description
MMD80R
900P is pow
er MOSFE
T using ma
gnachip
’
s advanced super
junction te
chnology that
can
realize v
ery low on-resistance and ga
te charge. It
will provide
much high ef
ficiency by usi
ng
optimized char
ge coupling technolo
gy
. These u
ser friendl
y devices give an
advantage of Low
EMI to
designers as w
ell as low
switching loss.
Features
Low Pow
er Loss by High Speed Sw
itching
and Lo
w On-Resistance
100%
Av
alanche
T
es
ted
Green Packa
ge
–
Pb Free Plating, Halo
gen Free
Key Parameters
Ordering Informatio
n
Applications
PFC Pow
er Supply Stages
Switching
Applications
Adapter
Motor Control
DC
–
DC Converters
D
G
S
G
D
S
Package & Internal
Circui
t
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
M
agnaChip Se
miconductor L
td
.
2
Parameter
Symbol
Rating
Unit
Note
Drain
–
Source vol
tage
V
DSS
8
00
V
Gate
–
Source vol
tage
V
GSS
±
30
V
Continuous drain
current
I
D
6.0
A
T
C
=25
℃
3.8
A
T
C
=100
℃
Pulsed drain cu
rrent
(1)
I
DM
18
A
Power dissi
pation
P
D
75.8
W
Single - pulse aval
anche energy
E
AS
230
mJ
MOSFE
T dv/dt rugged
ness
dv/dt
50
V/ns
Diode dv
/dt ruggedness
dv/dt
15
V/ns
Storage tempera
ture
T
stg
-55 ~150
℃
Maximum operatin
g junction
temperature
T
j
150
℃
1)
Pulse width t
P
limited by T
j,m
ax
2)
I
SD
≤
I
D
, V
DS peak
≤
V
(
BR)DSS
Parameter
Symbol
V
alue
Unit
Thermal resistanc
e, junction-case max
R
thjc
1.65
℃
/W
Thermal resistanc
e, junction-ambient max
R
thja
62.5
℃
/W
Thermal Character
istics
Absolute Maximum
Rating (T
c=25
℃
un
less otherw
ise specified)
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
3
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Drain
–
Source
Breakdow
n voltage
V
(BR)D
SS
8
00
-
-
V
V
GS
= 0V
,
I
D
=0.25mA
Gate
Threshold V
oltage
V
GS
(th)
2.5
3
.0
3.5
V
V
DS
= V
GS,
I
D
=0.25mA
Zero Gate V
oltage
Drain Current
I
D
SS
-
-
1
μ
A
V
DS
=
8
00
V
,
V
GS
= 0V
Gate Leakage
Current
I
GSS
-
-
100
nA
V
GS
=
±3
0V
,
V
DS
=0V
Drain-Source On
State Resistance
R
DS(ON)
-
0.78
0.
9
Ω
V
GS
= 10V
, I
D
=
3.8A
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Input Capacitance
C
iss
-
574
-
pF
V
DS
= 25V
, V
GS
= 0V
,
f = 1.0M
Hz
Output Capacitance
C
oss
-
508
-
Reverse
T
ransfer Capacitance
C
rss
-
21
-
Effectiv
e Output Capacit
ance
Energy Related
(3)
C
o(er)
-
16.7
-
V
DS
= 0V to
640
V
,
V
GS
= 0V
,f = 1.0M
Hz
T
urn On
Delay
Time
t
d(on)
-
12.8
-
ns
V
GS
= 10V
, R
G
=
2
5Ω,
V
DS
=
40
0V
, I
D
=
6A
Rise
T
ime
t
r
-
22.4
-
T
urn Of
f
Delay
T
ime
t
d(off)
-
54.4
-
Fall
T
ime
t
f
-
23.6
-
T
o
tal Gate Char
ge
Q
g
-
17.6
-
nC
V
GS
= 10V
, V
DS
=
64
0
V,
I
D
= 6A
Gate
–
Source Cha
rge
Q
gs
-
3.9
-
Gate
–
Drain Char
ge
Q
gd
-
6.7
-
Gate Resistance
R
G
-
2.5
-
Ω
V
GS
= 0V
, f = 1.0M
Hz
3) C
o(er)
is a capacitance that gives the same stored energy as C
OSS
while V
DS
is
rising from 0V to 80% V
(BR)DSS
Static Characterist
ics (T
c
=25
℃
unle
ss otherw
ise specified)
Dynamic Characteri
stics (T
c
=25
℃
unl
ess otherw
ise specified)
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
4
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Continuous Diod
e Forward
Current
I
SD
-
-
6
.0
A
Diode Forw
ard Voltage
V
SD
-
-
1.
4
V
I
SD
=
6 A, VGS = 0 V
Reverse Recov
ery Time
t
rr
-
320
-
ns
I
SD
=
6 A
di/dt = 100 A/μs
V
DD
=
100 V
Reverse Recov
ery Charge
Q
rr
-
2.4
-
μ
C
Reverse Recov
ery Current
I
rrm
-
14.7
-
A
Reverse Diode Ch
aracteristics (
T
c
=25
℃
unless otherw
ise specified)
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
5
Characteristic Gra
ph
MM
D80R
900
P Datash
eet
M
a
r
.
20
14
R
e
v
is
ion
1
.0
M
a
g
n
a
C
h
ip
S
e
mi
c
o
n
d
u
c
t
o
r
L
t
d
.
6
MM
D80R
900
P Datash
eet
M
a
r
.
20
14
R
e
v
is
ion
1
.0
M
a
g
n
a
C
h
ip
S
e
mi
c
o
n
d
u
c
t
o
r
L
t
d
.
7
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
8
T
est Circuit
V
DS
10V
1mA
DUT
100K
Ω
10V
Same type as DUT
+
-
V
DD
DUT
+
-
Same type as DUT
V
DS
+
-
I
S
R
g
10K
Ω
V
gs
±
15V
L
I
F
V
DD
DUT
+
-
I
D
V
DS
V
gs
t
p
R
L
V
DD
DUT
+
-
I
AS
V
DS
R
g
V
gs
t
p
L
10V
V
GS
Charge
Q
g
Q
gs
Q
gd
V
DS
V
GS
90%
10%
T
d(on)
t
r
t
on
T
d(off)
t
f
t
off
V
DD
t
p
t
AV
V
DS(t)
BV
DSS
I
AS
Rds(on) * I
AS
t
rr
t
a
t
b
I
FM
I
RM
d
i
/d
t
0.25 I
RM
0.75 I
RM
0.5 I
RM
V
R
V
RM(REC)
Fig15-1. Gate charge measurement circuit
Fig15-2. Gate charge waveform
Fig16-1. Diode reverse recovery test circuit
Fig16-1. Diode reverse recovery test waveform
Fig17-1. Switching time test circuit for resistive load
Fig17-2. Switching time waveform
Fig18-1. Unclamped inductive load test circuit
Fig18-2. Unclamped inductive waveform
R
g
25
Ω
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
9
Physical Dimension
D-P
AK, 3L
Dimensions are in mil
limeters, unles
s otherwise specified
W
orld
w
ide
S
a
l
e
s
S
uppo
rt Loca
tions
MM
D80R
900
P Datash
eet
Mar
.
2014
Revision 1
.0
MagnaC
hip Semicondu
ctor Ltd
.
10
DISCLAIMER:
The
Products
are
not
designe
d
for
use
in
hostile
environments,
including,
w
ithout
limitation,
aircraft,
nuclear
pow
er
generation,
medical
appliances,
an
d
devices
or
systems
in
which
malfunction
of
any
Product
can
reasonably
be
expected
to
result
in
a
personal
injury.
Se
ller’s
customers
using
or
selling
Seller’s
products
for
use
in
su
ch
applications do so at their own risk and agree to fully defend and indemnify
Seller.
MagnaC
hip reserves
the
right t
o change the
specification
s
and circuitry without
notice
at any
time. MagnaChip does
not c
onsider
respon
sibility
for
use
of
a
ny
circui
try
other
tha
n
circuitry
e
ntirely
include
d
in
a
MagnaChip
pro
duct.
is
a
registered
trademark
of
MagnaChip
Semiconductor
Ltd.
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