NCP590MNPPTAGEVB - ON Semiconductor

© Semiconductor Components Industries, LLC, 2008

March, 2008 - Rev. 1

1Publication Order Number:

NCP590/D

NCP590

Dual Output, High Accuracy,

Ultra Low Dropout

CMOS LDO

The NCP590 is a family of very high precision dual-output CMOS

LDOs offered in a 2x2 DFN8 package. Each output is capable of

delivering up to 300 mA and is available in voltages from 0.8 V to

5 V.

The set point output voltage is accurate to within ±0.9% with an

operating voltage input up to 5.5 V. With its ultra low dropout

characteristics and low quiescent and ground current consumption,

the NCP590 is ideal for all battery operated consumer and

microprocessor applications. The NCP590 is protected against short

circuit and thermal overload conditions.

Features

•Dual Outputs, Each Supporting up to 300 mA Current

•Available in Output Combinations Ranging from 0.8 V to 5.0 V

•2.1 V to 5.5 V VCC Operating Supply Range

•Ultra-High Accuracy (0.9% max at 100 mA load & 25°C)

•Each Output has a Dedicated Enable Control Pin

•Enable Threshold Supports sub-1 V Systems

•Very Low Drop Out Voltage (50 mV typ @ 100 mA load)

•Low Noise (~20 mVrms) without Bypass Capacitor

•Ultra Low Shutdown Current (0.2 mA)

•Low Quiescent and Ground Current (80 - 100 mA typ.)

•Thermal Shutdown and Current Limit Protection

•Active Output Discharge when Disabled

•No Minimum Output Current Required for Stability

•Requires Cout of only 1.0 mF (any ESR) for Stability

•Stable with Any Type of Capacitor (including MLCC) and Zero Load

•Input Under Voltage Lock Out (UVLO)

•Internally Compensated Regulator for Quick Transient Response

•Space-Efficient 2x2 DFN8 Package

•This is a Pb-Free Device

Applications

•Cellular Phones

•Cameras

•MP3/CD Players, PDA's, Camcorders

•DSP Supplies

•Portable Info-tronics

•PCMCIA Cards

•Networking Systems, DSL/Cable Modems

DFN8, 2x2

MN SUFFIX

CASE 506AA

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MARKING DIAGRAM

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

ORDERING INFORMATION

XX = Specific Device Code

M = Date Code

XX M

PIN CONNECTIONS

(Top View)

Vin

EN1

EN2

Vout1

Vout2

GND

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Figure 1. Typical Application

NCP590

Vin Vin

EN1

EN2

OFF

Cin

1 mF

Vout1

Vout2

GND

Cout1

1 mF

Cout2

1 mF

Vout1

Vout2

RLoad

PIN FUNCTION

Pin No. Symbol Function

1 Vin Input; Bypass directly at the IC with a 1 mF ceramic capacitor to Ground

2 EN1 Enable for output regulator 1; raise above 0.95 V to enable Vout1

3 EN2 Enable for output regulator 2; raise above 0.95 V to enable Vout2

4, 5 NC NC; Do not make connection to these pins

6 GND Ground

PAD GND The thermal pad should be connected to ground for best thermal performance. Float if necessary

7 Vout2 Output 2; Bypass to GND with a capacitor, 4.7 mF ≥ C ≥ 0.7 mF, any ESR

8 Vout1 Output 1; Bypass to GND with a capacitor, 4.7 mF ≥ C ≥ 0.7 mF, any ESR

Figure 2. Block Diagram

Current Limit

Saturation Sense

Thermal Protection

Error

Amplifier

Programmable

Reference

Current Limit

Saturation Sense

Thermal Protection

Error

Amplifier

Vout2

Vout1

GND

Vin

EN1

EN2

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ABSOLUTE MAXIMUM RATINGS TJ = -40°C to 125°C

Pin Symbol, Parameter Symbol Condition Min Max Unit

VIN, Input to regulator Voltage VIN -0.3 6.0 V

Current IIN - Internally

Limited

VIN, Input peak Transient Voltage to regulator wrt GND VIN 7.0 V

VOUT1, VOUT2,

Regulated Output

Voltage VOUT -0.3 VIN + 0.3

or 6.0

(Note 1)

Current IOUT - Internally

Limited

EN1, EN2, Enable Input VEN -0.3 VIN + 0.3

or 6.0

(Note 1)

Junction Temperature

Storage Temperature

Tstg

-50

125

150

ESD Capability, Human body model (Note 3) ESDHB -2 2 kV

ESD Capability, Machine model (Note 3) ESDMM -200 200 V

Voutx-Vin (Note 2) VRB - 0.3 V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Which ever limit is lower

2. Exceeding this value will turn on the body diode of the PMOS driver (reference Figure 2).

THERMAL RESISTANCE

Parameter Symbol Condition Value Unit

Junction-to-Ambient 2X2 DFN

1 oz Cu

qJA 207.0 sq mm 1 oz Cu

54.2 sq mm 1 oz Cu

20.2 sq mm 1 oz Cu

158

210

375

_C/W

Junction-to-Ambient 2X2 DFN

2 oz Cu

qJA 207.0 sq mm 2 oz Cu

54.2 sq mm 2 oz Cu

20.2 sq mm 2 oz Cu

133

184

330

_C/W

Junction-to-Board 2X2 DFN PsiJB 36.4 _C/W

Lead Temperature Soldering, (Note 4)

Reflow (SMD styles only), lead free

Tsld 60 -150 sec above 217

40 sec max at peak

265 pk _C

Moisture Sensitivity Level MSL 1

3. This device series incorporates ESD protection and is tested by the following methods:

ESD HBM tested per AEC-Q100-002 (EIA/JESD22-A114)

ESD MM tested per AEC-Q100-003 (EIA/JESD22-A115)

4. Per IPC/JEDEC J-STD-020C

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ELECTRICAL CHARACTERISTICS -40°C v TA v 85°C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6).

VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise

Parameter Symbol Test Conditions Min Typ Max Unit

Regulators

Input Voltage VIN ** which ever limit is greater Vout(max)

+ 0.5 or

2.1 V**

- 5.5 V

Enable Input Voltage VEN * which ever limit is lower 0.0 - VIN+ 0.3

or 5.5*

Voltage Accuracy VOUT IOUT = 100 mA, TA = 25°C (Note 11) -0.9 - +0.9 %

Voltage Accuracy VOUT IOUT = 1 mA to 200 mA

-40 _C v TA v 85_C (Notes 9, 11, 12)

-1.9 - +1.9 %

Overall Voltage Accuracy VOUT IOUT = 1 mA to 200 mA, VIN = (VOUT

+0.5 V) to 5.5 V, 2.1 VINmin 0°C v TA

v 85°C, (Notes 12, 13)

-2.4 - +2.4 %

Line Regulation (Note 7) DVOUT IOUT = 1.0 mA

VIN = (Vout + 0.5 V) to 5.5 V,

VINmin = 2.1 V

-±0.05 - %/V

Load Regulation (Note 7) DVOUT IOUT = 1 mA to 200 mA -0.012 -0.005 0.012 %/mA

Drop-out Voltage, (Note 8) VDO IOUT = 50 mA - 23 40 mV

Drop-out Voltage, (Note 8) VDO IOUT = 100 mA - 52 85 mV

Drop-out Voltage, (Note 8) VDO IOUT = 150 mA - 80 125 mV

Drop-out Voltage, (Note 8) VDO IOUT = 200 mA -110 170 mV

Drop-out Voltage, (Note 8) VDO IOUT = 300 mA - 165 225 mV

Quiescent Current;

Iq = IIN – IOUT

IqVEN1 = 0.95 V, IOUT1 = 0 mA;

VEN2 = 0.4 V, IOUT2 = 0 mA

VEN2 = 0.95 V, IOUT2 = 0 mA;

VEN1 = 0.4 V, IOUT1 = 0 mA

One Regulator ON; One Regulator OFF

- 80 125 mA

Quiescent Current;

Iq = IIN – IOUT

IqIOUT1 = IOUT2 = 0 mA

Both Regulators ON

-115 195 mA

5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

6. VOUT based on the greater of the two outputs.

7. Overall accuracy specified over specified operating conditions of line, load, and temperature.

8. Drop out voltage VDO = VIN – VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V.

9. Guaranteed by design, not production tested.

10. Regulated and stable output over full load range down to 0 mA load.

11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater.

12. Applicable for VOUT u 1.2 V.

13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%.

14. Typical disable current is in the nA.

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ELECTRICAL CHARACTERISTICS -40°C v TA v 85°C (Note 5); VIN = VOUT +0.5 V or 2.1 V, whichever is greater (Note 6).

VEN1,2 = 0.95 V, CIN = COUT1,2 = 1.0 mF, unless noted otherwise

Parameter UnitMaxTypMinTest ConditionsSymbol

Regulators

Ground Current;

IGND = IIN – IOUT

IGND VEN1 = 0.95 V, IOUT1 = 200 mA;

VEN2 = 0.4 V, IOUT2 = 0 mA

VEN2 = 0.95 V, IOUT2 = 200 mA;

VEN1 = 0.4 V, IOUT1 = 0 mA

One Regulator ON; One Regulator OFF

- 105 150 mA

Ground Current;

IGND = IIN – IOUT

IGND IOUT1 = IOUT2 = 200 mA

Both Regulators ON

- 175 250 mA

Disable Current;

IDIS = IIN – IOUT

IDIS IOUT1,2 = 0 mA, VEN1,2 = 0.4 V

Both Regulators OFF

0 (Note

14)

1mA

ILoad Load Current (Note 10) IOUT 0 - - mA

Maximum Output Current IOUT 300 - - mA

Current Limit, per Regulator (Note 9) ISC VOUT = 0 V - 750 - mA

Output Noise Voltage (Note 9) enBW = 10 Hz to 100 kHz

VOUT = 0.8 V

VOUT = 2.8 V

mVRMS

Thermal Shutdown (Note 9) TjSD Junction Temperature - 155 - _C

Hysteresis - 15 -

Input under voltage lock out UVLO - 1.9 2.1 V

UVLO hysteresis UVLOhys - 0.1 - V

Power Supply Rejection Ratio

(Note 9)

PSRR IOUT = 200 mA

120 Hz 0.8 V output

120 Hz 1.8 V output

120 Hz 2.8 V output

Power Supply Rejection Ratio

(Note 9)

PSRR IOUT = 200 mA

1 KHz 2.8 V output - 40 -

Enable Control Characteristics

Maximum Input Current at EN Input IEN VEN = 0.0 V - 0.01 - mA

VEN = VIN - 0.01 -

Low Input Threshold VIL - - 0.4 V

High Input Threshold VIH 0.95 - - V

Timing Characteristics

Turn On Time Delay, Both outputs

turned on with ENABLE

TON To 95% DVO

VIN(MIN) to 5.5 V

- 375 700 ms

Turn Off Time Delay, Both outputs

turned off with ENABLE (Note 9)

TOFF VIN = 5.5 V

VOUT = 5 V, to VOUT = 250 mV

VOUT = 0.8 V, to VOUT = 40 mV

215

155

Recommended Output Capacitor Specifications

Output Capacitance (Note 9) COUT Capacitance over full temperature

range of application. Any ESR

0.7 1.0 4.7 mF

5. Performance guaranteed over specified operating range by design, guard banded test limits, and/or characterization. Production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

6. VOUT based on the greater of the two outputs.

7. Overall accuracy specified over specified operating conditions of line, load, and temperature.

8. Drop out voltage VDO = VIN – VOUT measured when the output voltage has dropped 100 mV from the nominal value for VOUT > 2.0 V.

9. Guaranteed by design, not production tested.

10. Regulated and stable output over full load range down to 0 mA load.

11. VIN is set at VIN = ((VOUT + 0.5 V) + 5.5 V) / 2 or VIN = ((2.1 V) + 5.5 V) / 2, whichever is greater.

12. Applicable for VOUT u 1.2 V.

13. For all output voltages and -40°C to 85°C overall voltage accuracy is 2.9%.

14. Typical disable current is in the nA.

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Figure 3. Measuring Circuit

NCP590

Vin Vin

EN1

EN2

OFF

Iin

Cin

1 mF

IGND

Vout1

Vout2

GND

IOUT1

IOUT2

Cout1

1 mF

Cout2

1 mF

Vout1

Vout2

RLoad

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TYPICAL PERFORMANCE CHARACTERISTICS

200 mA

1.0 mA

Figure 4. Current Limit vs. Temperature Figure 5. Typical Output Voltage Variation vs.

Load Current

TEMPERATURE (°C) LOAD CURRENT (mA)

806040200-20-40

100

200

300

500

600

800

900

3002001000

-3.5

-3.0

-2.5

-2.0

-1.5

-1.0

-0.5

Figure 6. Power Supply Rejection Ratio Figure 7. Cross Channel Rejection vs.

Frequency

f, FREQUENCY (Hz) f, FREQUENCY (Hz)

10,0001,00010010

Figure 8. Output Voltage Change vs.

Temperature for 0.8 Vout

Figure 9. Output Voltage Change vs.

Temperature for 5.0 Vout

TEMPERATURE (°C) TEMPERATURE (°C)

806040200-20-40

0.785

0.790

0.795

0.800

0.805

0.810

0.815

806040200-20-40

4.95

4.96

4.97

5.00

5.01

5.02

5.04

5.05

CURRENT LIMIT (mA)

OUTPUT DROOP (%)

RIPPLE REJECTION (dB)Vout, OUTPUT VOLTAGE (V)

Vout, OUTPUT VOLTAGE (V)

400

700

200 mA

150 mA

100 mA

50 mA

1 mA

4.98

4.99

5.03

200 mA

150 mA

100 mA 50 mA

1 mA

VOUT = 2.8 V

5.0 V 3.3 Vout

2.8 Vout

1.5 Vout

0.8 Vout

-60

-50

-40

-30

-20

-10

REJECTION (dB)

10 100 1000 10000

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TYPICAL PERFORMANCE CHARACTERISTICS

Figure 10. Output Voltage Change vs.

Temperature for 2.8 Vout

Figure 11. 2.8 Vout vs. Line Transient

TEMPERATURE (°C)

806040200-20-40

2.77

2.79

2.80

2.81

2.82

2.83

Figure 12. Load Transient on 2.8 Vout and

Effect on 2.8 Vout for 200 mA Step

Figure 13. Load Transient on 5.0 Vout and

Effect on 3.3 Vout for 200 mA Step

Figure 14. Load Transient on 0.8 Vout and

Effect on 1.5 Vout for 200 mA Step

Figure 15. Typical Turn-on Delay for 3.3 Vout

1 mA, 5.0 Vout 200 mA Output with

Simultaneous Vin and Enable

Vout, OUTPUT VOLTAGE (V)

2.78 200 mA

150 mA

100 mA

50 mA

1 mA

CH2

2.8 V Output1

200 mA step

50 mV / div

CH3

2.8 V Output2

1 mA Load

10 mV / div

CH2, 0.8 V Output

200 mA step

50 mV / div

CH3

1.5 V Output

1 mA Load

10 mV / div

CH4

200 mA step on

0.8 V Output

CH2

Vin 3.3 V to 3.8 V

1 V / div

30 ms rise

30 ms fall

CH3

2.8 V Output, 1 mA Load

10 mV / div, 7 mV pk

NCP590 2.8 V Output, Line Transient Response, dVin = 0.5 V,

Trise = Tfall = 30 msec.

CH3, 5.0 Vout

50 mV / div

200 mA step

CH2

3.3 Vout

10 mV / div

1 mA Load

CH4

5.0 Vout

200 mA step

CH3

EN1, EN2,

Vin 2 V / div

CH2

Vout2 2 V / div

C2 Rise, 50.9 ms

D: 4.80 V

D: 362 ms

@: 4.76 V

C4 rise

24.3 ms

NCP590 Delay 5.5 Vin, EN1 = EN2 = Vin step, Vout1 = 3.3 V 1 mA,

Vout2 = 5.0 V 200 mA

CH4

200 mA step on

2.8 V Output1, 200 mA / div

CH4, Vout1 1 V / div

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APPLICATION INFORMATION

Output Regulator

The output is controlled by a precision trimmed

reference and error amplifier. The output has saturation

control for regulation while the input voltage is low,

preventing over saturation. Current limit and voltage

monitors complement the regulator design to give safe

operating signals to the processor and control circuits.

Standard linear regulator design circuitry consists of

only an active output driver providing current at the

regulated voltage with resistors from the regulated output

to ground (used in the feedback loop). This provides good

turn-on characteristics from the active PFET output driver,

but turn-off characteristics are determined by the output

capacitor values and impedance of the load in parallel with

the internal resistors in the feedback loop. The turn-off

time in the situation with high impedance loads will be

slow. The NCP590 has active pull-down transistors which

turn on during device turn-off creating efficient fast

turn-offs independent of loading.

Stability Considerations

The input capacitor Cin in Figure 3 is necessary to

provide low impedance to the input of the regulator.

The output or compensation capacitor Coutx helps

determine three main characteristics of a linear regulator:

start-up delay, load transient response and loop stability.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. The

aluminum electrolytic capacitor is the least expensive

solution, but, if the circuit operates at low temperatures

(-25°C to -40°C), both the value and ESR of the capacitor

will vary considerably. The capacitor manufacturer's data

sheet usually provides this information.

Stability is guaranteed at values COUT = 0.7 mF to 4.7 mF

and any ESR within the operating temperature range.

Calculating Power Dissipation in a Dual Output Linear

Regulator

The maximum power dissipation for a dual output

regulator (Figure x) is:

PD = (VIN – VOUT1) x IOUT1 + (VIN – VOUT2 ) x IOUT2

+ VIN x IGND (1)

where:

VIN is the maximum input voltage,

VOUT is the output voltage for each output,

IOUT is the output current for each output in the application,

and

IGND is the quiescent or ground current the regulator

consumes at IOUT

Once the value of PD(max) is known, the maximum

permissible value of RqJA can be calculated:

RqJA +(125oC*TA)ńPD(eq. 1)

The value of RqJA can then be compared with those in the

thermal resistance section of the data sheet. Those board

areas with RqJA

's less than the calculated value in equation

2 will keep the die temperature below 125°C. In some

cases, none of the circuit board areas will be sufficient to

dissipate the heat generated by the IC, and an external heat

sink will be required. The current flow and voltages are

shown in the Measurement Circuit Diagram. A chart

showing thermal resistance vs. pcb heat spreader area is

shown below.

Enable

Enabling the two outputs is controlled by two

independent pins, EN1 and EN2. A high (above the high

input threshold) on these logic level input pins causes the

outputs to turn on.

Normal operation allows for input voltages to these pins

to 0.3 V above VIN. It is sometimes necessary to interface

logic outputs from different operating voltages into these

pins. This happens when standard operating system

voltages must interface together (i.e., 5 V to 3.3 V systems).

For example, a 5 V control voltage is needed to control

the NCP590 operating with VIN = 3.6 V. The input current

into the ENx pin can be kept to safe levels by adding a 100 k

resistor in series with the 5 V control drive voltage. This

will keep the input voltage in compliance with the

maximum ratings and will allow control of the output. Use

of this setup will affect turn-on time and will increase the

enable current higher than the input current specified in the

electrical parameter tables.

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Figure 16. Thermal Performance on PCB Heat Spreader

COPPER HEAT SPREADING AREA (mm2)

qJA (°C/W)

400

350

300

200

150

100

250

650600550500450400350300250200150100500

1 oz

2 oz

Thermal impedance of the NCP590 DFN8 mounted to a single sided copper plated circuit board.

ORDERING INFORMATION*

Device Output Voltage

Package Shipping

Orderable Part Number Marking Code VOUT1 VOUT2

NCP590MNVVTAG VV 3.3 3.3 DFN8 2x2 10,000 / Tape & Reel

NCP590MNPPTAG PP 2.8 2.8 DFN8 2x2 10,000 / Tape & Reel

NCP590MNDPTAG DP 1.8 2.8 DFN8 2x2 10,000 / Tape & Reel

NCP590MNOATAG OA 1.5 2.4 DFN8 2x2 10,000 / Tape & Reel

NCP590MN5DTAG 5D 1.2 1.8 DFN8 2x2 10,000 / Tape & Reel

NCP590MN5ATAG 5A 1.2 1.5 DFN8 2x2 10,000 / Tape & Reel

*Contact factory for additional voltage combinations.

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PACKAGE DIMENSIONS

DFN8, 2x2

CASE 506AA-01

ISSUE D

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994 .

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED

TERMINAL AND IS MEASURED BETWEEN

0.25 AND 0.30 MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

ÇÇÇ

C0.10

PIN ONE

2 X

REFERENCE

2 X

TOP VIEW

SIDE VIEW

BOTTOM VIEW

(A3)

C0.10

C0.08

8 X

SEATING

PLANE

e/2 e

8 X

NOTE 3

b8 X

0.10 C

0.05 C

ABB

DIM MIN MAX

MILLIMETERS

A0.80 1.00

A1 0.00 0.05

A3 0.20 REF

b0.20 0.30

D2.00 BSC

D2 1.10 1.30

E2.00 BSC

E2 0.70 0.90

e0.50 BSC

K0.20 ---

L0.25 0.35

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over

time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under

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Phone: 81-3-5773-3850

NCP590/D

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