LTC2950-1/LTC2950-2
1
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FEATURES DESCRIPTIO
U
APPLICATIO S
U
Turn On Debounce
EN
2V/DIV
PB
10ms/DIV 2950 TA01b
Push Button On/Off
Controller
The LTC®2950 is a micropower, wide input voltage range,
push button ON/OFF controller. The part contains a push
button input with independently programmable ON and OFF
debounce times that control the toggling of an open drain
enable output. The part also contains a simple micropro-
cessor interface to allow for proper system housekeeping
prior to power down. Under system fault conditions, an
internal
⎯
K
⎯
I
⎯
L
⎯
L timer ensures proper power down.
The LTC2950 operates over a wide 2.7V to 26V input
voltage range to accommodate a wide variety of input
power supplies. Very low quiescent current (6µA typical)
makes the LTC2950 ideally suited for battery powered
applications. Two versions of the part are available to ac-
commodate either positive or negative enable polarities.
The parts are available in either 8-lead 3mm × 2mm DFN
or ThinSOT packages.
■ Portable Instrumentation Meters
■ Blade Servers
■ Portable Customer Service PDA
■ Desktop and Notebook Computers
■ Adjustable Push Button On/Off Timers
■ Low Supply Current: 6µA
■ Wide Operating Voltage Range: 2.7V to 26V
■ EN Output (LTC2950-1) Allows DC/DC Converter
Control
■
⎯
E
⎯
N Output (LTC2950-2) Allows Circuit Breaker
Control
■ Simple Interface Allows Graceful µP Shut Down
■ High Input Voltage
⎯
P
⎯
B Pin with Internal Pull Up
Resistor
■ ±10kV ESD HBM on
⎯
P
⎯
B Input
■ Accurate 0.6V Threshold on
⎯
K
⎯
I
⎯
L
⎯
L Comparator Input
■ 8-Pin 3mm × 2mm DFN and ThinSOT
TM
Packages
VIN
SHDN
VIN
VOUT
EN
INT
KILL
INT
KILL
LTC2950-1
ONT OFFT
DC/DC
BUCK
µP/µC
3V – 26V
*OPTIONAL
R1
10k
2950 TA01
CONT*
0.033µF
COFFT*
0.033µF
PB
GND
VIN
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
U
LTC2950-1/LTC2950-2
2
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ABSOLUTE AXI U RATI GS
W
WW
U
ELECTRICAL CHARACTERISTICS
PACKAGE/ORDER I FOR ATIO
UUW
Supply Voltage (VIN) ..................................– 0.3V to 33V
Input Voltages
⎯
P
⎯
B ............................................................– 6V to 33V
ONT ......................................................– 0.3V to 2.7V
OFFT .....................................................– 0.3V to 2.7V
⎯
K
⎯
I
⎯
L
⎯
L .........................................................– 0.3V to 7V
Output Voltages
⎯
I
⎯
⎯
N
⎯
T .........................................................– 0.3V to 10V
EN/
⎯
E
⎯
N ....................................................– 0.3V to 10V
(Note 1)
Operating Temperature Range
LTC2950-C1 .............................................. 0°C to 70°C
LTC2950-C2 .............................................. 0°C to 70°C
LTC2950-I1 .......................................... – 40°C to 85°C
LTC2950-I2 .......................................... – 40°C to 85°C
Storage Temperature Range
DFN Package ..................................... – 65°C to 125°C
TSOT-23 ............................................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
ORDER PART
NUMBER
DDB PART*
MARKING
TJMAX = 125°C, θJA = 165°C/W
EXPOSED PAD (PIN 9) UNCONNECTED
Consult factory for parts specifi ed with wider operating temperature ranges.
* The temperature grade is identifi ed by a label on the shipping container.
LBKP
LBNG
LBKP
LBNG
TJMAX = 125°C, θJA = 140°C/W
ORDER PART
NUMBER
S8 PART*
MARKING
LTBKN
LTBNF
LTBKN
LTBNF
LTC2950CDDB-1
LTC2950CDDB-2
LTC2950IDDB-1
LTC2950IDDB-2
LTC2950CTS8-1
LTC2950CTS8-2
LTC2950ITS8-1
LTC2950ITS8-2
VIN 1
PB 2
ONT 3
GND 4
8 KILL
7 OFFT
6 EN/EN
5 INT
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
TOP VIEW
DDB8 PACKAGE
8-LEAD
(
3mm × 2mm
)
PLASTIC DFN
5
6
7
8
9
4
3
2
1GND
ONT
PB
VIN
INT
EN/EN
OFFT
KILL
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Supply Voltage Range Steady State Operation ● 2.7 26.4 V
IIN V
IN Supply Current System Power On, VIN = 2.7V to 24V ● 6 12 µA
VUVL V
IN Undervoltage Lockout VIN Falling ● 2.2 2.3 2.4 V
VUVL(HYST) V
IN Undervoltage Lockout Hysteresis 50 300 600 mV
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF
Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/
LTC2950-1/LTC2950-2
3
295012fa
The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Push Button Pin (
⎯
P
⎯
B)
V
⎯
P
⎯
B(MIN, MAX)
⎯
P⎯B Voltage Range Single-Ended ●–1 26.4 V
I
⎯
P
⎯
B
⎯
P⎯B Input Current 2.5V < V
⎯
P
⎯
B < 26.4V
V
⎯
P
⎯
B = 1V
V
⎯
P
⎯
B = 0.6V
●
●
●
–1
–3
–6
–9
±1
–12
–15
µA
µA
µA
V
⎯
P
⎯
B(VTH)
⎯
P⎯B Input Threshold
⎯
P
⎯
B Falling ●0.6 0.8 1 V
V
⎯
P
⎯
B(VOC)
⎯
P⎯B Open Circuit Voltage I
⎯
P
⎯
B = –1µA 1 1.6 2 V
Debounce Timing Pins (ONT, OFFT)
IONT, OFFT(PU) ONT/OFFT Pull Up Current VONT, OFFT = 0V ●–2.4 –3 –3.6 µA
IONT, OFFT(PD) ONT/OFFT Pull Down Current VONT, OFFT = 1.3V ●2.4 3 3.6 µA
tDB, On Internal Turn On Debounce Time ONT Pin Float,
⎯
P
⎯
B Falling → Enable Asserted ●26 32 41 ms
tONT Additional Adjustable Turn On Time CONT = 1500pF ●9 11.5 13.5 ms
tDB, Off Internal Turn Off Debounce Time OFFT Pin Float,
⎯
P
⎯
B Falling →
⎯
I
⎯
N
⎯
T Falling ●26 32 41 ms
tOFFT Additional Adjustable Turn Off Time COFFT = 1500pF ●9 11.5 13.5 ms
µP Handshake Pins (
⎯
I
⎯
N
⎯
T,
⎯
K
⎯
I
⎯
L
⎯
L)
I
⎯
I
⎯
N
⎯
T(LKG)
⎯
I
⎯
N
⎯
T Leakage Current V
⎯
⎯
⎯
I
⎯
N
⎯
T = 3V ●±1 µA
V
⎯
I
⎯
N
⎯
T(VOL)
⎯
I
⎯
N
⎯
T Output Voltage Low I
⎯
⎯
⎯
I
⎯
N
⎯
T = 3mA ●0.11 0.4 V
V
⎯
K
⎯
I
⎯
L
⎯
L(TH)
⎯
K
⎯
I
⎯
L
⎯
L Input Threshold Voltage
⎯
K
⎯
I
⎯
L
⎯
L Falling ●0.57 0.6 0.63 V
V
⎯
K
⎯
I
⎯
L
⎯
L(HYST)
⎯
K
⎯
I
⎯
L
⎯
L Input Threshold Hysteresis 10 30 50 mV
I
⎯
K
⎯
I
⎯
L
⎯
L(LKG)
⎯
K
⎯
I
⎯
L
⎯
L Leakage Current V
⎯
K
⎯
I
⎯
L
⎯
L = 0.6V ±0.1 µA
t
⎯
K
⎯
I
⎯
L
⎯
L(PW)
⎯
K
⎯
I
⎯
L
⎯
L Minimum Pulse Width ●30 µs
t
⎯
K
⎯
I
⎯
L
⎯
L(PD)
⎯
K
⎯
I
⎯
L
⎯
L Propagation Delay
⎯
K
⎯
I
⎯
L
⎯
L Falling → Enable Released ●30 µs
t
⎯
K
⎯
I
⎯
L
⎯
L, On Blank
⎯
K
⎯
I
⎯
L
⎯
L Turn On Blanking (Note 3)
⎯
K
⎯
I
⎯
L
⎯
L = Low, Enable Asserted → Enable Released ●400 512 650 ms
t
⎯
K
⎯
I
⎯
L
⎯
L, Off Delay
⎯
K
⎯
I
⎯
L
⎯
L Turn Off Delay (Note 4)
⎯
K
⎯
I
⎯
L
⎯
L = High,
⎯
⎯
I
⎯⎯
⎯
N
⎯⎯
⎯
T Asserted → Enable Released ●800 1024 1300 ms
tEN/
⎯
E
⎯
N, Lock Out EN/
⎯
E
⎯
N Lock Out Time (Note 5) Enable Released → Enable Asserted ●200 256 325 ms
IEN/
⎯
E
⎯
N(LKG) EN/
⎯
E
⎯
N Leakage Current VEN/
⎯
E
⎯
N = 1V, Sink Current Off ●±0.1 µA
VEN/
⎯
E
⎯
N(VOL) EN/
⎯
E
⎯
N Voltage Output Low IEN/
⎯
E
⎯
N = 3mA ●0.11 0.4 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3: The
⎯
K
⎯
I
⎯
L
⎯
L turn on blanking timer period is the waiting period
immediately after the enable output is asserted. This blanking time allows
suffi cient time for the DC/DC converter and the µP to perform power up
tasks. The
⎯
K
⎯
I
⎯
L
⎯
L and
⎯
P
⎯
B inputs are ignored during this period. If
⎯
K
⎯
I
⎯
L
⎯
L
remains low at the end of this time period, the enable output is released,
thus turning off system power. This time delay does not include tDB, ON or
tONT.
Note 4: The
⎯
K
⎯
I
⎯
L
⎯
L turn off delay is the maximum delay from the initiation
of a shutdown sequence (
⎯
I
⎯
N
⎯
T falling), to the release of the enable output.
If the
⎯
K
⎯
I
⎯
L
⎯
L input switches low at any time during this period, enable is
released, thus turning off system power. This time is internally fi xed at
1024ms. This time delay does not include tDB, OFF or tOFFT.
Note 5: The enable lock out time is designed to allow an application to
properly power down such that the next power up sequence starts from a
consistent powered down confi guration.
⎯
P
⎯
B is ignored during this lock out
time. This time delay does not include tDB, ON or tONT.
ELECTRICAL CHARACTERISTICS
LTC2950-1/LTC2950-2
4
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TEMPERATURE (°C)
–50
IVIN (µA)
10
8
6
4
2
0
–25 02550
2950 G01
75 100 0 510 15 20 25 30
TEMPERATURE (°C)
–50 –25 0 25 50 75 100
VIN (V)
IVIN (µA)
10
8
6
4
2
0
2950 G02
2950 G03
ONT PULL-DOWN CURRENT (µA)
1
tDB, ON + tONT (ms)
100
1000
1000
2950 G04
10 10 100
10000
2950 G05
VIN (V)
0
tDB, OFF (ms)
5101520
2950 G06
25 30
2950 G07 2950 G08
VIN = 26.4V
VIN = 3.3V
TA = 25°C
VIN = 3.3V
VIN = 2.7V
TA = 25°C
VIN (V)
0
0
tDB, ON (ms)
10
20
30
40
50
510 15 20 25 30
TA = 25°C
ONT EXTERNAL CAPACITOR (nF)
1
tDB, OFF + tOFFT (ms)
100
1000
1000
10 10 100
10000 TA = 25°C
VIN = 3.3V
OFFT EXTERNAL CAPACITOR (nF)
–3.4
–3.2
–3.0
–2.8
–2.6
VIN = 26.4V
VIN = 2.7V
TEMPERATURE (°C)
–50 –25 0 25 50 75 100
OFFT PULL-DOWN CURRENT (µA)
–3.4
–3.2
–3.0
–2.8
–2.6
VIN = 26.4V
VIN = 2.7V
50
40
30
20
10
0
TA = 25°C
Supply Current vs Temperature
Turn On Debounce Time (tDB, ON +
tONT) vs ONT External Capacitor
Supply Current vs Supply Voltage
ONT Pull-Down Current vs
Temperature
Internal Default Turn Off
Debounce Time (tDB, OFF) vs VIN
Turn Off Debounce Time (tDB, OFF
+ tOFFT) vs OFFT External Capacitor
OFFT Pull-Down Current vs
Temperature
Internal Default Turn On
Debounce Time (tDB, ON) vs VIN
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC2950-1/LTC2950-2
5
295012fa
TYPICAL PERFOR A CE CHARACTERISTICS
UW
EN (V)
PB CURRENT (µA)
2950 G09 2950 G10
EN/EN CURRENT LOAD (mA)
0
EN/EN VOLTAGE (mV)
500
400
300
200
100
08
2950 G11
24610
2950 G13
VIN (V)
–10010
20 30–5 5 15 25
–250
–200
–150
–100
–50
0
PB VOLTAGE (V)
TA = 25°C
VIN = 3.3V
0
0
50
100
150
200
250
300
5101520
VIN = 3.3V
TA = 25°C
PB VOLTAGE (mV)
EXTERNAL PB RESISTANCE TO GROUND (kΩ)
TA = –45°C
TA = 100°C
TA = 25°C
VIN = 3.3V
04
123
4
3
2
1
0
TA = 25°C
100k PULL-UP FROM EN TO VIN
VIN (V)
0
EN (V)
4
2950 G12
123
TA = 25°C
100k PULL-UP FROM EN TO VIN
1.0
0.8
0.6
0.4
0.2
0
⎯
P
⎯
B Current vs
⎯
P
⎯
B Voltage
⎯
P
⎯
B Voltage vs External
⎯
P
⎯
B
Resistance to Ground
EN/
⎯
E
⎯
N VOL vs Current Load
⎯
E
⎯
N (LTC2950-2) Voltage vs VIN
EN (LTC2950-1) Voltage vs VIN
LTC2950-1/LTC2950-2
6
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VIN (Pin 1/Pin 4): Power Supply Input: 2.7V to 26.4V.
⎯
P
⎯
B (Pin 2/Pin 3): Push Button Input. Connecting
⎯
P
⎯
B to
ground through a momentary switch provides on/off
control via the EN/
⎯
E
⎯
N pin. An internal 100k pull-up resis-
tor connects to an internal 1.9V bias voltage. The rugged
⎯
P
⎯
B input can be pulled up to 26.4V externally without
consuming extra current.
ONT (Pin 3/Pin 2): Additional Adjustable Turn On Time
Input. Placing an external capacitor to ground determines
the additional time (beyond the internal default 32ms)
the
⎯
P
⎯
B pin must be held low before the enable output
is asserted. Floating this pin results in a default turn on
debounce time of 32ms.
GND (Pin 4/Pin 1): Device Ground.
⎯
I
⎯
N
⎯
T (Pin 5/Pin 8): Open Drain Interrupt Output. After a push
button turn-off event is detected, the LTC2950 interrupts
the system (µP) by bringing the
⎯
I
⎯
N
⎯
T pin low. Once the
system fi nishes its power down and housekeeping tasks,
it sets
⎯
K
⎯
I
⎯
L
⎯
L low, which in turn releases the enable output.
If at the end of the power down timer (1024ms)
⎯
K
⎯
I
⎯
L
⎯
L is
still high, the enable output is released immediately.
⎯
I
⎯
N
⎯
T
may optionally be tied to
⎯
K
⎯
I
⎯
L
⎯
L to release the enable output
immediately after the turn-off event has been detected
(
⎯
I
⎯
N
⎯
T = low).
EN (LTC2950-1, Pin 6/Pin 7): Open Drain Enable Output.
This pin is intended to enable system power. EN is as-
serted high after a valid
⎯
P
⎯
B turn on event. EN is released
low if: a)
⎯
K
⎯
I
⎯
L
⎯
L is not driven high (by μP) within 512ms of
the initial valid
⎯
P
⎯
B power turn-on event, b)
⎯
K
⎯
I
⎯
L
⎯
L is driven
low during normal operation, c) a second valid
⎯
P
⎯
B event
(power turn-off) is detected. The operating range for this
pin is 0V to 10V.
⎯⎯
E
⎯
N (LTC2950-2, Pin 6/Pin 7): Open Drain Enable Output.
This pin is intended to enable system power.
⎯
E
⎯
N is asserted
low after a valid
⎯
P
⎯
B turn-on event.
⎯
E
⎯
N releases high if:
a)
⎯
K
⎯
I
⎯
L
⎯
L is not driven high (by μP) within 512ms of the
initial valid
⎯
P
⎯
B power turn-on event, b)
⎯
K
⎯
I
⎯
L
⎯
L is driven
low during normal operation, c) a second valid
⎯
P
⎯
B event
(power turn-off) is detected. The operating range of this
pin is 0V to 10V.
OFFT (Pin 7/Pin 6): Additional Adjustable Turn Off Time
Input. A capacitor to ground determines the additional
time (beyond the internal default 32ms) that the
⎯
P
⎯
B pin
must be held low before initiating a power down sequence
(
⎯
I
⎯
N
⎯
T falling). Floating this pin results in a default turn off
time of 32ms.
⎯
K
⎯
I
⎯
L
⎯
L (Pin 8/Pin 5):
⎯
K
⎯
I
⎯
L
⎯
L Input. Forcing
⎯
K
⎯
I
⎯
L
⎯
L low releases
the enable output. During system turn on, this pin is
blanked by a 512ms internal timer to allow the system to
pull
⎯
K
⎯
I
⎯
L
⎯
L high. This pin has an accurate 0.6V threshold
and can be used as a voltage monitor input.
Exposed Pad (Pin 9): Exposed Pad may be left open or
connected to device ground.
(TSOT-23/DFN)
PI FU CTIO S
UUU
LTC2950-1/LTC2950-2
7
295012fa
TI I G DIAGRA S
WUW
KILL
EN/EN
tKILL(PW)
tKILL(PD)
2950 TD01
BLOCK DIAGRA
W
LOGIC
OSCILLATOR
OSCILLATOR
DEBOUNCE
2.4V
2.4V
100k
VIN
2.7V TO 26.4V
PB
GND
EN/EN
KILL
INT
ONT OFFT
0.8V
0.6V
2950 BD
REGULATOR
LTC2950-1/LTC2950-2
8
295012fa
TI I G DIAGRA S
WUW
Power On Timing
Power Off Timing,
⎯
K
⎯
I
⎯
L
⎯
L > 0.6V
tDB, ON tONT
PB
16 CYCLES
PB & KILL IGNORED
EN
(LTC2950-1)
EN
(LTC2950-2)
tKILL, ON BLANK
2950 TD02
tDB, OFF tOFFT
PB
INT
OFFT
PB IGNORED
tKILL, OFF DELAY
2950 TD03
16 CYCLES
EN
(LTC2950-1)
EN
(LTC2950-2)
LTC2950-1/LTC2950-2
9
295012fa
APPLICATIO S I FOR ATIO
WUUU
Description
The LTC2950 is a low power (6µA), wide input voltage
range (2.7V to 26.4V), push button on/off controller that
can interface to a µP and a power supply. The turn-on and
turn-off debounce times are extendable using optional
external capacitors. A simple interface (
⎯
I
⎯
N
⎯
T output,
⎯
K
⎯
I
⎯
L
⎯
L
input) allows a system to power on and power off in a
controlled manner.
Turn On
When power is fi rst applied to the LTC2950, the part ini-
tializes the output pins. Any DC/DC converters connected
to the EN/
⎯
E
⎯
N pin will therefore be held off. To assert the
enable output,
⎯
P
⎯
B must be held low for a minimum of
32ms (tDB, ON). The LTC2950 provides additional turn on
debounce time via an optional capacitor connected to the
ONT pin (tONT). The following equation describes the ad-
ditional time that
⎯
P
⎯
B must be held low before asserting the
enable output. CONT is the ONT external capacitor:
C
ONT = 1.56E-4 [μF/ms] • (tONT – 1ms)
Once the enable output is asserted, any DC/DC converters
connected to this pin are turned on. The
⎯
K
⎯
I
⎯
L
⎯
L input from
the µP is ignored during a succeeding 512ms blanking
time (t
⎯
K
⎯
I
⎯
L
⎯
L, ON BLANK). This blanking time represents the
maximum time required to power up the DC/DC converter
and the µP. If
⎯
K
⎯
I
⎯
L
⎯
L is not brought high during this 512ms
time window, the enable output is released. The assump-
tion is that 512ms is suffi cient time for the system to
power up.
Turn Off
To initiate a power off sequence,
⎯
P
⎯
B must be held low for a
minimum of 32ms (tDB, OFF). Additional turn off debounce
time may be added via an optional capacitor connected to
the OFFT pin (tOFFT). The following equation describes the
additional time that
⎯
P
⎯
B must be held low to initiate a power
off sequence. COFFT is the OFFT external capacitor:
C
OFFT = 1.56E-4 [μF/ms] • (tOFFT – 1ms)
Once
⎯
P
⎯
B has been validly pressed,
⎯
I
⎯
N
⎯
T is switched low. This
alerts the µP to perform its power down and housekeeping
tasks. The power down time given to the µP is 1024ms.
Note that the
⎯
K
⎯
I
⎯
L
⎯
L input can be pulled low (thereby re-
leasing the enable output) at any time after t
⎯
K
⎯
I
⎯
L
⎯
L, ON BLANK
period.
Simplifi ed Power On/Off Sequence
Figure 1 shows a simplifi ed LTC2950-1 power on and power
off sequence. A high to low transition on
⎯
P
⎯
B (t1) initiates
the power on sequence. This diagram does not show any
bounce on
⎯
P
⎯
B. In order to assert the enable output, the
⎯
P
⎯
B pin must stay low continuously (
⎯
P
⎯
B high resets timers)
for a time controlled by the default 32ms and the external
ONT capacitor (t2–t1). Once EN goes high (t2), an internal
512ms blanking timer is started. This blanking timer is
designed to give suffi cient time for the DC/DC converter
to reach its fi nal voltage, and to allow the µP enough time
to perform power on tasks.
The
⎯
K
⎯
I
⎯
L
⎯
L pin must be pulled high within 512ms of the
EN pin going high. Failure to do so results in the EN
pin going low 512ms after it went high. (EN = low, see
Figure 2). Note that the LTC2950 does not sample
⎯
K
⎯
I
⎯
L
⎯
L
and
⎯
P
⎯
B until after the 512ms internal timer has expired.
The reason
⎯
P
⎯
B is ignored is to ensure that the system
is not forced off while powering on. Once the 512ms
timer expires (t4), the release of the
⎯
P
⎯
B pin is then
debounced with an internal 32ms timer. The system has
now properly powered on and the LTC2950 monitors
⎯
P
⎯
B
and
⎯
K
⎯
I
⎯
L
⎯
L (for a turnoff command) while consuming only
6µA of supply current.
A high to low transition on
⎯
P
⎯
B (t5) initiates the power
off sequence.
⎯
P
⎯
B must stay low continuously (
⎯
P
⎯
B high
resets debounce timer) for a period controlled by the
default 32ms and the external OFFT capacitor (t6–t5). At
the completion of the OFFT timing (t6), an interrupt (
⎯
I
⎯
N
⎯
T)
is set, signifying that EN will be switched low in 1024ms.
Once a system has fi nished performing its power down
operations, it can set
⎯
K
⎯
I
⎯
L
⎯
L low (t7) and thus immediately
set EN low), terminating the internal 1024ms timer. The
release of the
⎯
P
⎯
B pin is then debounced with an internal
32ms timer.
The system is now in its reset state: where the LTC2950
is in low power mode (6µA).
⎯
P
⎯
B is monitored for a high
to low transition.
LTC2950-1/LTC2950-2
10
295012fa
APPLICATIO S I FOR ATIO
WUUU
Figure 1. Simplifi ed Power On/Off Sequence for LTC2950-1
Figure 2. Aborted Power On Sequence for LTC2950-1
tABORT
PB
KILL
POWER ON
TIMING
EN
512ms
INTERNAL
TIMER
tDB, ON + tONT
POWER
TURNED OFF
2950 F02
µP FAILED TO SET
KILL HIGH
t1t2
tDB, ON tONT
t3t4t5t6t7
PB
ONT
OFFT
EN
KILL
INT
PB & KILL IGNORED PB IGNORED
2950 F01
tKILL, ON BLANK tDB, OFF
tOFFT
<tKILL, OFF DELAY
< tKILL,
OFF DELAY
LTC2950-1/LTC2950-2
11
295012fa
APPLICATIO S I FOR ATIO
WUUU
LTC2950-1, LTC2950-2 VERSIONS
The LTC2950-1 (high true EN) and LTC2950-2 (low true
⎯
E
⎯
N) differ only by the polarity of the EN/
⎯
E
⎯
N pin. Both ver-
sions allow the user to extend the amount of time that
the
⎯
P
⎯
B must be held low in order to begin a valid power
on/off sequence. An external capacitor placed on the ONT
pin adds additional time to the turn on time. An external
capacitor placed on the OFFT pin adds additional time
to the turn off time. If no capacitor is placed on the ONT
(OFFT) pin, then the turn on (off) duration is given by an
internally fi xed 32ms timer.
The LTC2950 fi xes the
⎯
K
⎯
I
⎯
L
⎯
L turn off delay time (t
⎯
K
⎯
I
⎯
L
⎯
L, OFF
DELAY) at 1024ms. This means that the EN/
⎯
E
⎯
N pin will be
switched low/high a maximum of 1024ms after initiating
a valid turn off sequence. Note that in a typical application,
a µP or µC would set
⎯
K
⎯
I
⎯
L
⎯
L low prior to the 1024ms timer
period (t7 in Figure 1).
The following equations describe the turn on and turn
off times. CONT and COFFT are the external programming
capacitors:
t
BD,ON + tONT = 32ms + 1ms + (6.7x106) • CONT
t
BD,OFF + tOFFT = 32ms + 1ms + (6.7x106) • COFFT
Figure 3. µP Turns Off Power (LTC2950-1)
tKILL
PB
EN
DC/DC
TURNS OFF
2950 F03
KILL XXX DON’T CARE
µP SETS
KILL LOW
PB PB IGNORED
EN
KILL
PB BLANKING
XXX DON’T CARE
256ms
POWER ON
2950 F04
DC/DC
TURNS OFF
µP SETS
KILL LOW
tEN/EN, LOCKOUT
Figure 4. DC/DC Turn Off Blanking (LTC2950-1)
Aborted Power On Sequence
The power on sequence is aborted when the
⎯
K
⎯
I
⎯
L
⎯
L remains
low after the end of the 512ms blanking time. Figure 2 is
a simplifi ed version of an aborted power on sequence.
At time tABORT, since
⎯
K
⎯
I
⎯
L
⎯
L is still low, EN pulls low (thus
turning off the DC/DC converter).
µP Turns Off Power During Normal Operation
Once the system has powered on and is operating nor-
mally, the µP can turn off power by setting
⎯
K
⎯
I
⎯
L
⎯
L low, as
shown in Figure 3. At time t
⎯
K
⎯
I
⎯
L
⎯
L,
⎯
K
⎯
I
⎯
L
⎯
L is set low by the
µP. This immediately pulls EN low, thus turning off the
DC/DC converter.
DC/DC Turn Off Blanking
When the DC/DC converter is turned off, it can take a sig-
nifi cant amount of time for its output to decay to ground. It
is desirable to wait until the output of the DC/DC converter
is near ground before allowing the user (via
⎯
P
⎯
B) to restart
the converter. This condition guarantees that the µP has
always powered down completely before it is restarted.
Figure 4 shows the µP turning power off. After a low on
⎯
K
⎯
I
⎯
L
⎯
L releases enable, the internal 256ms timer ignores the
⎯
P
⎯
B pin. This is shown as tEN/
⎯
E
⎯
N, LOCKOUT in Figure 4.
LTC2950-1/LTC2950-2
12
295012fa
High Voltage Pins
The VIN and
⎯
P
⎯
B pins can operate at voltages up to 26.4V.
⎯
P
⎯
B can, additionally, operate below ground (–6V) without
latching up the device.
⎯
P
⎯
B has an ESD HBM rating of ±10kV.
If the push button switch connected to
⎯
P
⎯
B exhibits high
leakage current, then an external pull-up resistor to VIN is
recommended. Furthermore, if the push button switch is
physically located far from the LTC2950
⎯
P
⎯
B pin, parasitic
capacitances may couple onto the high impedance
⎯
P
⎯
B
input. Additionally, parasitic series inductance may cause
unpredictable ringing at the
⎯
P
⎯
B pin. Placing a 5k resistor
from the
⎯
P
⎯
B pin to the push button switch would mitigate
parasitic inductance problems. Placing a 0.1µF capacitor
on the
⎯
P
⎯
B pin would lessen the impact of parasitic capaci-
tive coupling.
APPLICATIO S I FOR ATIO
WUUU
TYPICAL APPLICATIO S
U
Voltage Monitoring with
⎯
K
⎯
I
⎯
L
⎯
L Input
The
⎯
K
⎯
I
⎯
L
⎯
L pin can be used as a voltage monitor. Figure
5 shows an application where the
⎯
K
⎯
I
⎯
L
⎯
L pin has a dual
function. It is driven by a low leakage open drain output
of the µP. It is also connected to a resistor divider that
monitors battery voltage (VIN). When the battery voltage
falls below the set value, the voltage at the
⎯
K
⎯
I
⎯
L
⎯
L pin falls
below 0.6V and the EN pin is quickly pulled low. Note that
the resistor values should be as large as possible, but
small enough to keep leakage currents from tripping the
0.6V
⎯
K
⎯
I
⎯
L
⎯
L comparator.
The DC/DC converter shown has an internal pull-up cur-
rent on its
⎯
S
⎯
H
⎯
D
⎯
N pin. A pull-up resistor on EN is thus not
needed.
Operation Without µP
Figure 6 shows how to connect the
⎯
K
⎯
I
⎯
L
⎯
L pin when there
is no circuitry available to drive it. The minimum pulse
width detected is 30µs. If there are glitches on the resis-
tor pull-up voltage that are wider than 30µs and transition
below 0.6V, then an appropriate bypass capacitor should
be connected to the
⎯
K
⎯
I
⎯
L
⎯
L pin.
Figure 5. Input Voltage Monitoring with
⎯
K
⎯
I
⎯
L
⎯
L Input Figure 6. No µP Application
PB
VIN
SHDN
VIN
VOUT
EN
INT
KILL
INT
KILL
(OPEN DRAIN)
LTC2950-1
GND ONT OFFT
LT1767-3.3
µP
9V
R1
10k
3.3V
2950 F05
C4
0.1µF
R3
806k
1%
R2
100k
1%
5.4V THRESHOLD
*OPTIONAL
VIN
CONT*
0.033µF
COFFT*
0.033µF
VIN
SHDN
VIN
VOUT
LT1767-3.3
9V 3.3V
R1
100k
C3*
0.01µF
2950 F06
+
C4
0.1µF
*OPTIONAL
PB
EN
INT
KILL
LTC2950-1
GND ONT OFFT
VIN
CONT*
0.033µF
COFFT*
0.033µF
LTC2950-1/LTC2950-2
13
295012fa
TYPICAL APPLICATIO S
U
Power Path Switching
The
⎯
E
⎯
N open drain output of the LTC2950-2 is designed to
switch on/off an external power PFET. This allows a user
to connect/disconnect a power supply (or battery) to its
load by toggling the
⎯
P
⎯
B pin. Figure 7 shows the LTC2950-2
controlling a two cell Li-Ion battery application. The
⎯
I
⎯
N
⎯
T
and
⎯
K
⎯
I
⎯
L
⎯
L pins are connected to the output of the PFET
through a resistor divider. The
⎯
K
⎯
I
⎯
L
⎯
L pin serves as a voltage
monitor. When VOUT drops below 6V, the
⎯
E
⎯
N pin is open
circuited 30µs later.
VOUT
R1
909k
1%
R4
100k
1%
C3*
0.1µF
2950 F07
C4
0.1µF
CERAMIC
*OPTIONAL
OPEN DRAIN OUTPUT
VTH = 0.6V INPUT
R5
100K
M1
+
4.2V
SINGLE CELL
Li-Ion BATTERY
+
4.2V
SINGLE CELL
Li-Ion BATTERY
OPTIONAL GLITCH
FILTER CAPACITOR
VOUT,TRIP POINT = 6V
PB
EN
INT
KILL
LTC2950-2
GND ONT OFFT
VIN
CONT*
0.033µF
COFFT*
0.033µF
PB
VIN
LTC2950-1
GND ONT
R6
5k
2950 F08
TRACE
CAPACITANCE
PARASITICS
C5
0.1µF
DETAILS OMITTED
FOR CLARITY
TRACE
INDUCTANCE
NOISE
EN
INT
KILL
OFFT
VIN
Figure 7. Power Path Control with 6V Under Voltage Detect
Figure 8. Noisy
⎯
P
⎯
B Trace
⎯
P
⎯
B Pin in a Noisy Environment
The rugged
⎯
P
⎯
B pin is designed to operate in noisy envi-
ronments. Transients below ground (>–6V) and above VIN
(<30V) will not damage the rugged
⎯
P
⎯
B pin. Additionally,
the
⎯
P
⎯
B pin can withstand ESD HBM strikes up to ±10kV.
In order to keep external noise from coupling inside the
LTC2950, place an R-C network close to the
⎯
P
⎯
B pin. A
5k resistor and a 0.1µF capacitor should suffi ce for most
noisy applications (see Figure 8).
LTC2950-1/LTC2950-2
14
295012fa
External Pull-Up Resistor on
⎯
P
⎯
B
An internal pull-up resistor on the
⎯
P
⎯
B pin makes an ex-
ternal pull-up resistor unnecessary. Leakage current on
the
⎯
P
⎯
B board trace, however, will affect the open circuit
voltage on the
⎯
P
⎯
B pin. If the leakage is too large (>2µA),
the
⎯
P
⎯
B voltage may fall close to the threshold window.
To mitigate the effect of the board leakage, a 10k resistor
to VIN is recommended (see Figure 9).
TYPICAL APPLICATIO S
U
PB
VIN
LTC2950-1/
LTC2950-2
GND
EXTERNAL BOARD
LEAKAGE CURRENT
100k
2.4V
R7
10k
2950 F09
>2µA
PINS OMITTED
FOR CLARITY
IF EXTERNAL PARASITIC BOARD
LEAKAGE >2µA, USE EXTERNAL
PULL-UP RESISTOR
VIN
Figure 9. External Pull-Up Resistor on
⎯
P
⎯
B Pin
Reverse Battery Protection
To protect the LTC2950 from a reverse battery connec-
tion, place a 1k resistor in series with the VIN pin (see
Figure 10).
LTC2950-1/LTC2950-2
15
295012fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
S8 Package
8-Lead Plastic Small Outline
(Reference LTC DWG # 05-08-1637)
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.15 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
14
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB8) DFN 0905 REV B
0.25 ± 0.05
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
0.50 BSC
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.22 – 0.36
8 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) TS8 TSOT-23 0802
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.52
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
LTC2950-1/LTC2950-2
16
295012fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
LT/LWI 0706 REV A • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
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R
⎯
E
⎯
S
⎯
E
⎯
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VIN
SHDN
VOUT
INT
KILL
LT1761-1.8
R1
10k
R8
1k
R5
910k
2950 F10
C4
0.1µF
+
µP
1.8V
9V
BATTERY
PB
EN
INT
KILL
LTC2950-1
GND ONT OFFT
CONT*
0.033µF
VIN
COFFT*
0.033µF
*OPTIONAL
Figure 10. Reverse Battery Protection
TYPICAL APPLICATIO
U
