www.latticesemi.com
3-1
DS1033_01.0
February 2005 Data Sheet DS1033
© 2005 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other
brand or product names are trademarks or registered trademarks of their respective holders . The specifications and information herein are subject to change without
notice.
Features
■
Monitor and Control Multiple Power
Supplies
• Simultaneously monitors up to 12 po w er supplies
• Sequence controller for power-up conditions
• Provides eight output control signals
• Programmable digital and analog circuitry
■
Precision Analog Comparators for
Monitoring
• 12 analog comparators for monitoring
• 384 programmable threshold levels spanning
0.68V to 5.93V
• 0.5% precision
• Other user-defined voltages possible
• 80mV near-ground threshold for power-off
detect
• Each comparator independently configurable
• Eight direct comparator outputs
• Digital filter on comparator outputs
■
Embedded PLD for Sequence Control
• Implements state machine and input conditional
events
• In-System Programmable (ISP™) through JTAG
and on-chip E
2
CMOS
®
• Input synchronizers
■
Embedded Programmable Timers
• 4 Programmable 8-bit timers (32µs to 524ms)
• Programmable time delay between multiple
power supply ramp-up and wait statements
■
Embedded Oscillator
• Built-in clock generator, 1MHz
• Programmable clock frequency
• Programmable timer pre-scaler
• External clock support
■
Programmable Output Configurations
• Four digital outputs for logic and power supply
control
• Four fully programmable gate driver outputs for
FET control, or programmable as four additional
digital outputs
• Expandable with ispMACH™ 4000 CPLD
■
2.7V to 5.5V Supply Range
• In-system programmable at 3.0V to 5.5V
• Industrial temperature range: -40°C to +85°C
• 44-pin TQFP package
Application Block Diagram
Description
The Lattice ispPAC-POWR1208P1 incorporates both in-
system programmable logic and in-system programma-
ble analog circuits to perform special functions for
power supply sequencing and monitoring. The ispPAC-
POWR1208P1 device has the capability to be config-
ured through software to control up to eight outputs for
power supply sequencing and 12 comparators monitor-
ing supply voltage limits , along with four digital inputs for
interfacing to other control circuits or digital logic. Once
configured, the design is downloaded into the device
through a standard JTAG interface. The circuit configu-
ration and routing are stored in non-volatile E
2
CMOS.
PAC-Designer,
®
an easy-to-use Windows-compatible
software package gives users the ability to design and
simulate logic and sequences that control the power
supplies or FET driver circuits. The user has control
over timing functions, programmable logic functions and
comparator threshold values as well as I/O configura-
tions.
Primary +
Gnd
+
-
+5V
+3.3V
+2.5V
+1.0V +1V
ispPAC-POWR1208P1
Power Sequence
Controller
HVOUT1
0.1uF10uF
HVOUT2
HVOUT3
HVOUT4
OUT5
OUT6
OUT7
OUT8
DC/DC Supply
or Regulator
OE/EN
Digital
Logic
EN
Circuits
RESET
Comp2
Comp4
VMON12
12 Analog Inputs
IN1
IN2
VDD
IN3
IN4
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
VMON7
VMON8
VMON9
VMON10
VMON11
CLK
Comp3
Comp1
Comp6
Comp8
Comp7
Comp5
+2.5V
Circuits
+3.3V
Circuits
+5V
Circuits
OE/EN
Digital
Logic
EN
Primary +
Gnd
+
-
Primary +
Gnd
+
-
DC/DC
Supply
Primary +
Gnd
+
-
DC/DC Supply
or Regulator
POR
DC/DC
Supply
DC/DC
Supply
DC/DC
RG
Supply
VDD VDDINP
0.1uF
CREF
3.3V
3.3V
RG
RG
RG
ispPAC-POWR1208P1
In-System Programmable Power Supply
Sequencing Controller and Precision Monitor
®
ALL DEVICES
DISCONTINUED
USE ispPAC-POWR1014/A
FOR NEW DESIGNS