TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 D High Resolution, 1/3-in Solid-State Image D D D D D D D D D Sensor for NTSC Black and White Applications 340,000 Pixels per Field Frame Memory 658 (H) x 496 (V) Active Elements in Image Sensing Area Compatible With Electronic Centering Multimode Readout Capability - Progressive Scan - Interlaced Scan - Dual-Line Readout - Image Area Line Summing - Smear Subtraction Fast Single-Pulse Clear Capability Continuous Electronic Exposure Control From 1/60 - 1/50,000 s 7.4-m Square Pixels Advanced Lateral Overflow Drain Antiblooming Low Dark Current DUAL-IN-LINE PACKAGE (TOP VIEW) D D D D D ODB 1 12 IAG1 IAG2 2 11 SAG SUB 3 10 SAG ADB 4 9 SUB OUT1 5 8 SRG OUT2 6 7 RST High Photoresponse Uniformity High Dynamic Range High Sensitivity High Blue Response Solid-State Reliability With No Image Burn-In, Residual Imaging, Image Distortion, Image Lag, or Microphonics description The TC237B is a frame-transfer, charge-coupled device (CCD) image sensor designed for use in single-chip black and white National Television Standards Committee (NTSC) TV, computer, and special-purpose applications that require low cost and small size. The image-sensing area of the TC237B device is configured into 500 lines with 680 elements in each line. Twenty-two elements are provided in each line for dark reference. The antiblooming feature of the sensor is based on an advanced lateral overflow drain concept. The sensor can be operated in a true interlace mode as a 658(H) x 496(V) sensor with a low dark current. An important feature of the TC237B high-resolution sensor is the ability to capture a full 340,000 pixels per field. The image sensor also provides high-speed image transfer capability and a continuous electronic exposure control without the loss of sensitivity and resolution inherent in other technologies. Charge voltage is converted to signal voltage at 13 V per electron by a high-performance structure with a reset and a voltage-reference generator. The signal is further buffered by a low-noise, two-stage, source-follower amplifier to provide high-output drive capability. The TC237B sensor is built using TI-proprietary advanced virtual-phase (AVP) technology, which provides devices with high blue response, low dark current, high photoresponse uniformity, and single-phase clocking. The TC237B sensor is characterized for operation from - 10C to 45C. This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TI is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 functional block diagram SUB ODB IAG2 3 1 Image Area With Blooming Protection 12 Dark Reference Elements 11 2 Storage Area ADB OUT2 IAG1 4 10 9 Amplifiers 6 8 SAG SAG SUB SRG 4 Dummy Elements OUT1 5 7 Clearing Drain sensor topology diagram 22 Dark-Reference Pixels 658 Active Pixels Two-Phase Image-Sensing Area 496 Lines 4 Dark Lines 500 Lines 4 22 658 Active Pixels Optical Black (OPB) Dummy Pixels 4 2 Single-Phase Storage Area 22 658 Active Pixels POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 RST TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION ADB 4 I Supply voltage for amplifier drain bias IAG1 12 I Image area gate 1 IAG2 2 I Image area gate 2 ODB 1 I Supply voltage for drain antiblooming bias OUT1 5 O Output signal 1 OUT2 6 O Output signal 2 RST 7 I Reset gate SAG 10, 11 I Storage area gate SRG 8 I Serial register gate SUB 3, 9 Substrate detailed description The TC237B CCD image sensor consists of four basic functional blocks: the image-sensing area, the image storage area, the serial register gates, and the low-noise signal processing amplifier block with charge detection nodes and independent resets. The location of each of these blocks is identified in the functional block diagram. image-sensing and image storage areas Figure 1 and Figure 2 show cross sections with potential well diagrams and top views of the image-sensing and storage area elements. As light enters the silicon in the image-sensing area, electrons are generated and collected in the wells of the sensing elements. Blooming protection is provided by applying a dc bias to the overflow drain bias pin. To clear the image before beginning a new integration time (for implementation of electronic fixed shutter or electronic auto-iris), apply a pulse of at least 1 s to the overflow drain bias. After integration is complete, charge voltage is transferred into the storage area. The transfer timing depends on whether the readout mode is interlace or progressive scan. If the progressive-scan readout mode is selected, the readout may be performed by using one serial register or at high speed by using both serial registers (see Figure 3 through Figure 5). A line-summing operation, which is useful in off-chip smear subtraction, can be implemented before the parallel transfer (see Figure 6). Twenty-two columns at the left edge of the image-sensing area are shielded from incident light; these elements provide the dark reference used in subsequent video-processing circuits to restore the video black level. In addition, four dark lines between the image-sensing and the image storage area prevent charge leakage from the image-sensing area into the image storage area. advanced lateral overflow drain The advanced lateral overflow drain structure is shared by two neighboring pixels and provides several unique features in the sensor. By varying the dc bias of the drain pin, you can control the blooming protection level and trade it for the well capacity. To clear charge voltages in the image area, apply a 10-V pulse for a minimum duration of 1 s above the nominal dc bias level. This feature permits a precise control of the integration time on a frame-by-frame basis. The single-pulse clear capability also reduces smear by eliminating accumulated charge from the pixels before the start of the integration (single-sided smear). Application of a negative 1-V pulse to the ODB signal during the parallel transfer is recommended to prevent slight column-to-column pixel well capacity variations in some artifacts. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 7.4 m Clocked Barrier 3.8 m Clocked Well Virtual Barrier 3.6 m Antiblooming Device Virtual Well Channel Stops Including Metal Bus Lines Clocked Gate 1.6 m 1.6 m Figure 1. Image-Area Pixel Structure 7.4 m Clocked Barrier 3.5 m Clocked Well Virtual Barrier 3.5 m Virtual Well Channel Stops Including Metal Bus Lines Clocked Gate 1.6 m 1.6 m Figure 2. Storage-Area Pixel Structure 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 Clear Integrate Transfer to Memory Readout 1 s Minimum ODB IAG1, 2 250 Cycles SAG 684 Pulses SRG 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG Figure 3. Interlace Timing The number of parallel-transfer pulses is field dependent. Field 1 has 500 pulses of IAG1, IAG2, SAG, and SRG with appropriate phasing. Field 2 has 501 pulses. The readout is from register 2. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 Clear Integrate Transfer to Memory Readout 1 s Minimum ODB 500 Pulses IAG1, 2 500 Pulses 500 Cycles SAG 500 Pulses 684 Pulses SRG 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG The readout is from register 2. Figure 4. Progressive-Scan Timing With Single Register Readout 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 Clear Integrate Transfer to Memory Readout 1 s Minimum ODB 500 Pulses IAG1, 2 250 Cycles 500 Pulses SAG 684 Pulses 500 Pulses SRG 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG Figure 5. Progressive-Scan Timing With Dual-Register Readout POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 Clear Integrate Line Sum Transfer to Memory Readout 1 s Minimum ODB IAG1 IAG2 250 Cycles SAG 684 Pulses SRG 684 Pulses RST Expanded Section of Parallel Transfer IAG1, 2 SAG SRG Figure 6. Line-Summing Timing This pulse occurs only during field 1. This pulse occurs only during field 2. While readout is from register 2, register 1 can be read out for off-chip smear subtraction. The number of parallel transfer pulses if field dependent. Field 1 has 500 pulses, and field 2 has 501 pulses. 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 serial registers The storage area gate and serial gate(s) are used to transfer charge line-by-line from the storage area into the serial register(s). Depending on the readout mode, one or both serial registers are used. If both are used, the registers are read out in parallel. readout and video processing After transfer into the serial register(s), the pixels are clocked out and sensed by a charge detection node. The node must be reset to a reference level before the next pixel is placed onto it. The timing for the serial-register readout, which includes the external pixel clamp and sample-and-hold signals needed to implement correlated double sampling, is shown in Figure 7. As charge is transferred onto the detection node, the potential of the node changes in proportion to the amount of the charge received. The change is sensed by an MOS transistor; after proper buffering, the signal is supplied to the output terminal of the image sensor. Figure 8 shows the circuit diagram of the charge detection node and output amplifier. The detection nodes and amplifiers are placed a short distance from the edge of the storage area; therefore, each serial register contains 4 dummy elements that are used to span the distance between the serial registers and the amplifiers. SRG RST OUT S/H PCMP Figure 7. Serial Readout and Video-Processing Timing VREF QR ADB Q1 Q2 Reset CCD Channel VOUT Figure 8. Output Amplifier and Charge Detection Node POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, ADB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 15 V Supply voltage range, ODB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SUB to SUB + 21 V Input voltage range, VI: IAG1, IAG2, SAG, SRG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 15 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 10C to 45C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 30C to 85C Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 10C to 55C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to SUB. recommended operating conditions ADB Supply voltage, voltage VCC ODB MIN NOM 21 22 23 For antiblooming control 15.5 16 16.5 For clearing 25.5 26 26.5 For transfer 14.5 15 15.5 Substrate bias voltage 10 High level IAG1 IAG2 IAG1, SAG Clock frequency, fclock Load capacitance 11.5 12 11.5 12 V 12.5 V 12.5 0 12.5 SAG 12.5 SRG, RST 12.5 OUT1, OUT2 - 10 * DALLAS, TEXAS 75265 V 12.5 0 IAG1, IAG2 POST OFFICE BOX 655303 UNIT 0 Low level Operating free-air temperature, TA 10 12 Low level High level SRG RST SRG, 11.5 Low level High level Input voltage, voltage VI MAX MHz 6 pF 45 C TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER Dynamic range (see Note 2) MIN TYP With CDS 64 Without CDS 58 Charge conversion factor MAX 59 0.9999 Signal response delay time, (see Note 4) 0.99995 1 12.5 Gamma (see Note 5) dB V/e 13 Charge transfer efficiency (see Note 3) UNIT ns 1 Output resistance Amplifier noise equivalent signal Rejection ratio 300 400 500 With CDS 15 18 21 Without CDS 30 36 42 ADB (see Note 6) 20 SRG (see Note 7) 45 ODB (see Note 8) 25 Supply current 5 IAG1, IAG2 Input capacitance, capacitance Ci electrons dB 10 mA 2000 SRG 70 RST 10 pF SAG 4000 All typical values are at TA = 25C. CDS = Correlated double sampling, a signal-processing technique that improves noise performance by subtraction of reset noise. Performance depends on the particular implementation of the CDS technique and on the selected filter bandwidth that precedes sampling. NOTES: 2. Dynamic range is - 20 times the logarithm of the mean-noise signal divided by the saturation output signal. 3. Charge transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using an electrical input signal. 4. Signal response delay time is the time between the falling edge of the SRG pulse and the output signal valid state. 5. Gamma () is the value of the exponent in the equation below for two points on the linear portion of the transfer function curve (this value represents points near saturation). g Exposure (2) Output signal (2) + Output signal (1) Exposure (1) 6. ADB rejection ratio is - 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ADB. 7. SRG rejection ratio is - 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at SRG. 8. ODB rejection ratio is - 20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ODB. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 optical characteristics, TA = 40C (unless otherwise noted) PARAMETER MIN No IR filter Sensitivity (see Note 9) TYP MAX UNIT 256 With IR filter mV/lux 32 Saturation signal, Vsat (see Note 10) Antiblooming disabled Maximum usable signal, Vuse Antiblooming enabled TA =45C TA =45C 320 mV 120 mV Blooming overload ratio (see Note 11) 500 Image area well capacity 22K 30K 38K electrons dB nA/cm2 Smear (see Note 12) See Note 13 - 78 Dark current TA = 21C TA = 45C 0.05 1 mV TA = 45C TA = 45C 0.5 mV 0.5 mV TA = 45C TA = 45C 10 mV Dark signal Dark-signal uniformity Dark-signal shading Dark Spurious nonuniformity Illuminated, F#8 Column uniformity Electronic shutter capability 1/50,000 1/60 15 % 0.5 mV s NOTES: 9. Theoretical value 10. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal. 11. Blooming is the condition in which charge is induced in an element by light incident on another element. Blooming-overload ratio is the ratio of blooming exposure to saturation exposure. 12. Smear is a measure of the error introduced by transferring charge through an illuminated pixel in shutterless operation. It is equivalent to the ratio of the single-pixel transfer time to the exposure time using an illuminated section that is 1/10 of the image-area vertical height with recommended clock frequencies. 13. The exposure time is 16.67 ms, the fast-dump clocking rate during vertical transfer is 12.5 MHz, and the illuminated section is 1/10 the height of the image section. TYPICAL CHARACTERISTICS TC237B Spectral Responsivity 16.6 ms T-int (diagonal lines represent QE) 0.4 60% 40% 0.2 DATA 20% Responsivity [A/W] 0 400 500 600 700 800 900 1000 1100 Wavelength [nm] Figure 9. Spectral Characteristics of the TC237B CCD Sensor 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 APPLICATION INFORMATION +2 V TC237 560 10 k 4.7 RST_CLK CCD_SRG 0.1 F SRG_CLK A1 A2 A3 A4 G 2.2 k Y1 Y2 Y3 Y4 IAG1 ODB SAG IAG2 SAG SUB SUB ADB SRG OUT 1 RST OUT 2 0.1 F 4.7 10 10 +12 V CCD_OUT1 CCD_OUT2 74ACT240NS 560 -10 v 10 k +5 V +2 V 560 3.9 k 10 k HN1A01F 1.2 k CCD_RST 0.1 F 2.2 k 0.1 F 4.7 +2 V 10 10 EL7202C CCD_IAG 1 CCD_IAG2 1.8 k 1.8 k NC NC OUTA INA V+ GND OUTB INB 560 -10 10 k HN1A01F E1 E2 B1 B2 C1 C2 v 1.8 k 2.7 k 1.8 k 2 k CCD_ODB HN1A01F 10 1.5 k E1 E2 B1 B2 C1 C2 5.2 k SAG_CLK 3.3 k EL7202C 3.3 k CCD_SAG NC 1.8 k NC OUTA INA ODB Driver V+ GND OUTB INB NOTES: IAG2_CLK -10 V +15 V ODB_CLK IAG1_CLK E1 E2 B1 B2 C1 C2 4.7 Serial Driver 1.8 k Parallel Driver A. Support circuits DEVICE APPLICATION FUNCTION EL7202C 74ACT240NS Parallel driver Serial pre-driver Driver for IAG1, IAG2,SAG Driver for SRG, RST B. Clock, DC voltages Clock SRG_CLK, RST_CLK, ODB_CLK, IAG1_CLK, IAG2_CLK, SAG_CLK DC +15 V, +12 V, +5 V, +2 V, 0 V, (Ground), -10 V TTL level Figure 10. Typical Application Circuit Diagram POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TC237B 680- x 500-PIXEL CCD IMAGE SENSOR SOCS063 - APRIL 2001 MECHANICAL DATA The package for the TC237B consists of a ceramic base, a glass window, and a 12-lead frame. The glass window is sealed to the package by an epoxy adhesive. The package leads are configured in a dual-in-line organization and fit into mounting holes with 1,78 mm center-to-center spacings. TC237 (12 pin) Index Mark 4,45 4,15 Optical Center Package Center 5,94 5,64 IIIIII IIIIII IIIIII IIIIII IIIIII IIIIII 12,40 12,00 11,85 10,75 11,50 11,10 11,05 10,95 1,78 0,76 II II II II II II II 1,91 1,65 0,51 0,41 3,65 3,35 3,30 2,80 Focus Plane 2,08 1,48 0,33 0,17 4,00 3,40 11,68 11,18 ALL LINEAR DIMENSIONS ARE IN MILLIMETERS 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11/00 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. 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