SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 @ EPIC (Enhanced-Performance Implanted SN54LV138A ... JOR W PACKAGE CMOS) Process SN74LV138A . .. D, DB, DGV, NS, OR PW PACKAGE . (TOP VIEW) @ Typical Vo_p (Output Ground Bounce) Oo < 0.8 V at Vcc: Ta = 25C A 1 16 I] Vec Typical Voyy (Output Voy Undershoot) Bfj2 15[] YO > 2 Vat Vcc, Ta = 25C cfJs3 14[] Y1 @ Latch-Up Performance Exceeds 250 mA Per Gea []4 13f] Y2 JESD 17 G2B [5 12[] Y3 ESD Protection Exceeds 2000 V Per at [Js nf} v4 MIL-STD-883, Method 3015; Exceeds 200 V v7 7 = tof Y5 Using Machine Model (C = 200 pF, R = 0) GND [Js s fl Ye Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline SN54LV138A ... FK PACKAGE (DB), Thin Very Small-Outline (DGV), and (TOP VIEW) Thin Shrink Small-Outline (PW) Packages, Oo Bo Ceramic Flat (W) Packages, Chip Carriers aoat2>> (FK), and DIPs (J) 32 1 2019 _Cii4 i8[] Y1 description G2A [] 5 17] Y2 The LV138A devices are 3-line to 8-line NCHS tel] NC G2B [] 7 15[] Y3 decoders/demultiplexers designed for 2-V to aifls 1a] v4 5.5-V Vcc operation. 4112 13 These devices are designed for high- KOOo HW performance memory-decoding or data-routing = 6 27 7 applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. NC No internal connection The conditions at the binary-select inputs (A, B, C) and the three enable inputs (G1, G2A, G2B) select one of eight output lines. The two active-low (G2A, G2B) and one active-high (G1) enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The SN54LV 138A is characterized for operation over the full military temperature range of -55C to 125C. The SN74LV138A is characterized for operation from 40C to 85C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. UNLESS OTHERWISE NOTED this document contains PRODUCTION Copyright 1998, Texas Instruments Incorporated DATA information current as of publication date. Products conform to 73 specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all EXAS paaneer INSTRUMENTS POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 G1 G2A G2B FUNCTION TABLE ENABLE INPUTS SELECT INPUTS OUTPUTS G1 G2A G2B c B A Yo Y1 Y2 Y3 y4 5 Y6 Y7 x H x x x x H H H H H H H H x x H x x x H H H H H H H H L x x x x x H H H H H H H H H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L L H L L H H H H L H H H H L L H L H H H H H H L H H H L L H H L H H H H H H L H H L L H H H H H H H H H H L logic symbols (alternatives)t BIN/OCT 15 1 DMUX 15 1 o p- Yo A 0 0 14 0 14 1_-->___ 1 B Gz 1 13 13 4 2_R__ y2 2 2 gh __* 3 3 " & 11 & 11 ao 4 &- va G1 4 10 10 4S EN 5 f&-_ v5 G2A N 5 9 5 N 9 4 6 &__ Y6 G2B 6 7 7 7>- Y7 7 t These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. Yo Y1 Y2 Y3 v4 5 Y6 Y7 wy TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS, TEXAS 75265SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 logic diagram (positive logic) a~N A Select B Inputs Cc S Data Outputs G1 Enable Inputs G2A - G2B Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)t Supply voltage range, Voo .. 6 een ene tee tenet eee ees -O0O5Vto7V Input voltage range, V; (see Note 1) 6... ete tenes -O0O5Vto7V Output voltage range, Vo (see Notes 1 and 2) ................ 0.020. 0.5 VtoVec +05V Input clamp current, I|K (Vj <0) 20... eee 20 mA Output clamp current, lox (Vo <OOr VQO>Voc) 6... eet +50 mA Continuous output current, lo (Vo =O0t0 Voc) 1.66 eee +25 mA Continuous current through Voc or GND ....... 2... eee +50 mA Package thermal impedance, 8) (see Note 3): D package ............ 0... c cece eee 113C/W DB package ............ cee cece eee eee 131C/W DGV package ........... cece eee 180C/W NS package ....... 0... cece eee 111C/AW PW package ........... cee cece eee 149C/W Storage temperature range, Tgig .-.---- 2-00 eee eee ees 65C to 150C Tt Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 7 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. Wi TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 recommended operating conditions (see Note 4) SN54LV138A SN74LV138A UNIT MIN MAX MIN MAX Voc Supply voltage 2 5.5 2 5.5 Vv Voc=2V 1.5 1.5 Voc=23sVt027V Voc x0.7 Voc x 0.7 VIH High-level input voltage ce cc cc Vv Veoc=3Vto36V Voc x0.7 Voc x 0.7 Voc =45Vto5.5V Voc x0.7 Voc x 0.7 Vec=2V 0.5 0.5 . Voc =238Vt027V Voc x0.3 Voc x 0.3 VIL Low-level input voltage Vv Voc=3Vto36V Voc x0.3 Voc x 0.3 Voc =45Vto5.5V Voc x0.3 V| Input voltage 0 5.5 Vv Vo Output voltage Vcec Vv Vec=2V 50 HA . Voc =238Vt027V -2 IOH High-level output current Voc=3Vto36V -6 mA Voc =45Vto55V -12 Vec=2V 50 HA Voc=23sVt027V 2 2 lot Low-level output current Voc=3Vto36V 6 6 mA Voc =45Vto55V 12 12 Voc =238Vt027V 0 200 0 200 Atv/Av _ Input transition rise or fall rate Voc=3Vto36V 0 100 0 100 ns/V Voc =45Vto5.5V 0 20 0 20 TA Operating free-air temperature 55 125 40 85 C NOTE 4: All unused inputs of the device must be held at Vcc or GND to ensure proper device operation. Refer to the Tl application report, Implications of Slow or Floating CMOS Inputs, literature number SCBAO04. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV138A SN74LV138A PARAMETER TEST CONDITIONS Vcc UNIT MIN TYP MAX MIN TYP MAX lOH =50 pA 2Vt05.5V | Vec0.1 Voc-0.1 loH=-2 mA 23V 2 2 VOoH Vv lon =-6 mA 3V 2.48 2.48 lOH =-12 mA 45V 3.8 3.8 lol = 50 pA 2Vt055V 0.4 lol =2mA 2.3V 0.4 VOL OL Vv loL=6mA 3V 0.44 lol = 12 mA 45V 0.55 I Vi = Vcc or GND 55V +1 HA loc Vi = Voc or GND, lo=0 55V 20 20 HA loft Vj or Vo = 0105.5 V OV 5 5] pA Cj Vi= Voc or GND 3.3V 24 24 pF PRODUCT PREVIEW information concerns products in the formative or e specications are design goals. Texas Insuments eserves the ight fo hs ica . change or discontinue these products without notice. 4 I TEXAS 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 switching characteristics over recommended operating free-air temperature range, Vec = 2.5 V + 0.2 V (unless otherwise noted) (see Figure 1) Ta = 25C SN54LV138A | SN74LV138A PARAMETER FROM TO LOAD A UNIT (INPUT) (OUTPUT) |CAPACITANCE | MIN TYP MAX| MIN MAX] MIN MAX A, B, or C 11.7 17.6 1 21 1 21 tpd G1 Y C= 15 pF 123 192 1 4,22 1 22| ns G2A or G2B 14 182 1 1 21 A, B, or C 149 214 25 1 25 tpd G1 Y C= 50 pF 157 226 26 1 26| ns G2A or G2B 14.8 22 1 25 1 25 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, Vec = 3.3 V + 0.3 V (unless otherwise noted) (see Figure 1) Ta = 25C SN54LV138A | SN74LV138A PARAMETER FROM To LOAD A UNIT (INPUT) (OUTPUT) |CAPACITANCE | MIN TYP MAX] MIN MAX] MIN MAX A, B, or C 8.1 11.4 1 13 1 13 tpd G1 Y C= 15 pF 84 128 1 15] ns G2A or G2B 78 11.4 1 13.5 A, B, or C 10.3 158 1 18 tpd G1 Y C= 50 pF 106 163 1 185] ns G2A or G2B 10 149 1 17 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, Vec = 5 V+0.5 V (unless otherwise noted) (see Figure 1) Ta = 25C SN54LV138A | SN74LV138A PARAMETER FROM TO LOAD A UNIT (INPUT) (OUTPUT) |CAPACITANCE | MIN TYP MAX] MIN MAX] MIN MAX A, B, or C 56 8.1 1 9.5 1 9.5 tpd G1 Y C= 15 pF 57 8.1 1 495 1 95] ns G2A or G2B 5.4 8.1 1 1 9.5 A, B, or C 7 10.1 11.5 1 115 tpd G1 Y C= 50 pF 71 104 11.5 1 5] ns G2A or G2B 6.8 10.14 1 11.5 1 115 * On products compliant to MIL-PRF-38535, this parameter is not production tested. operating characteristics, Ta = 25C PARAMETER TEST CONDITIONS Vec | TYP | UNIT a 3.3V| 16.8 Cod Power dissipation capacitance CL=50pF, f=10MHz pF 5V] 19.4 PRODUCT PREVIEW information concerns products in the formative or e spedifications are design goals. Texas Inetruments reserves the right to U change or discontinue these products without notice. 4 TEXAS INSTRUMENTS POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395B APRIL 1998 REVISED JULY 1998 PARAMETER MEASUREMENT INFORMATION From Output Test Under Test Point CL (see Note A) / } LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS From Output Under Test | | | | Voc Input 50% Voc Nove Vcc OV VOLTAGE WAVEFORMS PULSE DURATION ---- Voc Input 50% Vcc 50% Voc ! OV | | tPLH +) l>- tPHL | Vou In-Phase | 50% Voc 50% Voc Output ' VOL | | tPHL <> tPLH Out-of-Phase 50% V | 50% V, oH Output ce wr VoL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. Cy includes probe and jig capacitance. CL (see Note A) T LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS o Voc S1 RL =1kQ Open TEST SI GND tPLHtPHL Open tpLz/tpzL Voc tpHz/tpZH GND Open Drain Voc ~~~ Veo Timing Input 50% Vcc | ov tp th tsu +> | [pm Vcc Data Input 50% Voc 50% Vcc OV VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Vec Output > 5 Control so % Voc y <a % Vcc ov tpzL >| le | | ize Output | | | =Vec Waveform 1 | 50% Vcc $1 at Voc | | VoL+0:3Vy 0, (see Note B) | tpHz > le- tpzH > i | Output Voy Waveform 2 Von 0.3 V 0% V, OH $1 at GND 50% Vec X ov (see Note B) VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. tpLz and tpy are the same as tgs. tpzZ_ and tp7Z} are the same as ten. tPHL and tpLH are the same as tod: Ommogd All input pulses are supplied by generators having the following characteristics: PRR < 1 MHz, Zo = 50 Q, tp <3 ns, % <3 ns. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms wy TEXAS INSTRUMENTS 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265IMPORTANT NOTICE Texas Instruments and its subsidiaries (Tl) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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