1
FEATURES
DESCRIPTION/ORDERING INFORMATION
SN74LVC07A
www.ti.com
.................................................................................................................................................... SCAS595R – OCTOBER 1997 – REVISED APRIL 2008
HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS
•Operates From 1.65 V to 5 V •Max t
pd
of 2.6 ns at 5 V•Inputs and Open-Drain Outputs Accept •Latch-Up Performance Exceeds 250 mA PerVoltages up to 5.5 V JESD 17
This hex buffer/driver is designed for 1.65-V to 5.5-V V
CC
operation.
The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs toimplement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA.
Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use ofthis device as translators in a mixed-system environment.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
QFN – RGY Reel of 1000 SN74LVC07ARGYR LC07ATube of 50 SN74LVC07ADSOIC – D Reel of 2500 SN74LVC07ADR LVC07AReel of 250 SN74LVC07ADTSOP – NS Reel of 2000 SN74LVC07ANSR LVC07A– 40 °C to 85 °C
SSOP – DB Reel of 2000 SN74LVC07ADBR LC07ATube of 90 SN74LVC07APWTSSOP – PW Reel of 2000 SN74LVC07APWR LC07AReel of 250 SN74LVC07APWTTVSOP – DGV Reel of 2000 SN74LVC07ADGVR LC07A
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
A Y
ABSOLUTE MAXIMUM RATINGS
(1)
SN74LVC07A
SCAS595R – OCTOBER 1997 – REVISED APRIL 2008 ....................................................................................................................................................
www.ti.com
FUNCTION TABLE(EACH BUFFER/DRIVER)
INPUT OUTPUTA Y
H HL L
LOGIC DIAGRAM, EACH BUFFER/DRIVER (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range – 0.5 6.5 VV
I
Input voltage range
(2)
– 0.5 6.5 VV
O
Output voltage range – 0.5 6.5 VI
IK
Input clamp current V
I
< 0 – 50 mAI
OK
Output clamp current V
O
< 0 – 50 mAI
O
Continuous output current ± 50 mAContinuous current through V
CC
or GND ± 100 mAD package
(3)
86DB package
(3)
96DGV package
(3)
127θ
JA
Package thermal impedance °C/WNS package
(3)
76PW package
(3)
113RGY package
(4)
47T
stg
Storage temperature range – 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3) The package thermal impedance is calculated in accordance with JESD 51-7.(4) The package thermal impedance is calculated in accordance with JESD 51-5.
2Submit Documentation Feedback Copyright © 1997 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC07A
RECOMMENDED OPERATING CONDITIONS
(1)
ELECTRICAL CHARACTERISTICS
SN74LVC07A
www.ti.com
.................................................................................................................................................... SCAS595R – OCTOBER 1997 – REVISED APRIL 2008
MIN MAX UNIT
V
CC
Supply voltage 1.65 5.5 VV
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
V
CC
= 2.3 V to 2.7 V 1.7V
IH
High-level input voltage VV
CC
= 2.7 V to 3.6 V 2V
CC
= 4.5 V to 5.5 V 0.7 ×V
CC
V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
V
CC
= 2.3 V to 2.7 V 0.7V
IL
Low-level input voltage VV
CC
= 2.7 V to 3.6 V 0.8V
CC
= 4.5 V to 5.5 V 0.3 ×V
CC
V
I
Input voltage 0 5.5 VV
O
Output voltage 0 5.5 VV
CC
= 1.65 V 4V
CC
= 2.3 V 12I
OL
Low-level output current V
CC
= 2.7 V 12 mAV
CC
= 3 V 24V
CC
= 4.5 V 24T
A
Operating free-air temperature – 40 85 °C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
I
OL
= 100 µA 1.65 V to 5.5 V 0.2I
OL
= 4 mA 1.65 V 0.45V
OL
2.3 V 0.7 VI
OL
= 12 mA
2.7 V 0.4I
OL
= 24 mA 3 V 0.55I
I
V
I
= 5.5 V or GND 3.6 V ± 5 µAI
off
V
I
or V
O
= 5.5 V 0 V ± 10 µAI
CC
V
I
= V
CC
or GND, I
O
= 0 3.6 V 10 µAOne input at V
CC
– 0.6 V,ΔI
CC
2.7 V to 3.6 V 500 µAOther inputs at V
CC
or GNDC
i
V
I
= V
CC
or GND 3.3 V 5 pF
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25 °C.
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN74LVC07A
SWITCHING CHARACTERISTICS
OPERATING CHARACTERISTICS
SN74LVC07A
SCAS595R – OCTOBER 1997 – REVISED APRIL 2008 ....................................................................................................................................................
www.ti.com
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 through Figure 4 )
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V V
CC
= 5 VV
CC
= 2.7 VFROM TO
± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
t
pd
A Y 1 5.6 1 3.4 3.3 1 3.6 1 2.6 ns
T
A
= 25 °C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V V
CC
= 5 VTESTPARAMETER UNITCONDITIONS
TYP TYP TYP TYP
Power dissipation capacitanceC
pd
f = 10 MHz 1.8 2 2.5 3.78 pFper buffer/driver
4Submit Documentation Feedback Copyright © 1997 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC07A
PARAMETER MEASUREMENT INFORMATION
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
2 × VCC
2 × VCC
2 × VCC
TEST S1
VCC/2
VCC/2
VCC/2VCC/2
VCC/2VCC/2
VCC/2
VCC/2
VCC
VOL
th
tsu
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
1 kΩ
1 kΩ
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at 2 × VCC
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.15 V
VCC − 0.15 V
0 V
VCC
0 V
0 V
tw
VCC VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VCC/2.
G. tPLZ is measured at VOL + 0.15 V.
H. All parameters and waveforms are not applicable to all devices.
0 V
VCC
VCC/2
tPHL
VCC/2 VCC/2 VCC
0 V
VCC
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2 VCC/2
tPLH
2 × VCC
VCC
SN74LVC07A
www.ti.com
.................................................................................................................................................... SCAS595R – OCTOBER 1997 – REVISED APRIL 2008
V
CC
= 1.8 V ± 0.15 V
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN74LVC07A
PARAMETER MEASUREMENT INFORMATION
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
2 × VCC
2 × VCC
2 × VCC
TEST S1
VCC/2
VCC/2
VCC/2VCC/2
VCC/2VCC/2
VCC/2
VCC/2
VCC
VOL
th
tsu
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at 2 × VCC
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.15 V
VCC − 0.15 V
0 V
VCC
0 V
0 V
tw
VCC VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VCC/2.
G. tPLZ is measured at VOL + 0.15 V.
H. All parameters and waveforms are not applicable to all devices.
0 V
VCC
VCC/2
tPHL
VCC/2 VCC/2 VCC
0 V
VCC
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2 VCC/2
tPLH
2 × VCC
VCC
SN74LVC07A
SCAS595R – OCTOBER 1997 – REVISED APRIL 2008 ....................................................................................................................................................
www.ti.com
V
CC
= 2.5 V ± 0.2 V
Figure 2. Load Circuit and Voltage Waveforms
6Submit Documentation Feedback Copyright © 1997 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC07A
PARAMETER MEASUREMENT INFORMATION
1.5 V
1.5 V
1.5 V1.5 V
1.5 V1.5 V
1.5 V
1.5 V
3 V
VOL
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at 6 V
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.3 V
2.7 V
0 V
2.7 V
0 V
0 V
tw
2.7 V 2.7 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
6 V
6 V
6 V
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at 1.5 V.
G. tPLZ is measured at VOL + 0.3 V.
H. All parameters and waveforms are not applicable to all devices.
6 V
0 V
2.7 V
1.5 V
tPHL
1.5 V 1.5 V 2.7 V
0 V
3 V
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V 1.5 V
tPLH
SN74LVC07A
www.ti.com
.................................................................................................................................................... SCAS595R – OCTOBER 1997 – REVISED APRIL 2008
V
CC
= 2.7 and 3.3 V ± 0.3 V
Figure 3. Load Circuit and Voltage Waveforms
Copyright © 1997 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): SN74LVC07A
PARAMETER MEASUREMENT INFORMATION
500 Ω
500 Ω
2xVCC
NOTES: A. CLincludesprobeandjigcapacitance.
B. Waveform1isforanoutputwithinternalconnectionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol.
Waveform2isforanoutputwithinternalconnectionssuchthattheoutputishigh,exceptwhendisabledbytheoutputcontrol.
C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR 10MHz,Z =50 ,t 2.5ns,t
t t t
t V
t V
≤Ω≤ ≤ 2.5ns.
D. Theoutputsaremeasuredoneatatime,withonetransitionpermeasurement.
E. Sincethisdevicehasopen-drainoutputs, and arethesameas .
F. ismeasuredat /2.
G. ismeasuredat +0.3V.
H.Allparametersandwaveformsarenotapplicabletoalldevices.
O r f
PLZ PZL pd
PZL CC
PLZ OL
Output
Waveform2
S1at2xVCC
(seeNoteB)
Output
Waveform1
S1at2xVCC
(seeNoteB)
2xVCC
2xVCC
2xVCC
0.3V
SN74LVC07A
SCAS595R – OCTOBER 1997 – REVISED APRIL 2008 ....................................................................................................................................................
www.ti.com
V
CC
= 5 V ± 0.5 V
Figure 4. Load Circuit and Voltage Waveforms
8Submit Documentation Feedback Copyright © 1997 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC07A
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74LVC07AD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADBR ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADT ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADTE4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ADTG4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ANSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74LVC07APWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWT ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74LVC07APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC07ARGYR ACTIVE VQFN RGY 14 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74LVC07ARGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC07A :
•Automotive: SN74LVC07A-Q1
•Enhanced Product: SN74LVC07A-EP
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC07ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74LVC07ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1
SN74LVC07ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC07ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74LVC07APWR TSSOP PW 14 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1
SN74LVC07ARGYR VQFN RGY 14 3000 180.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Dec-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC07ADBR SSOP DB 14 2000 346.0 346.0 33.0
SN74LVC07ADGVR TVSOP DGV 14 2000 346.0 346.0 29.0
SN74LVC07ADR SOIC D 14 2500 346.0 346.0 33.0
SN74LVC07ANSR SO NS 14 2000 346.0 346.0 33.0
SN74LVC07APWR TSSOP PW 14 2000 346.0 346.0 29.0
SN74LVC07ARGYR VQFN RGY 14 3000 190.5 212.7 31.8
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Dec-2009
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
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