Precision Mixed Signal Copyright © 2004 by Silicon Laboratories 6.15.2004
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C8051F000
20 MIPS, 32 kB Flash, 12-Bit ADC, 64-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER CONDITIONS MIN TYP MAX UNITS
GLOBAL CHARACTERISTICS
Analog Supply Voltage 2.7 3.6 V
Analog Supply Current Internal REF, ADC, DAC, Comparators all
active
0.8 mA
Analog Supply Current with
analog sub-systems inactive
Internal REF, ADC, DAC, Comparators all
disabled
5 µA
Digital Supply Voltage 2.7 3.6 V
Digital Supply Current with
CPU active
Clock = 20 MHz
Clock = 1 MHz
Clock = 32 kHz
10
0.5
20
mA
mA
µA
Digital Supply Current
(shutdown mode)
Oscillator not running 2 µA
VDD Data Retention Voltage RAM remains valid 1.5 V
CPU & DIGITAL I/O
Clock Frequency Range DC 20 MHz
Port Output High Voltage IOH = –3 mA, Port I/O push-pull VDD – 0.7 V
Port Output Low Voltage IOL = 8.5 mA 0.6 V
Input High Voltage 0.8 x VDD V
Input Low Voltage 0.2 x VDD V
SMBus SCL Frequency SYSCLK = MCU system clock SYSCLK/8 MHz
SPI Bus Clock Frequency SYSCLK = MCU system clock SYSCLK/2 MHz
A/D CONVERTER
Resolution 12 bits
Integral Nonlinearity ±1 LSB
Differential Nonlinearity Guaranteed Monotonic ±1 LSB
Throughput Rate 100 ksps
Input Voltage Range 0 VREF V
D/A CONVERTERS
Resolution 12 bits
Integral Nonlinearity Specified from Data Word 014h to FEBh ±4 LSB
Differential Nonlinearity Guaranteed Monotonic ±1 LSB
Offset Error Data Word = 014h ±3 LSB
Output Settling Time To ½ LSB of full-scale 10 µs
Output Voltage Swing 0 VREF – 1 LSB V
COMPARATORS
Supply Current (each Comparator) 1.5 µA
Response Time | (CP+) – (CP-) | = 100 mV 4 µs
Input Voltage Range –0.25 (AV+) +0.25 V
Input Bias Current –5 0.001 +5 nA
Input Offset Voltage –10 +10 mV
Package Information
A
A1
A2
b
D
D1
e
E
E1
-
0.05
0.95
0.17
-
-
-
-
-
-
-
-
0.22
12.00
10.00
0.50
12.00
10.00
1.20
0.15
1.05
0.27
-
-
-
-
-
MIN
(mm)
NOM
(mm)
MAX
(mm)
1
64
E
E1
e
A1
b
D
D1
PIN 1
DESIGNATOR
A2
A
C8051F005DK Development Kit