6-178
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
UltraFET™ is a Trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
HUF76145P3, HUF76145S3S
75A, 30V, 0.0045 Ohm
,
N-Channel, Logic
Level UltraFET Power MOSFETs
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET™ process.
This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
Formerly developmental type TA76145.
Features
• Logic Level Gate Drive
• 75A, 30V
• Ultra Low On-Resistance, rDS(ON) = 0.0045Ω
• Temperature Compensating PSPICE™ Model
• Temperature Compensating SABER Model
• Thermal Impedance SPICE Model
• Thermal Impedance SABER Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB JEDEC TO-263AB
Ordering Information
PART NUMBER PACKAGE BRAND
HUF76145P3 TO-220AB 76145P
HUF76145S3S TO-263AB 76145S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF76145S3ST.
D
G
S
DRAIN
SOURCE
GATE
DRAIN
(FLANGE)
GATE
SOURCE
DRAIN
(FLANGE)
September 1999Data Sheet File Number
4401.7
6-179
Absolute Maximum Ratings TC=25
o
C,Unless Otherwise Specified UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDSS 30 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 30 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±16 V
Drain Current
Continuous (TC= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC= 100oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC= 100oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
75
75
75
Figure 4
A
A
A
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Figures 6, 17, 18
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270
2.17 W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -40 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TA= 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 12) 30 - - V
Zero Gate Voltage Drain Current IDSS VDS = 25V, VGS = 0V - - 1 µA
VDS = 25V, VGS = 0V, TC = 150oC - - 250 µA
Gate to Source Leakage Current IGSS VGS = ±16V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 11) 1 - 3 V
Drain to Source On Resistance rDS(ON) ID = 75A, VGS = 10V (Figure 9, 10) - 0.0035 0.0045 Ω
ID = 75A, VGS = 5V (Figure 9) - 0.0043 0.0058 Ω
ID = 75A, VGS = 4.5V (Figure 9) - 0.0046 0.0065 Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case RθJC (Figure 3) - - 0.46 oC/W
Thermal Resistance Junction to Ambient RθJA TO-220 and TO-263 - - 62 oC/W
SWITCHING SPECIFICATIONS (VGS = 4.5V)
Turn-On Time tON VDD = 15V, ID≅ 75A,
RL = 0.20Ω, VGS =4.5V,
RGS = 2.5Ω
(Figures 15, 20, 21)
- - 255 ns
Turn-On Delay Time td(ON) -26-ns
Rise Time tr- 145 - ns
Turn-Off Delay Time td(OFF) -35-ns
Fall Time tf-39-ns
Turn-Off Time tOFF - - 110 ns
HUF76145P3, HUF76145S3S
6-180
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time tON VDD = 15V, ID≅ 75A,
RL = 0.20Ω, VGS =10V,
RGS = 2.2Ω
(Figures 16, 20, 21)
- - 110 ns
Turn-On Delay Time td(ON) -16-ns
Rise Time tr-57-ns
Turn-Off Delay Time td(OFF) -53-ns
Fall Time tf-38-ns
Turn-Off Time tOFF - - 135 ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge Qg(TOT) VGS = 0V to 10V VDD = 15V,
ID≅ 75A,
RL = 0.20Ω
Ig(REF) = 1.0mA
(Figures 14, 19, 20)
- 130 156 nC
Gate Charge at 5V Qg(5) VGS = 0V to 5V - 73 88 nC
Threshold Gate Charge Qg(TH) VGS = 0V to 1V - 4.65 5.6 nC
Gate to Source Gate Charge Qgs - 12.30 - nC
Gate to Drain “Miller” Charge Qgd - 40.00 - nC
CAPACITANCE SPECIFICATIONS
Input Capacitance CISS VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 13)
- 4900 - pF
Output Capacitance COSS - 2520 - pF
Reverse Transfer Capacitance CRSS - 560 - pF
Electrical Specifications TA= 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage VSD ISD = 75A - - 1.25 V
Reverse Recovery Time trr ISD = 75A, dISD/dt = 100A/µs - - 115 ns
Reverse Recovered Charge QRR ISD = 75A, dISD/dt = 100A/µs - - 255 nC
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
TA, AMBIENT TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
00 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
40
025 50 75 100 125
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
80
150
20
60
VGS=10V
VGS=4.5V
50
HUF76145P3, HUF76145S3S
6-181
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. PEAK CURRENT CAPABILITY
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
Typical Performance Curves
(Continued)
t, RECTANGULAR PULSE DURATION (s)
10-5 10-1 100
2
0.1
1
10-2
ZθJC, NORMALIZED
THERMAL IMPEDANCE
0.01 10-4 10-3
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
PDM
t1t2
101
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
TC = 25oC
I = I25 150 - TC
125
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
IDM, PEAK CURRENT (A)
5000
50
10-5 10-4 10-3 10-2 10-1 100101
t, PULSE WIDTH (s)
100
VGS = 5V
1000
VGS=10V
TJ = MAX RATED
TC = 25oC
100µs
10ms
1ms
BVDSS(MAX) = 30V
LIMITED BY rDS(ON)
AREA MAY BE
OPERATION IN THIS
1001 VDS, DRAIN TO SOURCE VOLTAGE (V)
10
1000
5000
100
ID, DRAIN CURRENT (A)
10 1 10 100
100
0.1
1000
10
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R = 0
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
STARTING TJ = 25oC
STARTING TJ = 150oC
0.01
HUF76145P3, HUF76145S3S
6-182
FIGURE 7. TRANSFER CHARACTERISTICS FIGURE 8. SATURATION CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Typical Performance Curves
(Continued)
0 23451
0
60
120
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
150oC-40oC
25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDD = 15V
150
90
30
0
30
60
0234
90
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 3.5V
VGS = 3V
150
1
120
VGS = 4V
VGS = 4.5V
VGS = 5V
VGS = 10V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
10
20
04
VGS, GATE TO SOURCE VOLTAGE (V)
26108
I
D
= 75A
ID = 50A
ID = 25A
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (mΩ)
5
15
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.6
1.2
1.5
1.8
-60 0 60 120
NORMALIZED DRAIN TO SOURCE
TJ, JUNCTION TEMPERATURE (oC)
ON RESISTANCE
180
0.9
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 75A
-60 0 60 120
0.4
0.6
1.0
1.4
NORMALIZED GATE
TJ, JUNCTION TEMPERATURE (oC)
THRESHOLD VOLTAGE
VGS = VDS, ID = 250µA
180
0.8
1.2
TJ, JUNCTION TEMPERATURE (oC)
1.2
1.1
1.0
0.9
-60 0 60 120
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
ID = 250µA
180
HUF76145P3, HUF76145S3S
6-183
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
Test Circuits and Waveforms
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
Typical Performance Curves
(Continued)
COSS
8000
4000
00 5 15 25
C, CAPACITANCE (pF)
6000
VDS, DRAIN TO SOURCE VOLTAGE (V)
2000
30
CISS
CRSS
10 20
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
10
8
6
4
0
VGS, GATE TO SOURCE VOLTAGE (V)
VDD = 15V
2
120 1600
Qg, GATE CHARGE (nC)
40
ID = 75A
ID = 50A
ID = 25A
WAVEFORMS IN
DESCENDING ORDER:
80
200
20 30 40 500
1200
800
400
010
SWITCHING TIME (ns)
RGS, GATE TO SOURCE RESISTANCE (Ω)
td(OFF
td(ON)
tr
tf
VGS = 4.5V, VDD = 15V, ID = 75A, RL= 0.20 Ω
1000
600
400
20 30 40 500
1000
800
600
010
SWITCHING TIME (ns)
RGS, GATE TO SOURCE RESISTANCE (Ω)
td(OFF)
td(ON)
tr
tf
VGS = 10V, VDD = 15V, ID = 75A, RL= 0.20 Ω
200
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
HUF76145P3, HUF76145S3S
6-184
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
FIGURE 21. SWITCHING TIME TEST CIRCUIT FIGURE 22. SWITCHING TIME WAVEFORM
Test Circuits and Waveforms
(Continued)
RL
VGS +
-
VDS
VDD
DUT
IG(REF)
VDD
Qg(TH)
VGS = 1V
Qg(5)
VGS = 5V
Qg(TOT)
VGS = 10
VDS
VGS
IG(REF)
0
0
VGS
RL
RGS DUT
+
-VDD
VDS
VGS
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
HUF76145P3, HUF76145S3S
6-185
PSPICE Electrical Model
SUBCKT HUF76145 2 1 3 ; rev 6 Apr98
CA 12 8 7.75e-9
CB 15 14 7.45e-9
CIN 6 8 4.47e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 33.5
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.00e-9
LGATE 1 9 2.60e-9
LSOURCE 3 7 1.10e-9
KGATE LSOURCE LGATE 0.0085
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 0.59e-3
RGATE 9 20 0.898
RLDRAIN 2 5 10
RLGATE 1 9 26
RLSOURCE 3 7 11
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 2.20e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*750),3))}
.MODEL DBODYMOD D (IS = 6.01e-12 IKF = 20 RS = 1. 72e-3 TRS1 = 1.01e-3 TRS2 = 1.21e-6 CJO = 8.41e-9 TT = 4.84e-8 M = 0.45 )
.MODEL DBREAKMOD D (RS = 6.80e-2 TRS1 = 1.12e-3 TRS2 = 1.25e-6 )
.MODEL DPLCAPMOD D (CJO = 4.25e-9 IS = 1e-30 N = 10 M = 0.61)
.MODEL MMEDMOD NMOS (VTO = 1.74 KP = 5.00 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.898)
.MODEL MSTROMOD NMOS (VTO = 2.10 KP = 245 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.48 KP = 0.10 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 8.98 RS= 0.1)
.MODEL RBREAKMOD RES (TC1 = 1.01e-3 TC2 = 1.07e-7)
.MODEL RDRAINMOD RES (TC1 = 1.58e-2 TC2 = 3.76e-5)
.MODEL RSLCMOD RES (TC1 = 1.02e-4 TC2 = -1.13e-4)
.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -2.73e-3 TC2 = -1.01e-5)
.MODEL RVTEMPMOD RES (TC1 = -1.50e-3 TC2 = 1.25e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.00 VOFF= -1.50)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.50 VOFF= -6.00)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.00 VOFF= 0.45)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.45 VOFF= 0.00)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
18
22
+-
6
8
+
-
5
51
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
814
13
MWEAK
EBREAK DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ESLC
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE EVTEMP
9
ESG
LGATE
RLGATE 20
+
-
+
-
+
-
6
HUF76145P3, HUF76145S3S
6-186
SABER Electrical Model
REV 6 Apr 1998
template huf76145 n2, n1, n3
electrical n2, n1, n3
{
var i iscl
d..model dbodymod = (is = 6.01e-12, cjo = 8.41e-9, tt = 4.84e-8, m = 0.45)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 4.25e-9, is = 1e-30, n = 10, m = 0.61)
m..model mmedmod = (type=_n, vto = 1.74, kp = 5.00, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 2.10, kp = 245, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 1.48, kp = 0.10, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -6.0, voff = -1.5)
sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -1.5, voff = -6.0)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0.0, voff = 0.45)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.45, voff = 0.0)
c.ca n12 n8 = 7.75e-9
c.cb n15 n14 = 7.45e-9
c.cin n6 n8 = 4.47e-9
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
l.ldrain n2 n5 = 1.00e-9
l.lgate n1 n9 = 2.60e-9
l.lsource n3 n7 = 1.10e-9
k.k1 i(l.lgate) i(l.lsource) = l(l.lgate), l(l.lsource), 0.0085
m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u
res.rbreak n17 n18 = 1, tc1 = 1.01e-3, tc2 = 1.07e-7
res.rdbody n71 n5 = 1.72e-3, tc1 = 1.01e-3, tc2 = 1.21e-6
res.rdbreak n72 n5 = 6.80e-2, tc1 = 1.12e-3, tc2 = 1.25e-6
res.rdrain n50 n16 = 0.59e-3, tc1 = 1.58e-2, tc2 = 3.76e-5
res.rgate n9 n20 = 0.898
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 26
res.rlsource n3 n7 = 11
res.rslc1 n5 n51 = 1e-6, tc1 = 1.02e-4, tc2 = -1.13e-4
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 2.20e-3, tc1 = 0, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -1.50e-3, tc2 = 1.25e-6
res.rvthres n22 n8 = 1, tc1 = -2.73e-3, tc2 = -1.01e-5
spe.ebreak n11 n7 n17 n18 = 33.50
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc = 1
equations {
i (n51->n50) + = iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/750))** 3))
}
}
18
22
+-
6
8
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
814
13
MWEAK
EBREAK DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ISCL
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE EVTEMP
9
ESG
LGATE
RLGATE 20
+
-
+
-
+
-
6
RDBODY
RDBREAK
72
71
HUF76145P3, HUF76145S3S
6-187
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SPICE Thermal Model
REV 14 April 1998
HUF76145
CTHERM1 th 6 5.00e-5
CTHERM2 6 5 1.00e-3
CTHERM3 5 4 2.50e-3
CTHERM4 4 3 9.00e-3
CTHERM5 3 2 3.30e-2
CTHERM6 2 tl 7.00e-2
RTHERM1 th 6 2.00e-5
RTHERM2 6 5 2.06e-3
RTHERM3 5 4 6.71e-3
RTHERM4 4 3 2.07e-2
RTHERM5 3 2 4.12e-2
RTHERM6 2 tl 1.06e-1
SABER Thermal Model
Saber thermal model HUF76145
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 6 = 5.0e-5
ctherm.ctherm2 6 5 = 1.00e-3
ctherm.ctherm3 5 4 = 2.50e-3
ctherm.ctherm4 4 3 = 9.00e-3
ctherm.ctherm5 3 2 = 3.30e-2
ctherm.ctherm6 2 tl = 7.00e-2
rtherm.rtherm1 th 6 = 2.00e-5
rtherm.rtherm2 6 5 = 2.06e-3
rtherm.rtherm3 5 4 = 6.71e-3
rtherm.rtherm4 4 3 = 2.07e-2
rtherm.rtherm5 3 2 = 4.12e-2
rtherm.rtherm6 2 tl = 1.06e-1
}
RTHERM4
RTHERM6
RTHERM5
RTHERM3
RTHERM2
RTHERM1
CTHERM4
CTHERM6
CTHERM5
CTHERM3
CTHERM2
CTHERM1
tl
2
3
4
5
6
th JUNCTION
CASE
HUF76145P3, HUF76145S3S
